llvm.org GIT mirror llvm / 7ae68ab
initial support for frame pointers git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31197 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 14 years ago
4 changed file(s) with 49 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
9090 setOperationAction(ISD::VASTART, MVT::Other, Custom);
9191 setOperationAction(ISD::VACOPY, MVT::Other, Expand);
9292 setOperationAction(ISD::VAEND, MVT::Other, Expand);
93 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand);
9394
9495 setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
9596 setOperationAction(ISD::ConstantFP, MVT::f32, Expand);
97
98 setStackPointerRegisterToSaveRestore(ARM::R13);
9699
97100 setSchedulingPreference(SchedulingForRegPressure);
98101 computeRegisterProperties();
1818 #include "llvm/CodeGen/MachineFrameInfo.h"
1919 #include "llvm/CodeGen/MachineLocation.h"
2020 #include "llvm/Type.h"
21 #include "llvm/Target/TargetOptions.h"
2122 #include "llvm/ADT/STLExtras.h"
2223 #include
2324 using namespace llvm;
25
26 // hasFP - Return true if the specified function should have a dedicated frame
27 // pointer register. This is true if the function has variable sized allocas or
28 // if frame pointer elimination is disabled.
29 //
30 static bool hasFP(const MachineFunction &MF) {
31 const MachineFrameInfo *MFI = MF.getFrameInfo();
32 return NoFramePointerElim || MFI->hasVarSizedObjects();
33 }
2434
2535 ARMRegisterInfo::ARMRegisterInfo()
2636 : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP) {
8797 void ARMRegisterInfo::
8898 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
8999 MachineBasicBlock::iterator I) const {
100 if (hasFP(MF)) {
101 assert(0);
102 }
90103 MBB.erase(I);
91104 }
92105
113126 Offset += StackSize;
114127
115128 assert (Offset >= 0);
129 unsigned BaseRegister = hasFP(MF) ? ARM::R11 : ARM::R13;
116130 if (Offset < 4096) {
117131 // Replace the FrameIndex with r13
118 MI.getOperand(FrameIdx).ChangeToRegister(ARM::R13, false);
132 MI.getOperand(FrameIdx).ChangeToRegister(BaseRegister, false);
119133 // Replace the ldr offset with Offset
120134 MI.getOperand(OffIdx).ChangeToImmediate(Offset);
121135 } else {
122136 // Insert a set of r12 with the full address
123137 // r12 = r13 + offset
124138 MachineBasicBlock *MBB2 = MI.getParent();
125 BuildMI(*MBB2, II, ARM::ADD, 4, ARM::R12).addReg(ARM::R13).addImm(Offset)
126 .addImm(0).addImm(ARMShift::LSL);
139 BuildMI(*MBB2, II, ARM::ADD, 4, ARM::R12).addReg(BaseRegister)
140 .addImm(Offset).addImm(0).addImm(ARMShift::LSL);
127141
128142 // Replace the FrameIndex with r12
129143 MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12, false);
139153 MachineFrameInfo *MFI = MF.getFrameInfo();
140154 int NumBytes = (int) MFI->getStackSize();
141155
156 bool HasFP = hasFP(MF);
157
142158 if (MFI->hasCalls()) {
143159 // We reserve argument space for call sites in the function immediately on
144160 // entry to the current function. This eliminates the need for add/sub
146162 NumBytes += MFI->getMaxCallFrameSize();
147163 }
148164
165 if (HasFP)
166 // Add space for storing the FP
167 NumBytes += 4;
168
149169 // Align to 8 bytes
150170 NumBytes = ((NumBytes + 7) / 8) * 8;
151171
154174 //sub sp, sp, #NumBytes
155175 BuildMI(MBB, MBBI, ARM::SUB, 4, ARM::R13).addReg(ARM::R13).addImm(NumBytes)
156176 .addImm(0).addImm(ARMShift::LSL);
177
178 if (HasFP) {
179 BuildMI(MBB, MBBI, ARM::str, 3)
180 .addReg(ARM::R11).addImm(0).addReg(ARM::R13);
181 BuildMI(MBB, MBBI, ARM::MOV, 3, ARM::R11).addReg(ARM::R13).addImm(0).
182 addImm(ARMShift::LSL);
183 }
157184 }
158185
159186 void ARMRegisterInfo::emitEpilogue(MachineFunction &MF,
165192 MachineFrameInfo *MFI = MF.getFrameInfo();
166193 int NumBytes = (int) MFI->getStackSize();
167194
195 if (hasFP(MF)) {
196 BuildMI(MBB, MBBI, ARM::MOV, 3, ARM::R13).addReg(ARM::R11).addImm(0).
197 addImm(ARMShift::LSL);
198 BuildMI(MBB, MBBI, ARM::ldr, 2, ARM::R11).addImm(0).addReg(ARM::R13);
199 }
200
168201 //add sp, sp, #NumBytes
169202 BuildMI(MBB, MBBI, ARM::ADD, 4, ARM::R13).addReg(ARM::R13).addImm(NumBytes)
170203 .addImm(0).addImm(ARMShift::LSL);
175208 }
176209
177210 unsigned ARMRegisterInfo::getFrameRegister(MachineFunction &MF) const {
178 return ARM::R13;
211 return hasFP(MF) ? ARM::R11 : ARM::R13;
179212 }
180213
181214 #include "ARMGenRegisterInfo.inc"
124124 // r12 == ip (scratch)
125125 // r11 == Frame Pointer
126126 // r10 == Stack Limit
127 return end() - 4;
127 if (hasFP(MF))
128 return end() - 5;
129 else
130 return end() - 4;
128131 }
129132 }];
130133 }
0 void %f(uint %a) {
1 entry:
2 %tmp1032 = alloca ubyte, uint %a
3 ret void
4 }