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Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm. I cannot reproduce a fixed issue with other targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149604 91177308-0d34-0410-b5e6-96231b3b80d8 NAKAMURA Takumi 8 years ago
2 changed file(s) with 26 addition(s) and 26 deletion(s). Raw diff Collapse all Expand all
0 ; RUN: llc -verify-coalescing < %s
1 ; PR11868
2
3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
4 target triple = "armv7-none-linux-gnueabi"
5
6 %0 = type { <4 x float> }
7 %1 = type { <4 x float> }
8
9 @foo = external global %0, align 16
10
11 define arm_aapcs_vfpcc void @bar(float, i1 zeroext, i1 zeroext) nounwind {
12 %4 = load <4 x float>* getelementptr inbounds (%0* @foo, i32 0, i32 0), align 16
13 %5 = extractelement <4 x float> %4, i32 0
14 %6 = extractelement <4 x float> %4, i32 1
15 %7 = extractelement <4 x float> %4, i32 2
16 %8 = insertelement <4 x float> undef, float %5, i32 0
17 %9 = insertelement <4 x float> %8, float %6, i32 1
18 %10 = insertelement <4 x float> %9, float %7, i32 2
19 %11 = insertelement <4 x float> %10, float 0.000000e+00, i32 3
20 store <4 x float> %11, <4 x float>* undef, align 16
21 call arm_aapcs_vfpcc void @baz(%1* undef, float 0.000000e+00) nounwind
22 ret void
23 }
24
25 declare arm_aapcs_vfpcc void @baz(%1*, float)
+0
-26
test/CodeGen/Generic/2012-02-01-CoalescerBug.ll less more
None ; RUN: llc -verify-coalescing < %s
1 ; PR11868
2
3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
4 target triple = "armv7-none-linux-gnueabi"
5
6 %0 = type { <4 x float> }
7 %1 = type { <4 x float> }
8
9 @foo = external global %0, align 16
10
11 define arm_aapcs_vfpcc void @bar(float, i1 zeroext, i1 zeroext) nounwind {
12 %4 = load <4 x float>* getelementptr inbounds (%0* @foo, i32 0, i32 0), align 16
13 %5 = extractelement <4 x float> %4, i32 0
14 %6 = extractelement <4 x float> %4, i32 1
15 %7 = extractelement <4 x float> %4, i32 2
16 %8 = insertelement <4 x float> undef, float %5, i32 0
17 %9 = insertelement <4 x float> %8, float %6, i32 1
18 %10 = insertelement <4 x float> %9, float %7, i32 2
19 %11 = insertelement <4 x float> %10, float 0.000000e+00, i32 3
20 store <4 x float> %11, <4 x float>* undef, align 16
21 call arm_aapcs_vfpcc void @baz(%1* undef, float 0.000000e+00) nounwind
22 ret void
23 }
24
25 declare arm_aapcs_vfpcc void @baz(%1*, float)