llvm.org GIT mirror llvm / 7a2bdde
Fix a ton of comment typos found by codespell. Patch by Luis Felipe Strano Moraes! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 8 years ago
193 changed file(s) with 267 addition(s) and 268 deletion(s). Raw diff Collapse all Expand all
153153 option(LLVM_ENABLE_ASSERTIONS "Enable assertions" ON)
154154 endif()
155155
156 # All options refered to from HandleLLVMOptions have to be specified
156 # All options referred to from HandleLLVMOptions have to be specified
157157 # BEFORE this include, otherwise options will not be correctly set on
158158 # first cmake run
159159 include(config-ix)
20232023 $(Verb) cd $(PROJ_OBJ_ROOT) ; $(ZIP) -rq $(DistZip) $(DistName)
20242024
20252025 dist :: $(DistTarGZip) $(DistTarBZ2) $(DistZip)
2026 $(Echo) ===== DISTRIBUTION PACKAGING SUCESSFUL =====
2026 $(Echo) ===== DISTRIBUTION PACKAGING SUCCESSFUL =====
20272027
20282028 DistCheckDir := $(PROJ_OBJ_ROOT)/_distcheckdir
20292029
11171117 test -n "$_LT_AC_TAGVAR(runpath_var, $1)" || \
11181118 test "X$_LT_AC_TAGVAR(hardcode_automatic, $1)" = "Xyes" ; then
11191119
1120 # We can hardcode non-existant directories.
1120 # We can hardcode non-existent directories.
11211121 if test "$_LT_AC_TAGVAR(hardcode_direct, $1)" != no &&
11221122 # If the only mechanism to avoid hardcoding is shlibpath_var, we
11231123 # have to relink, otherwise we might link with an installed library
155155 osf[[1234]]*)
156156 # dlopen did load deplibs (at least at 4.x), but until the 5.x series,
157157 # it did *not* use an RPATH in a shared library to find objects the
158 # library depends on, so we explictly say `no'.
158 # library depends on, so we explicitly say `no'.
159159 libltdl_cv_sys_dlopen_deplibs=no
160160 ;;
161161 osf5.0|osf5.0a|osf5.1)
134134 string(TOUPPER "${c}" capitalized)
135135 list(FIND capitalized_libs LLVM${capitalized} lib_idx)
136136 if( lib_idx LESS 0 )
137 # The component is unkown. Maybe is an ommitted target?
137 # The component is unknown. Maybe is an omitted target?
138138 is_llvm_target_library(${c} iltl_result)
139139 if( NOT iltl_result )
140140 message(FATAL_ERROR "Library `${c}' not found in list of llvm libraries.")
1172211722 osf[1234]*)
1172311723 # dlopen did load deplibs (at least at 4.x), but until the 5.x series,
1172411724 # it did *not* use an RPATH in a shared library to find objects the
11725 # library depends on, so we explictly say `no'.
11725 # library depends on, so we explicitly say `no'.
1172611726 libltdl_cv_sys_dlopen_deplibs=no
1172711727 ;;
1172811728 osf5.0|osf5.0a|osf5.1)
267267
268268 =item B
269269
270 The average number of bytes consumed by the instructions in the funtion. This
270 The average number of bytes consumed by the instructions in the function. This
271271 value is computed by dividing Instruction Size by Instructions.
272272
273273 =item B
307307 -std=c99. It is also allowed to use spaces instead of the equality
308308 sign: -std c99. At most one occurrence is allowed.
309309
  • parameter_list_option - same as the above, but more than one option
  • 310 occurence is allowed.
    310 occurrence is allowed.
    311311
  • prefix_option - same as the parameter_option, but the option name and
  • 312312 argument do not have to be separated. Example: -ofile. This can be also
    313313 specified as -o file; however, -o=file will be parsed incorrectly
    314314 (=file will be interpreted as option value). At most one occurrence is
    315315 allowed.
    316
  • prefix_list_option - same as the above, but more than one occurence of
  • 316
  • prefix_list_option - same as the above, but more than one occurrence of
  • 317317 the option is allowed; example: -lm -lpthread.
    318318
  • alias_option - a special option type for creating aliases. Unlike other
  • 319319 option types, aliases are not allowed to have any properties besides the
    506506 style exception handling. The single parameter is a pointer to a
    507507 buffer populated by
    508508 llvm.eh.sjlj.setjmp. The frame pointer and stack pointer
    509 are restored from the buffer, then control is transfered to the
    509 are restored from the buffer, then control is transferred to the
    510510 destination address.

    511511
    512512
    5959
    6060 Yup, I think that this makes a lot of sense. I am still intrigued,
    6161 however, by the prospect of a minimally allocated VM representation... I
    62 think that it could have definate advantages for certain applications
    62 think that it could have definite advantages for certain applications
    6363 (think very small machines, like PDAs). I don't, however, think that our
    6464 initial implementations should focus on this. :)
    6565
    66 Here are some other auxilliary goals that I think we should consider:
    66 Here are some other auxiliary goals that I think we should consider:
    6767
    6868 1. Primary goal: Support a high performance dynamic compilation
    6969 system. This means that we have an "ideal" division of labor between
    3939 packaged with the bytecodes themselves. As a conceptual implementation
    4040 idea, we could include an immediate dominator number for each basic block
    4141 in the LLVM bytecode program. Basic blocks could be numbered according
    42 to the order of occurance in the bytecode representation.
    42 to the order of occurrence in the bytecode representation.
    4343
    4444 2. Including loop header and body information. This would facilitate
    4545 detection of intervals and natural loops.
    3838
    3939 Very true. If you're implementing an object oriented language, however,
    4040 remember that you have to do all the pointer to member function stuff
    41 yourself.... so everytime you invoke a virtual method one is involved
    41 yourself.... so every time you invoke a virtual method one is involved
    4242 (instead of having C++ hide it for you behind "syntactic sugar").
    4343
    4444 > And the old array syntax:
    1717
    1818 Very true. We should discuss this more, but my reasoning is more of a
    1919 consistency argument. There are VERY few instructions that can have all
    20 of the types eliminated, and doing so when available unnecesarily makes
    20 of the types eliminated, and doing so when available unnecessarily makes
    2121 the language more difficult to handle. Especially when you see 'int
    2222 %this' and 'bool %that' all over the place, I think it would be
    2323 disorienting to see:
    4343
    4444 No. This was something I was debating for a while, and didn't really feel
    4545 strongly about either way. It is common to switch on other types in HLL's
    46 (for example signed int's are particually common), but in this case, all
    46 (for example signed int's are particularly common), but in this case, all
    4747 that will be added is an additional 'cast' instruction. I removed that
    4848 from the spec.
    4949
    159159 > I agree that we need a static data space. Otherwise, emulating global
    160160 > data gets unnecessarily complex.
    161161
    162 Definately. Also a later item though. :)
    162 Definitely. Also a later item though. :)
    163163
    164164 > We once talked about adding a symbolic thread-id field to each
    165165 > ..
    4141 > optimization (step 16 in your list). Do you have a breakdown of that?
    4242
    4343 Not really. The irritating part of GCC is that it mixes it all up and
    44 doesn't have a clean seperation of concerns. A lot of the "back end
    44 doesn't have a clean separation of concerns. A lot of the "back end
    4545 optimization" happens right along with other data optimizations (ie, CSE
    4646 of machine specific things).
    4747
    1616 linear search of the basic block the instruction is contained in... just
    1717 to insert an instruction before another instruction, or to delete an
    1818 instruction! This complicates algorithms that should be very simple (like
    19 simple constant propogation), because they aren't actually sparse anymore,
    19 simple constant propagation), because they aren't actually sparse anymore,
    2020 they have to traverse basic blocks to remove constant propogated
    2121 instructions.
    2222
    23682368 terminator instruction
    23692369 if the terminator instruction has multiple successors and the instruction
    23702370 is always executed when control transfers to one of the successors, and
    2371 may not be executed when control is transfered to another.
    2371 may not be executed when control is transferred to another.
    23722372
    23732373
  • Additionally, an instruction also control-depends on a terminator
  • 23742374 instruction if the set of instructions it otherwise depends on would be
    2375 different if the terminator had transfered control to a different
    2375 different if the terminator had transferred control to a different
    23762376 successor.
    23772377
    23782378
  • Dependence is transitive.
  • 15761576 typedef void (*OurExceptionThrowFunctType) (int32_t typeToThrow);
    15771577
    15781578 /// This is a test harness which runs test by executing generated
    1579 /// function with a type info type to throw. Harness wraps the excecution
    1579 /// function with a type info type to throw. Harness wraps the execution
    15801580 /// of generated function in a C++ try catch clause.
    15811581 /// @param engine execution engine to use for executing generated function.
    15821582 /// This demo program expects this to be a JIT instance for demo
    152152 SmallVectorImpl &OutFragments,
    153153 StringRef Delimiters = " \t\n\v\f\r");
    154154
    155 /// HashString - Hash funtion for strings.
    155 /// HashString - Hash function for strings.
    156156 ///
    157157 /// This is the Bernstein hash function.
    158158 //
    288288 //===----------------------------------------------------------------------===//
    289289 //
    290290 /// iplist - The subset of list functionality that can safely be used on nodes
    291 /// of polymorphic types, i.e. a heterogenous list with a common base class that
    291 /// of polymorphic types, i.e. a heterogeneous list with a common base class that
    292292 /// holds the next/prev pointers. The only state of the list itself is a single
    293293 /// pointer to the head of the list.
    294294 ///
    4242 /// InlineCost - Represent the cost of inlining a function. This
    4343 /// supports special values for functions which should "always" or
    4444 /// "never" be inlined. Otherwise, the cost represents a unitless
    45 /// amount; smaller values increase the likelyhood of the function
    45 /// amount; smaller values increase the likelihood of the function
    4646 /// being inlined.
    4747 class InlineCost {
    4848 enum Kind {
    145145 /// two connections to the remaining graph. It can be used to analyze or
    146146 /// optimize parts of the control flow graph.
    147147 ///
    148 /// A simple Region is connected to the remaing graph by just two
    148 /// A simple Region is connected to the remaining graph by just two
    149149 /// edges. One edge entering the Region and another one leaving the Region.
    150150 ///
    151151 /// An extended Region (or just Region) is a subgraph that can be
    442442
    443443 /// @brief Move all direct child nodes of this Region to another Region.
    444444 ///
    445 /// @param To The Region the child nodes will be transfered to.
    445 /// @param To The Region the child nodes will be transferred to.
    446446 void transferChildrenTo(Region *To);
    447447
    448448 /// @brief Verify if the region is a correct region.
    1919
    2020 namespace llvm {
    2121 //===----------------------------------------------------------------------===//
    22 /// @brief Hierachical RegionNode successor iterator.
    22 /// @brief Hierarchical RegionNode successor iterator.
    2323 ///
    2424 /// This iterator iterates over all successors of a RegionNode.
    2525 ///
    5353 /// @brief Get a pass to print the LLVM IR in the region.
    5454 ///
    5555 /// @param O The ouput stream to print the Region.
    56 /// @param Banner The banner to seperate different printed passes.
    56 /// @param Banner The banner to separate different printed passes.
    5757 ///
    5858 /// @return The pass to print the LLVM IR in the region.
    5959 Pass *createPrinterPass(raw_ostream &O, const std::string &Banner) const;
    434434 /// to determine just enough information to create an ArchiveMember object
    435435 /// which is then inserted into the Archive object's ilist at the location
    436436 /// given by \p where.
    437 /// @returns true if an error occured, false otherwise
    437 /// @returns true if an error occurred, false otherwise
    438438 /// @brief Add a file to the archive.
    439439 bool addFileBefore(
    440440 const sys::Path& filename, ///< The file to be added
    218218 // RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
    219219 // These nodes take two operands: the normal LHS and RHS to the add. They
    220220 // produce two results: the normal result of the add, and a boolean that
    221 // indicates if an overflow occured (*not* a flag, because it may be stored
    221 // indicates if an overflow occurred (*not* a flag, because it may be stored
    222222 // to memory, etc.). If the type of the boolean is not i1 then the high
    223223 // bits conform to getBooleanContents.
    224224 // These nodes are generated from the llvm.[su]add.with.overflow intrinsics.
    3535 class Function;
    3636
    3737 /// JITCodeEmitter - This class defines two sorts of methods: those for
    38 /// emitting the actual bytes of machine code, and those for emitting auxillary
    38 /// emitting the actual bytes of machine code, and those for emitting auxiliary
    3939 /// structures, such as jump tables, relocations, etc.
    4040 ///
    4141 /// Emission of machine code is complicated by the fact that we don't (in
    3333 class MCSymbol;
    3434
    3535 /// MachineCodeEmitter - This class defines two sorts of methods: those for
    36 /// emitting the actual bytes of machine code, and those for emitting auxillary
    36 /// emitting the actual bytes of machine code, and those for emitting auxiliary
    3737 /// structures, such as jump tables, relocations, etc.
    3838 ///
    3939 /// Emission of machine code is complicated by the fact that we don't (in
    5353 /// allocated for this code buffer.
    5454 uint8_t *BufferBegin, *BufferEnd;
    5555 /// CurBufferPtr - Pointer to the next byte of memory to fill when emitting
    56 /// code. This is guranteed to be in the range [BufferBegin,BufferEnd]. If
    56 /// code. This is guaranteed to be in the range [BufferBegin,BufferEnd]. If
    5757 /// this pointer is at BufferEnd, it will never move due to code emission, and
    5858 /// all code emission requests will be ignored (this is the buffer overflow
    5959 /// condition).
    691691 /// will create a cycle.
    692692 bool WillCreateCycle(SUnit *SU, SUnit *TargetSU);
    693693
    694 /// AddPred - Updates the topological ordering to accomodate an edge
    694 /// AddPred - Updates the topological ordering to accommodate an edge
    695695 /// to be added from SUnit X to SUnit Y.
    696696 void AddPred(SUnit *Y, SUnit *X);
    697697
    698 /// RemovePred - Updates the topological ordering to accomodate an
    698 /// RemovePred - Updates the topological ordering to accommodate an
    699699 /// an edge to be removed from the specified node N from the predecessors
    700700 /// of the current node M.
    701701 void RemovePred(SUnit *M, SUnit *N);
    828828 /// These functions only replace all existing uses. It's possible that as
    829829 /// these replacements are being performed, CSE may cause the From node
    830830 /// to be given new uses. These new uses of From are left in place, and
    831 /// not automatically transfered to To.
    831 /// not automatically transferred to To.
    832832 ///
    833833 void ReplaceAllUsesWith(SDValue From, SDValue Op,
    834834 DAGUpdateListener *UpdateListener = 0);
    257257 }
    258258
    259259 virtual SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo) {
    260 assert(0 && "Tblgen shoudl generate this!");
    260 assert(0 && "Tblgen should generate this!");
    261261 return SDValue();
    262262 }
    263263
    837837
    838838
    839839 /// HandleSDNode - This class is used to form a handle around another node that
    840 /// is persistant and is updated across invocations of replaceAllUsesWith on its
    840 /// is persistent and is updated across invocations of replaceAllUsesWith on its
    841841 /// operand. This node should be directly created by end-users and not added to
    842842 /// the AllNodes list.
    843843 class HandleSDNode : public SDNode {
    9393 ///
    9494 const MCSection *TLSBSSSection; // Defaults to ".tbss".
    9595
    96 /// TLSTLVSection - Section for thread local structure infomation.
    96 /// TLSTLVSection - Section for thread local structure information.
    9797 /// Contains the source code name of the variable, visibility and a pointer
    9898 /// to the initial value (.tdata or .tbss).
    9999 const MCSection *TLSTLVSection; // Defaults to ".tlv".
    184184 /// \param GVsWithCode - Allocating globals with code breaks
    185185 /// freeMachineCodeForFunction and is probably unsafe and bad for performance.
    186186 /// However, we have clients who depend on this behavior, so we must support
    187 /// it. Eventually, when we're willing to break some backwards compatability,
    187 /// it. Eventually, when we're willing to break some backwards compatibility,
    188188 /// this flag should be flipped to false, so that by default
    189189 /// freeMachineCodeForFunction works.
    190190 static ExecutionEngine *create(Module *M,
    1111 //
    1212 // Global variables are constant pointers that refer to hunks of space that are
    1313 // allocated by either the VM, or by the linker in a static compiler. A global
    14 // variable may have an intial value, which is copied into the executables .data
    14 // variable may have an initial value, which is copied into the executables .data
    1515 // area. Global Constants are required to have initializers.
    1616 //
    1717 //===----------------------------------------------------------------------===//
    583583 /// @brief Represent an integer comparison operator.
    584584 class ICmpInst: public CmpInst {
    585585 protected:
    586 /// @brief Clone an indentical ICmpInst
    586 /// @brief Clone an identical ICmpInst
    587587 virtual ICmpInst *clone_impl() const;
    588588 public:
    589589 /// @brief Constructor with insert-before-instruction semantics.
    734734 /// @brief Represents a floating point comparison operator.
    735735 class FCmpInst: public CmpInst {
    736736 protected:
    737 /// @brief Clone an indentical FCmpInst
    737 /// @brief Clone an identical FCmpInst
    738738 virtual FCmpInst *clone_impl() const;
    739739 public:
    740740 /// @brief Constructor with insert-before-instruction semantics.
    3535 /// List of sections in layout order.
    3636 llvm::SmallVector SectionOrder;
    3737
    38 /// The last fragment which was layed out, or 0 if nothing has been layed
    39 /// out. Fragments are always layed out in order, so all fragments with a
    38 /// The last fragment which was laid out, or 0 if nothing has been laid
    39 /// out. Fragments are always laid out in order, so all fragments with a
    4040 /// lower ordinal will be up to date.
    4141 mutable DenseMap LastValidFragment;
    4242
    5757 void Invalidate(MCFragment *F);
    5858
    5959 /// \brief Perform layout for a single fragment, assuming that the previous
    60 /// fragment has already been layed out correctly, and the parent section has
    60 /// fragment has already been laid out correctly, and the parent section has
    6161 /// been initialized.
    6262 void LayoutFragment(MCFragment *Fragment);
    6363
    705705 /// \param DF The fragment the fixup is inside.
    706706 /// \param Target [out] On return, the relocatable expression the fixup
    707707 /// evaluates to.
    708 /// \param Value [out] On return, the value of the fixup as currently layed
    708 /// \param Value [out] On return, the value of the fixup as currently laid
    709709 /// out.
    710710 /// \return Whether the fixup value was fully resolved. This is true if the
    711711 /// \arg Value result is fixed, otherwise the value may change due to
    744744 MCFragment &F, const MCFixup &Fixup);
    745745
    746746 public:
    747 /// Compute the effective fragment size assuming it is layed out at the given
    747 /// Compute the effective fragment size assuming it is laid out at the given
    748748 /// \arg SectionAddress and \arg FragmentOffset.
    749749 uint64_t ComputeFragmentSize(const MCAsmLayout &Layout, const MCFragment &F) const;
    750750
    1212 // Passes are designed this way so that it is possible to run passes in a cache
    1313 // and organizationally optimal order without having to specify it at the front
    1414 // end. This allows arbitrary passes to be strung together and have them
    15 // executed as effeciently as possible.
    15 // executed as efficiently as possible.
    1616 //
    1717 // Passes should extend one of the classes below, depending on the guarantees
    1818 // that it can make about what will be modified as it is run. For example, most
    271271 const void *DestNodeID, int DestNodePort,
    272272 const std::string &Attrs) {
    273273 if (SrcNodePort > 64) return; // Eminating from truncated part?
    274 if (DestNodePort > 64) DestNodePort = 64; // Targetting the truncated part?
    274 if (DestNodePort > 64) DestNodePort = 64; // Targeting the truncated part?
    275275
    276276 O << "\tNode" << SrcNodeID;
    277277 if (SrcNodePort >= 0)
    1919 class raw_ostream;
    2020
    2121 /// DisablePrettyStackTrace - Set this to true to disable this module. This
    22 /// might be neccessary if the host application installs its own signal
    22 /// might be necessary if the host application installs its own signal
    2323 /// handlers which conflict with the ones installed by this module.
    2424 /// Defaults to false.
    2525 extern bool DisablePrettyStackTrace;
    101101 );
    102102
    103103 /// This function terminates the program.
    104 /// @returns true if an error occured.
    104 /// @returns true if an error occurred.
    105105 /// @see Execute
    106106 /// @brief Terminates the program.
    107107 bool Kill
    5252
    5353 /// matches - Match the regex against a given \arg String.
    5454 ///
    55 /// \param Matches - If given, on a succesful match this will be filled in
    55 /// \param Matches - If given, on a successful match this will be filled in
    5656 /// with references to the matched group expressions (inside \arg String),
    5757 /// the first group is always the entire pattern.
    5858 ///
    77 //===----------------------------------------------------------------------===//
    88 //
    99 // This file defines some helpful functions for dealing with the possibility of
    10 // unix signals occuring while your program is running.
    10 // unix signals occurring while your program is running.
    1111 //
    1212 //===----------------------------------------------------------------------===//
    1313
    3434 public:
    3535
    3636 /// A constant TimeValue representing the smallest time
    37 /// value permissable by the class. MinTime is some point
    37 /// value permissible by the class. MinTime is some point
    3838 /// in the distant past, about 300 billion years BCE.
    3939 /// @brief The smallest possible time value.
    4040 static const TimeValue MinTime;
    4141
    4242 /// A constant TimeValue representing the largest time
    43 /// value permissable by the class. MaxTime is some point
    43 /// value permissible by the class. MaxTime is some point
    4444 /// in the distant future, about 300 billion years AD.
    4545 /// @brief The largest possible time value.
    4646 static const TimeValue MaxTime;
    476476 }
    477477
    478478 /// shouldScheduleLoadsNear - This is a used by the pre-regalloc scheduler to
    479 /// determine (in conjuction with areLoadsFromSameBasePtr) if two loads should
    479 /// determine (in conjunction with areLoadsFromSameBasePtr) if two loads should
    480480 /// be scheduled togther. On some targets if two loads are loading from
    481481 /// addresses in the same cache line, it's better if they are scheduled
    482482 /// together. This function takes two integers that represent the load offsets
    10411041 }
    10421042
    10431043 /// JumpIsExpensive - Tells the code generator not to expand sequence of
    1044 /// operations into a seperate sequences that increases the amount of
    1044 /// operations into a separate sequences that increases the amount of
    10451045 /// flow control.
    10461046 void setJumpIsExpensive(bool isExpensive = true) {
    10471047 JumpIsExpensive = isExpensive;
    206206 ///
    207207 /// Note that this only does one level of inlining. For example, if the
    208208 /// instruction 'call B' is inlined, and 'B' calls 'C', then the call to 'C' now
    209 /// exists in the instruction stream. Similiarly this will inline a recursive
    209 /// exists in the instruction stream. Similarly this will inline a recursive
    210210 /// function by one level.
    211211 ///
    212212 bool InlineFunction(CallInst *C, InlineFunctionInfo &IFI);
    132132 /// is refined.
    133133 virtual void refineAbstractType(const DerivedType *OldTy, const Type *NewTy);
    134134
    135 /// This function markes a type as being concrete (defined).
    135 /// This function marks a type as being concrete (defined).
    136136 virtual void typeBecameConcrete(const DerivedType *AbsTy);
    137137
    138138 /// @}
    3030 * the call back in the DisInfo parameter. The instruction containing operand
    3131 * is at the PC parameter. For some instruction sets, there can be more than
    3232 * one operand with symbolic information. To determine the symbolic operand
    33 * infomation for each operand, the bytes for the specific operand in the
    33 * information for each operand, the bytes for the specific operand in the
    3434 * instruction are specified by the Offset parameter and its byte widith is the
    3535 * size parameter. For instructions sets with fixed widths and one symbolic
    3636 * operand per instruction, the Offset parameter will be zero and Size parameter
    108108 * Create a disassembler for the TripleName. Symbolic disassembly is supported
    109109 * by passing a block of information in the DisInfo parameter and specifing the
    110110 * TagType and call back functions as described above. These can all be passed
    111 * as NULL. If successfull this returns a disassembler context if not it
    111 * as NULL. If successful this returns a disassembler context if not it
    112112 * returns NULL.
    113113 */
    114114 extern LLVMDisasmContextRef
    126126
    127127 /**
    128128 * Disassmble a single instruction using the disassembler context specified in
    129 * the parameter DC. The bytes of the instuction are specified in the parameter
    129 * the parameter DC. The bytes of the instruction are specified in the parameter
    130130 * Bytes, and contains at least BytesSize number of bytes. The instruction is
    131131 * at the address specified by the PC parameter. If a valid instruction can be
    132132 * disassembled its string is returned indirectly in OutString which whos size
    7171
    7272
    7373 /**
    74 * Returns the last error string or NULL if last operation was sucessful.
    74 * Returns the last error string or NULL if last operation was successful.
    7575 */
    7676 extern const char*
    7777 lto_get_error_message(void);
    262262
    263263 /**
    264264 * Generates code for all added modules into one native object file.
    265 * On sucess returns a pointer to a generated mach-o/ELF buffer and
    265 * On success returns a pointer to a generated mach-o/ELF buffer and
    266266 * length set to the buffer size. The buffer is owned by the
    267267 * lto_code_gen_t and will be freed when lto_codegen_dispose()
    268268 * is called, or lto_codegen_compile() is called again.
    349349 Scale *= IndexScale.getSExtValue();
    350350
    351351
    352 // If we already had an occurrance of this index variable, merge this
    352 // If we already had an occurrence of this index variable, merge this
    353353 // scale into it. For example, we want to handle:
    354354 // A[x][x] -> x*16 + x*4 -> x*20
    355355 // This also ensures that 'x' only appears in the index list once.
    882882 if (GEP1BaseOffset == 0 && GEP1VariableIndices.empty())
    883883 return MustAlias;
    884884
    885 // If there is a difference betwen the pointers, but the difference is
    885 // If there is a difference between the pointers, but the difference is
    886886 // less than the size of the associated memory object, then we know
    887887 // that the objects are partially overlapping.
    888888 if (GEP1BaseOffset != 0 && GEP1VariableIndices.empty()) {
    601601 // For the purposes of this analysis, it is conservatively correct to treat
    602602 // a newly escaping value equivalently to a deleted one. We could perhaps
    603603 // be more precise by processing the new use and attempting to update our
    604 // saved analysis results to accomodate it.
    604 // saved analysis results to accommodate it.
    605605 deleteValue(U);
    606606
    607607 AliasAnalysis::addEscapingUse(U);
    500500 return InlineCost::getAlways();
    501501
    502502 if (CalleeFI->Metrics.usesDynamicAlloca) {
    503 // Get infomation about the caller.
    503 // Get information about the caller.
    504504 FunctionInfo &CallerFI = CachedFunctionInfo[Caller];
    505505
    506506 // If we haven't calculated this information yet, do so now.
    548548
    549549 int Cost = 0;
    550550
    551 // Look at the orginal size of the callee. Each instruction counts as 5.
    551 // Look at the original size of the callee. Each instruction counts as 5.
    552552 Cost += CalleeFI->Metrics.NumInsts * InlineConstants::InstrCost;
    553553
    554554 // Offset that with the amount of code that can be constant-folded
    285285 BallLarusEdge* exitEdge = addEdge(node, getExit(), 0);
    286286 exitEdge->setType(BallLarusEdge::SPLITEDGE_PHONY);
    287287
    288 // Counters to handle the possibilty of a multi-graph
    288 // Counters to handle the possibility of a multi-graph
    289289 BasicBlock* oldTarget = 0;
    290290 unsigned duplicateNumber = 0;
    291291
    123123 ProfilePathEdgeVector* pev = currentPath->getPathEdges();
    124124 DEBUG(dbgs () << "path #" << currentPath->getNumber() << ": "
    125125 << currentPath->getCount() << "\n");
    126 // setup the entry edge (normally path profiling doens't care about this)
    126 // setup the entry edge (normally path profiling doesn't care about this)
    127127 if (currentPath->getFirstBlockInPath() == &F->getEntryBlock())
    128128 edgeArray[arrayMap[0][currentPath->getFirstBlockInPath()][0]]
    129129 += currentPath->getCount();
    139139 // loop, thus the edge is a backedge, continue and do not check if the
    140140 // value is valid.
    141141 if (BBisHeader && BBLoop->contains(*bbi)) {
    142 printEdgeError(edge, "but is backedge, continueing");
    142 printEdgeError(edge, "but is backedge, continuing");
    143143 continue;
    144144 }
    145145 // If the edges value is missing (and this is no loop header, and this is
    308308 removeEdge(oldedge);
    309309 }
    310310
    311 /// Replaces all occurences of RmBB in the ProfilingInfo with DestBB.
    311 /// Replaces all occurrences of RmBB in the ProfilingInfo with DestBB.
    312312 /// This checks all edges of the function the blocks reside in and replaces the
    313 /// occurences of RmBB with DestBB.
    313 /// occurrences of RmBB with DestBB.
    314314 template<>
    315315 void ProfileInfoT::
    316316 replaceAllUses(const BasicBlock *RmBB, const BasicBlock *DestBB) {
    811811 }
    812812 if (iw < 0) continue;
    813813
    814 // Check the recieving end of the path if it can handle the flow.
    814 // Check the receiving end of the path if it can handle the flow.
    815815 double ow = getExecutionCount(Dest);
    816816 Processed.clear();
    817817 for (succ_const_iterator NBB = succ_begin(BB), End = succ_end(BB);
    18811881 // outer mul and the inner addrec are guaranteed to have no overflow.
    18821882 //
    18831883 // No self-wrap cannot be guaranteed after changing the step size, but
    1884 // will be infered if either NUW or NSW is true.
    1884 // will be inferred if either NUW or NSW is true.
    18851885 Flags = AddRec->getNoWrapFlags(clearFlags(Flags, SCEV::FlagNW));
    18861886 const SCEV *NewRec = getAddRecExpr(NewOps, AddRecLoop, Flags);
    18871887
    3030 //
    3131 // The second field identifies the type's parent node in the tree, or
    3232 // is null or omitted for a root node. A type is considered to alias
    33 // all of its decendents and all of its ancestors in the tree. Also,
    33 // all of its descendants and all of its ancestors in the tree. Also,
    3434 // a type is considered to alias all types in other trees, so that
    3535 // bitcode produced from multiple front-ends is handled conservatively.
    3636 //
    13271327 break;
    13281328 }
    13291329 }
    1330 // If we succesfully found a value for each of our subaggregates
    1330 // If we successfully found a value for each of our subaggregates
    13311331 if (To)
    13321332 return To;
    13331333 }
    17561756 } else {
    17571757 // See if InstructionSimplify knows any relevant tricks.
    17581758 if (Instruction *I = dyn_cast(V))
    1759 // TODO: Aquire a DominatorTree and use it.
    1759 // TODO: Acquire a DominatorTree and use it.
    17601760 if (Value *Simplified = SimplifyInstruction(I, TD, 0)) {
    17611761 V = Simplified;
    17621762 continue;
    362362 // Initializers for globals are handled explicitly elsewhere.
    363363 } else if (isa(C) && cast(C)->isString()) {
    364364 // Do not enumerate the initializers for an array of simple characters.
    365 // The initializers just polute the value table, and we emit the strings
    365 // The initializers just pollute the value table, and we emit the strings
    366366 // specially.
    367367 } else if (C->getNumOperands()) {
    368368 // If a constant has operands, enumerate them. This makes sure that if a
    356356 RegRefs = State->GetRegRefs();
    357357
    358358 // Handle dead defs by simulating a last-use of the register just
    359 // after the def. A dead def can occur because the def is truely
    359 // after the def. A dead def can occur because the def is truly
    360360 // dead, or because only a subregister is live at the def. If we
    361361 // don't do this the dead def will be incorrectly merged into the
    362362 // previous def.
    5252 cl::desc("Disable debug info printing"));
    5353
    5454 static cl::opt UnknownLocations("use-unknown-locations", cl::Hidden,
    55 cl::desc("Make an absense of debug location information explicit."),
    55 cl::desc("Make an absence of debug location information explicit."),
    5656 cl::init(false));
    5757
    5858 #ifndef NDEBUG
    14211421
    14221422 if (HI + 1 == HE)
    14231423 // If Begin is the last instruction in History then its value is valid
    1424 // until the end of the funtion.
    1424 // until the end of the function.
    14251425 SLabel = FunctionEndSym;
    14261426 else {
    14271427 const MachineInstr *End = HI[1];
    253253
    254254 // Determine a position to move orphaned loop blocks to. If TopMBB is not
    255255 // entered via fallthrough and BotMBB is exited via fallthrough, prepend them
    256 // to the top of the loop to avoid loosing that fallthrough. Otherwise append
    256 // to the top of the loop to avoid losing that fallthrough. Otherwise append
    257257 // them to the bottom, even if it previously had a fallthrough, on the theory
    258258 // that it's worth an extra branch to keep the loop contiguous.
    259259 MachineFunction::iterator InsertPt =
    172172 unsigned Offset; // sh_offset - Offset from the file start
    173173 unsigned Size; // sh_size - The section size.
    174174 unsigned Link; // sh_link - Section header table index link.
    175 unsigned Info; // sh_info - Auxillary information.
    175 unsigned Info; // sh_info - Auxiliary information.
    176176 unsigned Align; // sh_addralign - Alignment of section.
    177177 unsigned EntSize; // sh_entsize - Size of entries in the section e
    178178
    7676 // Create the object code emitter object for this target.
    7777 ElfCE = new ELFCodeEmitter(*this);
    7878
    79 // Inital number of sections
    79 // Initial number of sections
    8080 NumSections = 0;
    8181 }
    8282
    66 //
    77 //===----------------------------------------------------------------------===//
    88 //
    9 // Expand Psuedo-instructions produced by ISel. These are usually to allow
    9 // Expand Pseudo-instructions produced by ISel. These are usually to allow
    1010 // the expansion to contain control flow, such as a conditional move
    1111 // implemented with a conditional branch and a phi, or an atomic operation
    1212 // implemented with a loop.
    289289 /// mapVirtReg - Map virtual register to an equivalence class.
    290290 void mapVirtReg(unsigned VirtReg, UserValue *EC);
    291291
    292 /// renameRegister - Replace all references to OldReg wiht NewReg:SubIdx.
    292 /// renameRegister - Replace all references to OldReg with NewReg:SubIdx.
    293293 void renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx);
    294294
    295295 /// emitDebugVariables - Recreate DBG_VALUE instruction from data structures.
    15061506 // ...
    15071507 // def = ...
    15081508 // = use
    1509 // It's better to start a new interval to avoid artifically
    1509 // It's better to start a new interval to avoid artificially
    15101510 // extend the new interval.
    15111511 if (MI->readsWritesVirtualRegister(li.reg) ==
    15121512 std::make_pair(false,true)) {
    336336 --BeforeI;
    337337
    338338 // Restore all registers immediately before the return and any
    339 // terminators that preceed it.
    339 // terminators that precede it.
    340340 if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
    341341 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
    342342 unsigned Reg = CSI[i].getReg();
    436436 --BeforeI;
    437437
    438438 // Restore all registers immediately before the return and any
    439 // terminators that preceed it.
    439 // terminators that precede it.
    440440 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
    441441 unsigned Reg = blockCSI[i].getReg();
    442442 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
    2525 sxth r3, r3
    2626 mla r4, r3, lr, r4
    2727
    28 It also increase the likelyhood the store may become dead.
    28 It also increase the likelihood the store may become dead.
    2929
    3030 //===---------------------------------------------------------------------===//
    3131
    161161
    162162 //===---------------------------------------------------------------------===//
    163163
    164 Stack coloring improvments:
    164 Stack coloring improvements:
    165165
    166166 1. Do proper LiveStackAnalysis on all stack objects including those which are
    167167 not spill slots.
    791791 // register class we are trying to allocate. Then add the weight to all
    792792 // sub-registers of the super-register even if they are not aliases.
    793793 // e.g. allocating for GR32, bh is not used, updating bl spill weight.
    794 // bl should get the same spill weight otherwise it will be choosen
    794 // bl should get the same spill weight otherwise it will be chosen
    795795 // as a spill candidate since spilling bh doesn't make ebx available.
    796796 for (unsigned i = 0, e = Supers.size(); i != e; ++i) {
    797797 for (const unsigned *sr = tri_->getSubRegisters(Supers[i]); *sr; ++sr)
    4646
    4747 static cl::opt
    4848 machineFuncsToRender("rmf-funcs",
    49 cl::desc("Coma seperated list of functions to render"
    49 cl::desc("Comma separated list of functions to render"
    5050 ", or \"*\"."),
    5151 cl::init(""), cl::Hidden);
    5252
    471471 #endif
    472472 }
    473473
    474 /// AddPred - Updates the topological ordering to accomodate an edge
    474 /// AddPred - Updates the topological ordering to accommodate an edge
    475475 /// to be added from SUnit X to SUnit Y.
    476476 void ScheduleDAGTopologicalSort::AddPred(SUnit *Y, SUnit *X) {
    477477 int UpperBound, LowerBound;
    489489 }
    490490 }
    491491
    492 /// RemovePred - Updates the topological ordering to accomodate an
    492 /// RemovePred - Updates the topological ordering to accommodate an
    493493 /// an edge to be removed from the specified node N from the predecessors
    494494 /// of the current node M.
    495495 void ScheduleDAGTopologicalSort::RemovePred(SUnit *M, SUnit *N) {
    370370 // will be overlapped by work done outside the current
    371371 // scheduling region.
    372372 Latency -= std::min(Latency, Count);
    373 // Add the artifical edge.
    373 // Add the artificial edge.
    374374 ExitSU.addPred(SDep(SU, SDep::Order, Latency,
    375375 /*Reg=*/0, /*isNormalMemory=*/false,
    376376 /*isMustAlias=*/false,
    12381238 // Only handle legal types. Two interesting things to note here. First,
    12391239 // by bailing out early, we may leave behind some dead instructions,
    12401240 // since SelectionDAG's HandlePHINodesInSuccessorBlocks will insert its
    1241 // own moves. Second, this check is necessary becuase FastISel doesn't
    1241 // own moves. Second, this check is necessary because FastISel doesn't
    12421242 // use CreateRegs to create registers, so it always creates
    12431243 // exactly one register for each non-void instruction.
    12441244 EVT VT = TLI.getValueType(PN->getType(), /*AllowUnknown=*/true);
    28772877 }
    28782878 case ISD::FP_ROUND_INREG: {
    28792879 // The only way we can lower this is to turn it into a TRUNCSTORE,
    2880 // EXTLOAD pair, targetting a temporary location (a stack slot).
    2880 // EXTLOAD pair, targeting a temporary location (a stack slot).
    28812881
    28822882 // NOTE: there is a choice here between constantly creating new stack
    28832883 // slots and always reusing the same one. We currently always create
    616616 };
    617617 }
    618618
    619 /// ProcessSDDbgValues - Process SDDbgValues assoicated with this node.
    619 /// ProcessSDDbgValues - Process SDDbgValues associated with this node.
    620620 static void ProcessSDDbgValues(SDNode *N, SelectionDAG *DAG,
    621621 InstrEmitter &Emitter,
    622622 SmallVector, 32> &Orders,
    61966196
    61976197 // For a function returning void, there is no return value. We can't create
    61986198 // such a node, so we just return a null return value in that case. In
    6199 // that case, nothing will actualy look at the value.
    6199 // that case, nothing will actually look at the value.
    62006200 if (ReturnValues.empty())
    62016201 return std::make_pair(SDValue(), Chain);
    62026202
    64126412 SDB->setValue(I, Res);
    64136413
    64146414 // If this argument is live outside of the entry block, insert a copy from
    6415 // whereever we got it to the vreg that other BB's will reference it as.
    6415 // wherever we got it to the vreg that other BB's will reference it as.
    64166416 SDB->CopyToExportRegsIfNeeded(I);
    64176417 }
    64186418 }
    18581858 case ISD::SETTRUE2: return DAG.getConstant(1, VT);
    18591859 }
    18601860
    1861 if (isa(N0.getNode())) {
    1862 // Ensure that the constant occurs on the RHS, and fold constant
    1863 // comparisons.
    1861 // Ensure that the constant occurs on the RHS, and fold constant
    1862 // comparisons.
    1863 if (isa(N0.getNode()))
    18641864 return DAG.getSetCC(dl, VT, N1, N0, ISD::getSetCCSwappedOperands(Cond));
    1865 }
    1866
    1865
    18671866 if (ConstantSDNode *N1C = dyn_cast(N1.getNode())) {
    18681867 const APInt &C1 = N1C->getAPIntValue();
    18691868
    276276 // Initialize data flow sets.
    277277 clearAnticAvailSets();
    278278
    279 // Calulate Antic{In,Out} and Avail{In,Out} iteratively on the MCFG.
    279 // Calculate Antic{In,Out} and Avail{In,Out} iteratively on the MCFG.
    280280 bool changed = true;
    281281 unsigned iterations = 0;
    282282 while (changed) {
    586586 }
    587587
    588588 // We now walk the PHIs in successor blocks and check for interferences. This
    589 // is necesary because the use of a PHI's operands are logically contained in
    589 // is necessary because the use of a PHI's operands are logically contained in
    590590 // the predecessor block. The def of a PHI's destination register is processed
    591591 // along with the other defs in a basic block.
    592592
    3131 STATISTIC(NumDRM , "Number of re-materializable defs elided");
    3232 STATISTIC(NumStores , "Number of stores added");
    3333 STATISTIC(NumPSpills , "Number of physical register spills");
    34 STATISTIC(NumOmitted , "Number of reloads omited");
    34 STATISTIC(NumOmitted , "Number of reloads omitted");
    3535 STATISTIC(NumAvoided , "Number of reloads deemed unnecessary");
    3636 STATISTIC(NumCopified, "Number of available reloads turned into copies");
    3737 STATISTIC(NumReMats , "Number of re-materialization");
    668668 }
    669669 }
    670670
    671 /// ReMaterialize - Re-materialize definition for Reg targetting DestReg.
    671 /// ReMaterialize - Re-materialize definition for Reg targeting DestReg.
    672672 ///
    673673 static void ReMaterialize(MachineBasicBlock &MBB,
    674674 MachineBasicBlock::iterator &MII,
    665665 }
    666666
    667667 /// getPointerToFunction - This method is used to get the address of the
    668 /// specified function, compiling it if neccesary.
    668 /// specified function, compiling it if necessary.
    669669 ///
    670670 void *JIT::getPointerToFunction(Function *F) {
    671671
    3535 // disassembly is supported by passing a block of information in the DisInfo
    3636 // parameter and specifing the TagType and call back functions as described in
    3737 // the header llvm-c/Disassembler.h . The pointer to the block and the
    38 // functions can all be passed as NULL. If successfull this returns a
    38 // functions can all be passed as NULL. If successful this returns a
    3939 // disassembler context if not it returns NULL.
    4040 //
    4141 LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
    388388 // (LHS_A - RHS_B),
    389389 // (RHS_A - LHS_B),
    390390 // (RHS_A - RHS_B).
    391 // Since we are attempting to be as aggresive as possible about folding, we
    391 // Since we are attempting to be as aggressive as possible about folding, we
    392392 // attempt to evaluate each possible alternative.
    393393 AttemptToFoldSymbolOffsetDifference(Asm, Layout, Addrs, InSet, LHS_A, LHS_B,
    394394 Result_Cst);
    439439 // Compensate for the relocation offset, Darwin x86_64 relocations only
    440440 // have the addend and appear to have attempted to define it to be the
    441441 // actual expression addend without the PCrel bias. However, instructions
    442 // with data following the relocation are not accomodated for (see comment
    442 // with data following the relocation are not accommodated for (see comment
    443443 // below regarding SIGNED{1,2,4}), so it isn't exactly that either.
    444444 Value += 1LL << Log2Size;
    445445 }
    540540 }
    541541
    542542 // x86_64 almost always uses external relocations, except when there is no
    543 // symbol to use as a base address (a local symbol with no preceeding
    543 // symbol to use as a base address (a local symbol with no preceding
    544544 // non-local symbol).
    545545 if (Base) {
    546546 Index = Base->getIndex();
    35633563 }
    35643564
    35653565 bool APFloat::getExactInverse(APFloat *inv) const {
    3566 // We can only guarantee the existance of an exact inverse for IEEE floats.
    3566 // We can only guarantee the existence of an exact inverse for IEEE floats.
    35673567 if (semantics != &IEEEhalf && semantics != &IEEEsingle &&
    35683568 semantics != &IEEEdouble && semantics != &IEEEquad)
    35693569 return false;
    15171517 /// Requires that the divisor not be 0. Taken from "Hacker's Delight", Henry
    15181518 /// S. Warren, Jr., chapter 10.
    15191519 /// LeadingZeros can be used to simplify the calculation if the upper bits
    1520 /// of the devided value are known zero.
    1520 /// of the divided value are known zero.
    15211521 APInt::mu APInt::magicu(unsigned LeadingZeros) const {
    15221522 const APInt& d = *this;
    15231523 unsigned p;
    197197 return 1;
    198198 }
    199199
    200 // Now its safe to mmap the files into memory becasue both files
    200 // Now its safe to mmap the files into memory because both files
    201201 // have a non-zero size.
    202202 error_code ec;
    203203 OwningPtr F1;
    77 //===----------------------------------------------------------------------===//
    88 //
    99 // This file defines some helpful functions for dealing with the possibility of
    10 // Unix signals occuring while your program is running.
    10 // Unix signals occurring while your program is running.
    1111 //
    1212 //===----------------------------------------------------------------------===//
    1313
    77 //===----------------------------------------------------------------------===//
    88 //
    99 // This file defines some helpful functions for dealing with the possibility of
    10 // Unix signals occuring while your program is running.
    10 // Unix signals occurring while your program is running.
    1111 //
    1212 //===----------------------------------------------------------------------===//
    1313
    130130
    131131 /// find - Search for the first string \arg Str in the string.
    132132 ///
    133 /// \return - The index of the first occurence of \arg Str, or npos if not
    133 /// \return - The index of the first occurrence of \arg Str, or npos if not
    134134 /// found.
    135135 size_t StringRef::find(StringRef Str, size_t From) const {
    136136 size_t N = Str.size();
    144144
    145145 /// rfind - Search for the last string \arg Str in the string.
    146146 ///
    147 /// \return - The index of the last occurence of \arg Str, or npos if not
    147 /// \return - The index of the last occurrence of \arg Str, or npos if not
    148148 /// found.
    149149 size_t StringRef::rfind(StringRef Str) const {
    150150 size_t N = Str.size();
    235235 // Create a child process.
    236236 int child = fork();
    237237 switch (child) {
    238 // An error occured: Return to the caller.
    238 // An error occurred: Return to the caller.
    239239 case -1:
    240240 MakeErrMsg(ErrMsg, "Couldn't fork");
    241241 return false;
    77 //===----------------------------------------------------------------------===//
    88 //
    99 // This file defines some helpful functions for dealing with the possibility of
    10 // Unix signals occuring while your program is running.
    10 // Unix signals occurring while your program is running.
    1111 //
    1212 //===----------------------------------------------------------------------===//
    1313
    17071707 return;
    17081708 }
    17091709 // Tail jump branches are really just branch instructions with additional
    1710 // code-gen attributes. Convert them to the cannonical form here.
    1710 // code-gen attributes. Convert them to the canonical form here.
    17111711 case ARM::TAILJMPd:
    17121712 case ARM::TAILJMPdND: {
    17131713 MCInst TmpInst, TmpInst2;
    12001200 }
    12011201
    12021202 /// shouldScheduleLoadsNear - This is a used by the pre-regalloc scheduler to
    1203 /// determine (in conjuction with areLoadsFromSameBasePtr) if two loads should
    1203 /// determine (in conjunction with areLoadsFromSameBasePtr) if two loads should
    12041204 /// be scheduled togther. On some targets if two loads are loading from
    12051205 /// addresses in the same cache line, it's better if they are scheduled
    12061206 /// together. This function takes two integers that represent the load offsets
    290290 int64_t &Offset1, int64_t &Offset2)const;
    291291
    292292 /// shouldScheduleLoadsNear - This is a used by the pre-regalloc scheduler to
    293 /// determine (in conjuction with areLoadsFromSameBasePtr) if two loads should
    293 /// determine (in conjunction with areLoadsFromSameBasePtr) if two loads should
    294294 /// be scheduled togther. On some targets if two loads are loading from
    295295 /// addresses in the same cache line, it's better if they are scheduled
    296296 /// together. This function takes two integers that represent the load offsets
    8787 getReservedRegs(const MachineFunction &MF) const {
    8888 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
    8989
    90 // FIXME: avoid re-calculating this everytime.
    90 // FIXME: avoid re-calculating this every time.
    9191 BitVector Reserved(getNumRegs());
    9292 Reserved.set(ARM::SP);
    9393 Reserved.set(ARM::PC);
    724724 // pressure of the register class's representative and all of it's super
    725725 // classes' representatives transitively. We have not implemented this because
    726726 // of the difficulty prior to coalescing of modeling operand register classes
    727 // due to the common occurence of cross class copies and subregister insertions
    727 // due to the common occurrence of cross class copies and subregister insertions
    728728 // and extractions.
    729729 std::pair
    730730 ARMTargetLowering::findRepresentativeClass(EVT VT) const{
    13221322 // than necessary, because it means that each store effectively depends
    13231323 // on every argument instead of just those arguments it would clobber.
    13241324
    1325 // Do not flag preceeding copytoreg stuff together with the following stuff.
    1325 // Do not flag preceding copytoreg stuff together with the following stuff.
    13261326 InFlag = SDValue();
    13271327 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
    13281328 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
    36893689 // here, and we're using the stack frame for the containing function to
    36903690 // save/restore registers, we can't keep anything live in regs across
    36913691 // the eh_sjlj_setjmp(), else it will almost certainly have been tromped upon
    3692 // when we get here from a longjmp(). We force everthing out of registers
    3692 // when we get here from a longjmp(). We force everything out of registers
    36933693 // except for our own input by listing the relevant registers in Defs. By
    36943694 // doing so, we also cause the prologue/epilogue code to actively preserve
    36953695 // all of the callee-saved resgisters, which is exactly what we want.
    14381438 // from some other function to get here, and we're using the stack frame for the
    14391439 // containing function to save/restore registers, we can't keep anything live in
    14401440 // regs across the eh_sjlj_setjmp(), else it will almost certainly have been
    1441 // tromped upon when we get here from a longjmp(). We force everthing out of
    1441 // tromped upon when we get here from a longjmp(). We force everything out of
    14421442 // registers except for our own input by listing the relevant registers in
    14431443 // Defs. By doing so, we also cause the prologue/epilogue code to actively
    14441444 // preserve all of the callee-saved resgisters, which is exactly what we want.
    29642964 // here, and we're using the stack frame for the containing function to
    29652965 // save/restore registers, we can't keep anything live in regs across
    29662966 // the eh_sjlj_setjmp(), else it will almost certainly have been tromped upon
    2967 // when we get here from a longjmp(). We force everthing out of registers
    2967 // when we get here from a longjmp(). We force everything out of registers
    29682968 // except for our own input by listing the relevant registers in Defs. By
    29692969 // doing so, we also cause the prologue/epilogue code to actively preserve
    29702970 // all of the callee-saved resgisters, which is exactly what we want.
    12861286 MergeLDR_STR(MBB, 0, CurrBase, CurrOpc, CurrSize,
    12871287 CurrPred, CurrPredReg, Scratch, MemOps, Merges);
    12881288
    1289 // Try folding preceeding/trailing base inc/dec into the generated
    1289 // Try folding preceding/trailing base inc/dec into the generated
    12901290 // LDM/STM ops.
    12911291 for (unsigned i = 0, e = Merges.size(); i < e; ++i)
    12921292 if (MergeBaseUpdateLSMultiple(MBB, Merges[i], Advance, MBBI))
    12931293 ++NumMerges;
    12941294 NumMerges += Merges.size();
    12951295
    1296 // Try folding preceeding/trailing base inc/dec into those load/store
    1296 // Try folding preceding/trailing base inc/dec into those load/store
    12971297 // that were not merged to form LDM/STM ops.
    12981298 for (unsigned i = 0; i != NumMemOps; ++i)
    12991299 if (!MemOps[i].Merged)
    13031303 // RS may be pointing to an instruction that's deleted.
    13041304 RS->skipTo(prior(MBBI));
    13051305 } else if (NumMemOps == 1) {
    1306 // Try folding preceeding/trailing base inc/dec into the single
    1306 // Try folding preceding/trailing base inc/dec into the single
    13071307 // load/store.
    13081308 if (MergeBaseUpdateLoadStore(MBB, MemOps[0].MBBI, TII, Advance, MBBI)) {
    13091309 ++NumMerges;
    13331333 }
    13341334
    13351335 /// MergeReturnIntoLDM - If this is a exit BB, try merging the return ops
    1336 /// ("bx lr" and "mov pc, lr") into the preceeding stack restore so it
    1336 /// ("bx lr" and "mov pc, lr") into the preceding stack restore so it
    13371337 /// directly restore the value of LR into pc.
    13381338 /// ldmfd sp!, {..., lr}
    13391339 /// bx lr
    3434 // This requires 4-byte alignment.
    3535 if ((Align & 3) != 0)
    3636 return SDValue();
    37 // This requires the copy size to be a constant, preferrably
    37 // This requires the copy size to be a constant, preferably
    3838 // within a subtarget-specific limit.
    3939 ConstantSDNode *ConstantSize = dyn_cast(Size);
    4040 if (!ConstantSize)
    2020 //===----------------------------------------------------------------------===//
    2121
    2222 def FeatureCIX : SubtargetFeature<"cix", "HasCT", "true",
    23 "Enable CIX extentions">;
    23 "Enable CIX extensions">;
    2424
    2525 //===----------------------------------------------------------------------===//
    2626 // Register File Description
    295295
    296296 // Build a sequence of copy-to-reg nodes chained together with token chain and
    297297 // flag operands which copy the outgoing args into registers. The InFlag in
    298 // necessary since all emited instructions must be stuck together.
    298 // necessary since all emitted instructions must be stuck together.
    299299 SDValue InFlag;
    300300 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
    301301 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
    10291029 //WMB Mfc 18.4400 Write memory barrier
    10301030 //MF_FPCR F-P 17.025 Move from FPCR
    10311031 //MT_FPCR F-P 17.024 Move to FPCR
    1032 //There are in the Multimedia extentions, so let's not use them yet
    1032 //There are in the Multimedia extensions, so let's not use them yet
    10331033 //def MAXSB8 : OForm<0x1C, 0x3E, "MAXSB8 $RA,$RB,$RC">; //Vector signed byte maximum
    10341034 //def MAXSW4 : OForm< 0x1C, 0x3F, "MAXSW4 $RA,$RB,$RC">; //Vector signed word maximum
    10351035 //def MAXUB8 : OForm<0x1C, 0x3C, "MAXUB8 $RA,$RB,$RC">; //Vector unsigned byte maximum
    3232 (MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
    3333 PKWB, UNPKBW pack/unpack word to byte
    3434 PKLB UNPKBL pack/unpack long to byte
    35 PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))
    35 PERR pixel error (sum across bytes of bytewise abs(i8v8 a - i8v8 b))
    3636
    37 cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)
    37 cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extensions)
    3838
    3939 this has some good examples for other operations that can be synthesised well
    4040 from these rather meager vector ops (such as saturating add).
    344344
    345345 // Build a sequence of copy-to-reg nodes chained together with token
    346346 // chain and flag operands which copy the outgoing args into registers.
    347 // The InFlag in necessary since all emited instructions must be
    347 // The InFlag in necessary since all emitted instructions must be
    348348 // stuck together.
    349349 SDValue InFlag;
    350350 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
    2323 // 5. The code sequences for r64 and v2i64 are probably overly conservative,
    2424 // compared to the code that gcc produces.
    2525 //
    26 // M00$E B!tes Kan be Pretty N@sTi!!!!! (appologies to Monty!)
    26 // M00$E B!tes Kan be Pretty N@sTi!!!!! (apologies to Monty!)
    2727 //-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~
    2828
    2929 // selb instruction definition for i64. Note that the selection mask is
    704704 offset
    705705 ));
    706706
    707 // Shift the low similarily
    707 // Shift the low similarly
    708708 // TODO: add SPUISD::SHL_BYTES
    709709 low = DAG.getNode(SPUISD::SHL_BYTES, dl, MVT::i128, low, offset );
    710710
    273273 F->insert(It, loop);
    274274 F->insert(It, finish);
    275275
    276 // Update machine-CFG edges by transfering adding all successors and
    276 // Update machine-CFG edges by transferring adding all successors and
    277277 // remaining instructions from the current block to the new block which
    278278 // will contain the Phi node for the select.
    279279 finish->splice(finish->begin(), MBB,
    455455 F->insert(It, start);
    456456 F->insert(It, exit);
    457457
    458 // Update machine-CFG edges by transfering adding all successors and
    458 // Update machine-CFG edges by transferring adding all successors and
    459459 // remaining instructions from the current block to the new block which
    460460 // will contain the Phi node for the select.
    461461 exit->splice(exit->begin(), MBB, llvm::next(MachineBasicBlock::iterator(MI)),
    777777
    778778 // Build a sequence of copy-to-reg nodes chained together with token
    779779 // chain and flag operands which copy the outgoing args into registers.
    780 // The InFlag in necessary since all emited instructions must be
    780 // The InFlag in necessary since all emitted instructions must be
    781781 // stuck together.
    782782 SDValue InFlag;
    783783 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
    77 //===----------------------------------------------------------------------===//
    88
    99 //===----------------------------------------------------------------------===//
    10 // MBlaze instruction itineraries for the threee stage pipeline.
    10 // MBlaze instruction itineraries for the three stage pipeline.
    1111 //===----------------------------------------------------------------------===//
    1212 def MBlazePipe3Itineraries : ProcessorItineraries<
    1313 [IF,ID,EX], [], [
    514514
    515515 // Build a sequence of copy-to-reg nodes chained together with token chain and
    516516 // flag operands which copy the outgoing args into registers. The InFlag in
    517 // necessary since all emited instructions must be stuck together.
    517 // necessary since all emitted instructions must be stuck together.
    518518 SDValue InFlag;
    519519 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
    520520 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
    8080
    8181 def : Proc<"4ke", [FeatureMips32r2]>;
    8282
    83 // Allegrex is a 32bit subset of r4000, both for interger and fp registers,
    83 // Allegrex is a 32bit subset of r4000, both for integer and fp registers,
    8484 // but much more similar to Mips2 than Mips3. It also contains some of
    8585 // Mips32/Mips32r2 instructions and a custom vector fpu processor.
    8686 def : Proc<"allegrex", [FeatureMips2, FeatureSingleFloat, FeatureEABI,
    284284 if (ATUsed)
    285285 BuildMI(MBB, MBBI, dl, TII.get(Mips::ATMACRO));
    286286
    287 // Save the return address only if the function isnt a leaf one.
    287 // Save the return address only if the function isn't a leaf one.
    288288 // sw $ra, stack_loc($sp)
    289289 if (MFI->adjustsStack()) {
    290290 ATUsed = expandRegLargeImmPair(Mips::SP, RAOffset, NewReg, NewImm, MBB,
    359359 BuildMI(MBB, MBBI, dl, TII.get(Mips::ATMACRO));
    360360 }
    361361
    362 // Restore the return address only if the function isnt a leaf one.
    362 // Restore the return address only if the function isn't a leaf one.
    363363 // lw $ra, stack_loc($sp)
    364364 if (MFI->adjustsStack()) {
    365365 ATUsed = expandRegLargeImmPair(Mips::SP, RAOffset, NewReg, NewImm, MBB,
    722722
    723723 SDValue CondRes = CreateFPCmp(DAG, Op.getOperand(1));
    724724
    725 // Return if flag is not set by a floating point comparision.
    725 // Return if flag is not set by a floating point comparison.
    726726 if (CondRes.getOpcode() != MipsISD::FPCmp)
    727727 return Op;
    728728
    740740 {
    741741 SDValue Cond = CreateFPCmp(DAG, Op.getOperand(0));
    742742
    743 // Return if flag is not set by a floating point comparision.
    743 // Return if flag is not set by a floating point comparison.
    744744 if (Cond.getOpcode() != MipsISD::FPCmp)
    745745 return Op;
    746746
    866866
    867867 // gp_rel relocation
    868868 // FIXME: we should reference the constant pool using small data sections,
    869 // but the asm printer currently doens't support this feature without
    869 // but the asm printer currently doesn't support this feature without
    870870 // hacking it. This feature should come soon so we can uncomment the
    871871 // stuff below.
    872872 //if (IsInSmallSection(C->getType())) {
    11881188
    11891189 // Build a sequence of copy-to-reg nodes chained together with token
    11901190 // chain and flag operands which copy the outgoing args into registers.
    1191 // The InFlag in necessary since all emited instructions must be
    1191 // The InFlag in necessary since all emitted instructions must be
    11921192 // stuck together.
    11931193 SDValue InFlag;
    11941194 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
    12711271
    12721272 // Create a stack location to hold GP when PIC is used. This stack
    12731273 // location is used on function prologue to save GP and also after all
    1274 // emited CALL's to restore GP.
    1274 // emitted CALL's to restore GP.
    12751275 if (IsPIC) {
    12761276 // Function can have an arbitrary number of calls, so
    12771277 // hold the LastArgStackLoc with the biggest offset.
    186186 "sdc1 $ft, $addr", [(store AFGR64:$ft, addr:$addr)]>;
    187187 }
    188188
    189 // LWC1 and SWC1 can always be emited with odd registers.
    189 // LWC1 and SWC1 can always be emitted with odd registers.
    190190 def LWC1 : FFI<0b110001, (outs FGR32:$ft), (ins mem:$addr), "lwc1 $ft, $addr",
    191191 [(set FGR32:$ft, (load addr:$addr))]>;
    192192 def SWC1 : FFI<0b111001, (outs), (ins FGR32:$ft, mem:$addr), "swc1 $ft, $addr",
    21542154 }
    21552155
    21562156 /// CalculateTailCallSPDiff - Get the amount the stack pointer has to be
    2157 /// adjusted to accomodate the arguments for the tailcall.
    2157 /// adjusted to accommodate the arguments for the tailcall.
    21582158 static int CalculateTailCallSPDiff(SelectionDAG& DAG, bool isTailCall,
    21592159 unsigned ParamSize) {
    21602160
    23952395 // Emit a sequence of copyto/copyfrom virtual registers for arguments that
    23962396 // might overwrite each other in case of tail call optimization.
    23972397 SmallVector MemOpChains2;
    2398 // Do not flag preceeding copytoreg stuff together with the following stuff.
    2398 // Do not flag preceding copytoreg stuff together with the following stuff.
    23992399 InFlag = SDValue();
    24002400 StoreTailCallArgumentsToStackSlot(DAG, Chain, TailCallArguments,
    24012401 MemOpChains2, dl);
    543543
    544544 // Build a sequence of copy-to-reg nodes chained together with token
    545545 // chain and flag operands which copy the outgoing args into registers.
    546 // The InFlag in necessary since all emited instructions must be
    546 // The InFlag in necessary since all emitted instructions must be
    547547 // stuck together.
    548548 SDValue InFlag;
    549549 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
    450450
    451451 // Build a sequence of copy-to-reg nodes chained together with token chain and
    452452 // flag operands which copy the outgoing args into registers. The InFlag in
    453 // necessary since all emited instructions must be stuck together.
    453 // necessary since all emitted instructions must be stuck together.
    454454 SDValue InFlag;
    455455 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
    456456 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
    484484 consumed___ indicates that the byte was already consumed and does not
    485485 need to be consumed again */
    486486
    487 /* The VEX.vvvv field, which contains a thrid register operand for some AVX
    487 /* The VEX.vvvv field, which contains a third register operand for some AVX
    488488 instructions */
    489489 Reg vvvv;
    490490
    3535 cmovb %rcx, %rax
    3636 ret
    3737
    38 Seems like the jb branch has high likelyhood of being taken. It would have
    38 Seems like the jb branch has high likelihood of being taken. It would have
    3939 saved a few instructions.
    4040
    4141 //===---------------------------------------------------------------------===//
    15711571 processors. GCC does two optimizations:
    15721572
    15731573 1. ix86_pad_returns inserts a noop before ret instructions if immediately
    1574 preceeded by a conditional branch or is the target of a jump.
    1574 preceded by a conditional branch or is the target of a jump.
    15751575 2. ix86_avoid_jump_misspredicts inserts noops in cases where a 16-byte block of
    15761576 code contains more than 3 branches.
    15771577
    66 //
    77 //===----------------------------------------------------------------------===//
    88 //
    9 // This is a target description file for the Intel i386 architecture, refered to
    9 // This is a target description file for the Intel i386 architecture, referred to
    1010 // here as the "X86" architecture.
    1111 //
    1212 //===----------------------------------------------------------------------===//
    13061306 // set up by FpSET_ST0, and our StackTop is off by one because of it.
    13071307 unsigned Op0 = getFPReg(MI->getOperand(0));
    13081308 // Restore the actual StackTop from before Fp_SET_ST0.
    1309 // Note we can't handle Fp_SET_ST1 without a preceeding Fp_SET_ST0, and we
    1309 // Note we can't handle Fp_SET_ST1 without a preceding Fp_SET_ST0, and we
    13101310 // are not enforcing the constraint.
    13111311 ++StackTop;
    13121312 unsigned RegOnTop = getStackEntry(0); // This reg must remain in st(0).
    295295 // FIXME: This is dirty hack. The code itself is pretty mess right now.
    296296 // It should be rewritten from scratch and generalized sometimes.
    297297
    298 // Determine maximum offset (minumum due to stack growth).
    298 // Determine maximum offset (minimum due to stack growth).
    299299 int64_t MaxOffset = 0;
    300300 for (std::vector::const_iterator
    301301 I = CSI.begin(), E = CSI.end(); I != E; ++I)
    784784 assert(Offset >= 0 && "Offset should never be negative");
    785785
    786786 if (Offset) {
    787 // Check for possible merge with preceeding ADD instruction.
    787 // Check for possible merge with preceding ADD instruction.
    788788 Offset += mergeSPUpdates(MBB, MBBI, StackPtr, true);
    789789 emitSPUpdate(MBB, MBBI, StackPtr, Offset, Is64Bit, TII, *RegInfo);
    790790 }
    828828 int delta = -1*X86FI->getTCReturnAddrDelta();
    829829 MBBI = MBB.getLastNonDebugInstr();
    830830
    831 // Check for possible merge with preceeding ADD instruction.
    831 // Check for possible merge with preceding ADD instruction.
    832832 delta += mergeSPUpdates(MBB, MBBI, StackPtr, true);
    833833 emitSPUpdate(MBB, MBBI, StackPtr, delta, Is64Bit, TII, *RegInfo);
    834834 }
    19511951 return SDValue(OutRetAddr.getNode(), 1);
    19521952 }
    19531953
    1954 /// EmitTailCallStoreRetAddr - Emit a store of the return adress if tail call
    1954 /// EmitTailCallStoreRetAddr - Emit a store of the return address if tail call
    19551955 /// optimization is performed and it is required (FPDiff!=0).
    19561956 static SDValue
    19571957 EmitTailCallStoreRetAddr(SelectionDAG & DAG, MachineFunction &MF,
    20422042 Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
    20432043
    20442044 SDValue RetAddrFrIdx;
    2045 // Load return adress for tail calls.
    2045 // Load return address for tail calls.
    20462046 if (isTailCall && FPDiff)
    20472047 Chain = EmitTailCallLoadRetAddr(DAG, RetAddrFrIdx, Chain, isTailCall,
    20482048 Is64Bit, FPDiff, dl);
    21992199 SmallVector MemOpChains2;
    22002200 SDValue FIN;
    22012201 int FI = 0;
    2202 // Do not flag preceeding copytoreg stuff together with the following stuff.
    2202 // Do not flag preceding copytoreg stuff together with the following stuff.
    22032203 InFlag = SDValue();
    22042204 if (GuaranteedTailCallOpt) {
    22052205 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
    40174017
    40184018 /// getNumOfConsecutiveZeros - Return the number of elements of a vector
    40194019 /// shuffle operation which come from a consecutively from a zero. The
    4020 /// search can start in two diferent directions, from left or right.
    4020 /// search can start in two different directions, from left or right.
    40214021 static
    40224022 unsigned getNumOfConsecutiveZeros(SDNode *N, int NumElems,
    40234023 bool ZerosFromLeft, SelectionDAG &DAG) {
    1221512215 AsmPieces.clear();
    1221612216 SplitString(AsmStr, AsmPieces, " \t"); // Split with whitespace.
    1221712217
    12218 // FIXME: this should verify that we are targetting a 486 or better. If not,
    12218 // FIXME: this should verify that we are targeting a 486 or better. If not,
    1221912219 // we will turn this bswap into something that will be lowered to logical ops
    1222012220 // instead of emitting the bswap asm. For now, we don't support 486 or lower
    1222112221 // so don't worry about this.
    162162
    163163 } // Defs = [EFLAGS]
    164164
    165 // Suprisingly enough, these are not two address instructions!
    165 // Surprisingly enough, these are not two address instructions!
    166166 let Defs = [EFLAGS] in {
    167167 // Register-Integer Signed Integer Multiply
    168168 def IMUL16rri : Ii16<0x69, MRMSrcReg, // GR16 = GR16*I16
    231231 assert(!RegOp2MemOpTable2Addr.count(RegOp) && "Duplicated entries?");
    232232 RegOp2MemOpTable2Addr[RegOp] = std::make_pair(MemOp, 0U);
    233233
    234 // If this is not a reversable operation (because there is a many->one)
    234 // If this is not a reversible operation (because there is a many->one)
    235235 // mapping, don't insert the reverse of the operation into MemOp2RegOpTable.
    236236 if (OpTbl2Addr[i][1] & TB_NOT_REVERSABLE)
    237237 continue;
    334334 assert(!RegOp2MemOpTable0.count(RegOp) && "Duplicated entries?");
    335335 RegOp2MemOpTable0[RegOp] = std::make_pair(MemOp, Align);
    336336
    337 // If this is not a reversable operation (because there is a many->one)
    337 // If this is not a reversible operation (because there is a many->one)
    338338 // mapping, don't insert the reverse of the operation into MemOp2RegOpTable.
    339339 if (OpTbl0[i][1] & TB_NOT_REVERSABLE)
    340340 continue;
    459459 assert(!RegOp2MemOpTable1.count(RegOp) && "Duplicate entries");
    460460 RegOp2MemOpTable1[RegOp] = std::make_pair(MemOp, Align);
    461461
    462 // If this is not a reversable operation (because there is a many->one)
    462 // If this is not a reversible operation (because there is a many->one)
    463463 // mapping, don't insert the reverse of the operation into MemOp2RegOpTable.
    464464 if (OpTbl1[i][1] & TB_NOT_REVERSABLE)
    465465 continue;
    681681 assert(!RegOp2MemOpTable2.count(RegOp) && "Duplicate entry!");
    682682 RegOp2MemOpTable2[RegOp] = std::make_pair(MemOp, Align);
    683683
    684 // If this is not a reversable operation (because there is a many->one)
    684 // If this is not a reversible operation (because there is a many->one)
    685685 // mapping, don't insert the reverse of the operation into MemOp2RegOpTable.
    686686 if (OpTbl2[i][1] & TB_NOT_REVERSABLE)
    687687 continue;
    806806 int64_t &Offset1, int64_t &Offset2) const;
    807807
    808808 /// shouldScheduleLoadsNear - This is a used by the pre-regalloc scheduler to
    809 /// determine (in conjuction with areLoadsFromSameBasePtr) if two loads should
    809 /// determine (in conjunction with areLoadsFromSameBasePtr) if two loads should
    810810 /// be scheduled togther. On some targets if two loads are loading from
    811811 /// addresses in the same cache line, it's better if they are scheduled
    812812 /// together. This function takes two integers that represent the load offsets
    513513 }
    514514
    515515 // To only check operands before the memory address ones, start
    516 // the search from the begining
    516 // the search from the beginning
    517517 if (IsDestMem)
    518518 CurOp = 0;
    519519
    469469 // FIXME: It's more complicated than this...
    470470 if (0 && requiresRealignment && MFI->hasVarSizedObjects())
    471471 report_fatal_error(
    472 "Stack realignment in presense of dynamic allocas is not supported");
    472 "Stack realignment in presence of dynamic allocas is not supported");
    473473
    474474 // If we've requested that we force align the stack do so now.
    475475 if (ForceStackAlign)
    177177 bool isVolatile, bool AlwaysInline,
    178178 MachinePointerInfo DstPtrInfo,
    179179 MachinePointerInfo SrcPtrInfo) const {
    180 // This requires the copy size to be a constant, preferrably
    180 // This requires the copy size to be a constant, preferably
    181181 // within a subtarget-specific limit.
    182182 ConstantSDNode *ConstantSize = dyn_cast(Size);
    183183 if (!ConstantSize)
    966966
    967967 // Build a sequence of copy-to-reg nodes chained together with token
    968968 // chain and flag operands which copy the outgoing args into registers.
    969 // The InFlag in necessary since all emited instructions must be
    969 // The InFlag in necessary since all emitted instructions must be
    970970 // stuck together.
    971971 SDValue InFlag;
    972972 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
    770770 // function empty.
    771771 NF->getBasicBlockList().splice(NF->begin(), F->getBasicBlockList());
    772772
    773 // Loop over the argument list, transfering uses of the old arguments over to
    774 // the new arguments, also transfering over the names as well.
    773 // Loop over the argument list, transferring uses of the old arguments over to
    774 // the new arguments, also transferring over the names as well.
    775775 //
    776776 for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end(),
    777777 I2 = NF->arg_begin(); I != E; ++I) {
    4848
    4949 /// Struct that represents (part of) either a return value or a function
    5050 /// argument. Used so that arguments and return values can be used
    51 /// interchangably.
    51 /// interchangeably.
    5252 struct RetOrArg {
    5353 RetOrArg(const Function *F, unsigned Idx, bool IsArg) : F(F), Idx(Idx),
    5454 IsArg(IsArg) {}
    272272 // function empty.
    273273 NF->getBasicBlockList().splice(NF->begin(), Fn.getBasicBlockList());
    274274
    275 // Loop over the argument list, transfering uses of the old arguments over to
    276 // the new arguments, also transfering over the names as well. While we're at
    275 // Loop over the argument list, transferring uses of the old arguments over to
    276 // the new arguments, also transferring over the names as well. While we're at
    277277 // it, remove the dead arguments from the DeadArguments list.
    278278 //
    279279 for (Function::arg_iterator I = Fn.arg_begin(), E = Fn.arg_end(),
    378378 // The value is returned from a function. It's only live when the
    379379 // function's return value is live. We use RetValNum here, for the case
    380380 // that U is really a use of an insertvalue instruction that uses the
    381 // orginal Use.
    381 // original Use.
    382382 RetOrArg Use = CreateRet(RI->getParent()->getParent(), RetValNum);
    383383 // We might be live, depending on the liveness of Use.
    384384 return MarkIfNotLive(Use, MaybeLiveUses);
    893893 // function empty.
    894894 NF->getBasicBlockList().splice(NF->begin(), F->getBasicBlockList());
    895895
    896 // Loop over the argument list, transfering uses of the old arguments over to
    897 // the new arguments, also transfering over the names as well.
    896 // Loop over the argument list, transferring uses of the old arguments over to
    897 // the new arguments, also transferring over the names as well.
    898898 i = 0;
    899899 for (Function::arg_iterator I = F->arg_begin(), E = F->arg_end(),
    900900 I2 = NF->arg_begin(); I != E; ++I, ++i)
    330330
    331331
    332332 /// InsertRangeTest - Emit a computation of: (V >= Lo && V < Hi) if Inside is
    333 /// true, otherwise (V < Lo || V >= Hi). In pratice, we emit the more efficient
    333 /// true, otherwise (V < Lo || V >= Hi). In practice, we emit the more efficient
    334334 /// (V-Lo)
    335335 /// whether to treat the V, Lo and HI as signed or not. IB is the location to
    336336 /// insert new instructions.
    698698 return ReplaceInstUsesWith(ICI, ConstantInt::getTrue(X->getContext()));
    699699
    700700 // From this point on, we know that (X+C <= X) --> (X+C < X) because C != 0,
    701 // so the values can never be equal. Similiarly for all other "or equals"
    701 // so the values can never be equal. Similarly for all other "or equals"
    702702 // operators.
    703703
    704704 // (X+1) X >u (MAXUINT-1) --> X == 255
    236236 /// obvious the value of the load is not changed from the point of the load to
    237237 /// the end of the block it is in.
    238238 ///
    239 /// Finally, it is safe, but not profitable, to sink a load targetting a
    239 /// Finally, it is safe, but not profitable, to sink a load targeting a
    240240 /// non-address-taken alloca. Doing so will cause us to not promote the alloca
    241241 /// to a register.
    242242 static bool isSafeAndProfitableToSinkLoad(LoadInst *L) {
    258258 };
    259259
    260260 // ---------------------------------------------------------------------------
    261 // PathProfiler is a module pass which intruments path profiling instructions
    261 // PathProfiler is a module pass which instruments path profiling instructions
    262262 // ---------------------------------------------------------------------------
    263263 class PathProfiler : public ModulePass {
    264264 private:
    484484 // away the store and we bail out. However, if we depend on on something
    485485 // that overwrites the memory location we *can* potentially optimize it.
    486486 //
    487 // Find out what memory location the dependant instruction stores.
    487 // Find out what memory location the dependent instruction stores.
    488488 Instruction *DepWrite = InstDep.getInst();
    489489 AliasAnalysis::Location DepLoc = getLocForWrite(DepWrite, *AA);
    490490 // If we didn't get a useful location, or if it isn't a size, bail out.
    785785 }
    786786 }
    787787
    788 /// Loose - Set this cost to a loosing value.
    788 /// Loose - Set this cost to a losing value.
    789789 void Cost::Loose() {
    790790 NumRegs = ~0u;
    791791 AddRecCost = ~0u;
    18231823 }
    18241824 }
    18251825
    1826 /// reconcileNewOffset - Determine if the given use can accomodate a fixup
    1826 /// reconcileNewOffset - Determine if the given use can accommodate a fixup
    18271827 /// at the given offset and other details. If so, update the use and
    18281828 /// return true.
    18291829 bool
    687687 if (M->getSource() == MDep->getSource())
    688688 return false;
    689689
    690 // Second, the length of the memcpy's must be the same, or the preceeding one
    690 // Second, the length of the memcpy's must be the same, or the preceding one
    691691 // must be larger than the following one.
    692692 ConstantInt *MDepLen = dyn_cast(MDep->getLength());
    693693 ConstantInt *MLen = dyn_cast(M->getLength());
    88 //
    99 // This file demotes all registers to memory references. It is intented to be
    1010 // the inverse of PromoteMemoryToRegister. By converting to loads, the only
    11 // values live accross basic blocks are allocas and loads before phi nodes.
    11 // values live across basic blocks are allocas and loads before phi nodes.
    1212 // It is intended that this should make CFG hacking much easier.
    1313 // To make later hacking easier, the entry block is split into two, such that
    1414 // all introduced allocas and nothing else are in the entry block.
    19881988 ReturnsToZap[i]->setOperand(0, UndefValue::get(F->getReturnType()));
    19891989 }
    19901990
    1991 // If we infered constant or undef values for globals variables, we can delete
    1991 // If we inferred constant or undef values for globals variables, we can delete
    19921992 // the global and any stores that remain to it.
    19931993 const DenseMap &TG = Solver.getTrackedGlobals();
    19941994 for (DenseMap::const_iterator I = TG.begin(),
    3535 // evaluated each time through the tail recursion. Safely keeping allocas
    3636 // in the entry block requires analysis to proves that the tail-called
    3737 // function does not read or write the stack object.
    38 // 2. Tail recursion is only performed if the call immediately preceeds the
    38 // 2. Tail recursion is only performed if the call immediately precedes the
    3939 // return instruction. It's possible that there could be a jump between
    4040 // the call and the return.
    4141 // 3. There can be intervening operations between the call and the return that
    432432 if (CanMoveAboveCall(BBI, CI)) continue;
    433433
    434434 // If we can't move the instruction above the call, it might be because it
    435 // is an associative and commutative operation that could be tranformed
    435 // is an associative and commutative operation that could be transformed
    436436 // using accumulator recursion elimination. Check to see if this is the
    437437 // case, and if so, remember the initial accumulator value for later.
    438438 if ((AccumulatorRecursionEliminationInitVal =
    5555 INITIALIZE_PASS(BreakCriticalEdges, "break-crit-edges",
    5656 "Break critical edges in CFG", false, false)
    5757
    58 // Publically exposed interface to pass...
    58 // Publicly exposed interface to pass...
    5959 char &llvm::BreakCriticalEdgesID = BreakCriticalEdges::ID;
    6060 FunctionPass *llvm::createBreakCriticalEdgesPass() {
    6161 return new BreakCriticalEdges();
    156156 TI->replaceUsesOfWith(OldPred, NewBB);
    157157 }
    158158
    159 // Okay, everthing within the region is now branching to the right block, we
    159 // Okay, everything within the region is now branching to the right block, we
    160160 // just have to update the PHI nodes now, inserting PHI nodes into NewBB.
    161161 for (AfterPHIs = OldPred->begin(); isa(AfterPHIs); ++AfterPHIs) {
    162162 PHINode *PN = cast(AfterPHIs);
    319319 //
    320320 // Note that this only does one level of inlining. For example, if the
    321321 // instruction 'call B' is inlined, and 'B' calls 'C', then the call to 'C' now
    322 // exists in the instruction stream. Similiarly this will inline a recursive
    322 // exists in the instruction stream. Similarly this will inline a recursive
    323323 // function by one level.
    324324 //
    325325 bool llvm::InlineFunction(CallSite CS, InlineFunctionInfo &IFI) {
    114114 INITIALIZE_PASS_END(LoopSimplify, "loop-simplify",
    115115 "Canonicalize natural loops", true, false)
    116116
    117 // Publically exposed interface to pass...
    117 // Publicly exposed interface to pass...
    118118 char &llvm::LoopSimplifyID = LoopSimplify::ID;
    119119 Pass *llvm::createLoopSimplifyPass() { return new LoopSimplify(); }
    120120
    8383 INITIALIZE_PASS(LowerSwitch, "lowerswitch",
    8484 "Lower SwitchInst's to branches", false, false)
    8585
    86 // Publically exposed interface to pass...
    86 // Publicly exposed interface to pass...
    8787 char &llvm::LowerSwitchID = LowerSwitch::ID;
    8888 // createLowerSwitchPass - Interface to this file...
    8989 FunctionPass *llvm::createLowerSwitchPass() {
    17351735 // with a single zero index, it must be nonzero.
    17361736 assert(CE1->getNumOperands() == 2 &&
    17371737 !CE1->getOperand(1)->isNullValue() &&
    1738 "Suprising getelementptr!");
    1738 "Surprising getelementptr!");
    17391739 return isSigned ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT;
    17401740 } else {
    17411741 // If they are different globals, we don't know what the value is,
    183183
    184184 // Concrete/Abstract TypeDescriptions - We lazily calculate type descriptions
    185185 // for types as they are needed. Because resolution of types must invalidate
    186 // all of the abstract type descriptions, we keep them in a seperate map to
    186 // all of the abstract type descriptions, we keep them in a separate map to
    187187 // make this easy.
    188188 TypePrinting ConcreteTypeDescriptions;
    189189 TypePrinting AbstractTypeDescriptions;
    981981 // Keep track of higher level analysis used by this manager.
    982982 HigherLevelAnalysis.push_back(PRequired);
    983983 } else
    984 llvm_unreachable("Unable to accomodate Required Pass");
    984 llvm_unreachable("Unable to accommodate Required Pass");
    985985 }
    986986
    987987 // Set P as P's last user until someone starts using P.
    2525
    2626 // FIXME: We use ManagedStatic to erase the pass registrar on shutdown.
    2727 // Unfortunately, passes are registered with static ctors, and having
    28 // llvm_shutdown clear this map prevents successful ressurection after
    28 // llvm_shutdown clear this map prevents successful resurrection after
    2929 // llvm_shutdown is run. Ideally we should find a solution so that we don't
    3030 // leak the map, AND can still resurrect after shutdown.
    3131 static ManagedStatic PassRegistryObj;
    369369
    370370 // Remove the old entry form TypesByHash. If the hash values differ
    371371 // now, remove it from the old place. Otherwise, continue scanning
    372 // withing this hashcode to reduce work.
    372 // within this hashcode to reduce work.
    373373 if (NewTypeHash != OldTypeHash) {
    374374 RemoveFromTypesByHash(OldTypeHash, Ty);
    375375 } else {
    1414 dnl This provides the --with-llvmsrc and --with-llvmobj options
    1515 LLVM_CONFIG_PROJECT($LLVM_ABS_SRC_ROOT,$LLVM_ABS_OBJ_ROOT)
    1616
    17 dnl Tell autoconf that the auxilliary files are actually located in
    17 dnl Tell autoconf that the auxiliary files are actually located in
    1818 dnl the LLVM autoconf directory, not here.
    1919 AC_CONFIG_AUX_DIR($LLVM_SRC/autoconf)
    2020
    2525 /* Note that, although the array has a counter for each edge, not all
    2626 * counters are updated, the ones that are not used are initialised with -1.
    2727 * When loading this information the counters with value -1 have to be
    28 * recalculated, it is guranteed that this is possible.
    28 * recalculated, it is guaranteed that this is possible.
    2929 */
    3030 write_profiling_data(OptEdgeInfo, ArrayStart, NumElements);
    3131 }
    104104 }
    105105
    106106 inline uint32_t hash (uint32_t key) {
    107 /* this may benifit from a proper hash function */
    107 /* this may benefit from a proper hash function */
    108108 return key%ARBITRARY_HASH_BIN_COUNT;
    109109 }
    110110
    0 ; RUN: llc -O0 -asm-verbose < %s > %t
    11 ; RUN: grep "External Name" %t | grep -v X
    22 ; RUN: grep "External Name" %t | grep Y | count 1
    3 ; Test to check type with no defintion is listed in pubtypes section.
    3 ; Test to check type with no definition is listed in pubtypes section.
    44 %struct.X = type opaque
    55 %struct.Y = type { i32 }
    66
    0 // RUN: %llvmgcc %s -S -o -
    11
    22 #ifdef __APPLE__
    3 /* test that X is layed out correctly when this pragma is used. */
    3 /* test that X is laid out correctly when this pragma is used. */
    44 #pragma options align=mac68k
    55 #endif
    66
    99 // MIN(1631381461u * v2 - 4047041419, 1631381461u * v1 - 4047041419)
    1010 //
    1111 // 1631381461u * 1273463329u = 2077504466193943669, but 32-bit overflow clips
    12 // this to 4047041419. This breaks the comparision implicit in the MIN().
    12 // this to 4047041419. This breaks the comparison implicit in the MIN().
    1313 // Two multiply operations suggests the bad optimization is happening;
    1414 // one multiplication, after the MIN(), is correct.
    1515 // CHECK: mul
    156156 // FIXME: Unfortunately, we do not get these relocations in exactly the same
    157157 // order as Darwin 'as'. It turns out that 'as' *usually* ends up emitting
    158158 // them in reverse address order, but sometimes it allocates some
    159 // additional relocations late so these end up preceed the other entries. I
    159 // additional relocations late so these end up precede the other entries. I
    160160 // haven't figured out the exact criteria for this yet.
    161161
    162162 // CHECK: (('word-0', 0x56),
    109109 [(set R32:$dst, (shl R32:$src, CL))]>;
    110110
    111111 // The RTL list is a list, allowing complex instructions to be defined easily.
    112 // Temporary 'internal' registers can be used to break instructions appart.
    112 // Temporary 'internal' registers can be used to break instructions apart.
    113113 let isTwoAddress = 1 in
    114114 def XOR32mi : Inst<(ops addr:$addr, imm32:$imm),
    115115 "xor $dst, $src2", 0x81, MRM6m,
    None ; This bug has to do with the fact that constant propogation was implemented in
    0 ; This bug has to do with the fact that constant propagation was implemented in
    11 ; terms of _logical_ not (! in C) instead of _bitwise_ not (~ in C). This was
    22 ; due to a spec change.
    33
    0 ; RUN: opt < %s -constprop -die -S | FileCheck %s
    11
    2 ; This is a basic sanity check for constant propogation. The add instruction
    2 ; This is a basic sanity check for constant propagation. The add instruction
    33 ; should be eliminated.
    44 define i32 @test1(i1 %B) {
    55 br i1 %B, label %BB1, label %BB2
    None ; Ensure constant propogation of logical instructions is working correctly.
    0 ; Ensure constant propagation of logical instructions is working correctly.
    11
    22 ; RUN: opt < %s -constprop -die -S | FileCheck %s
    33 ; CHECK-NOT: {{and|or|xor}}
    None ; This is a basic sanity check for constant propogation. The add instruction
    0 ; This is a basic sanity check for constant propagation. The add instruction
    11 ; should be eliminated.
    22
    33 ; RUN: opt < %s -constprop -die -S | not grep phi
    33
    44 ; PR1510
    55
    6 ; These are all equivelent to A^B
    6 ; These are all equivalent to A^B
    77
    88 define i32 @test1(i32 %a, i32 %b) {
    99 entry:
    None ; This is a basic sanity check for constant propogation. The add instruction
    0 ; This is a basic sanity check for constant propagation. The add instruction
    11 ; should be eliminated.
    22
    33 ; RUN: opt < %s -sccp -S | not grep add
    None ; This is a basic sanity check for constant propogation. The add instruction
    0 ; This is a basic sanity check for constant propagation. The add instruction
    11 ; and phi instruction should be eliminated.
    22
    33 ; RUN: opt < %s -sccp -S | not grep phi
    None ; This is a basic sanity check for constant propogation. It tests the basic
    0 ; This is a basic sanity check for constant propagation. It tests the basic
    11 ; arithmatic operations.
    22
    33
    None ; This is a basic sanity check for constant propogation. It tests the basic
    0 ; This is a basic sanity check for constant propagation. It tests the basic
    11 ; logic operations.
    22
    33
    1212 %res2 = insertvalue { i32, i32 } %res1, i32 2, 1 ; <{ i32, i32 }> [#uses=1]
    1313 ; And store it
    1414 store { i32, i32 } %res2, { i32, i32 }* %target
    15 ; Actually use %target, so it doesn't get removed alltogether
    15 ; Actually use %target, so it doesn't get removed altogether
    1616 %ptr = getelementptr { i32, i32 }* %target, i32 0, i32 0
    1717 %val = load i32* %ptr
    1818 ret i32 %val
    2525 %res2 = insertvalue [ 2 x i32 ] %res1, i32 2, 1 ; <{ i32, i32 }> [#uses=1]
    2626 ; And store it
    2727 store [ 2 x i32 ] %res2, [ 2 x i32 ]* %target
    28 ; Actually use %target, so it doesn't get removed alltogether
    28 ; Actually use %target, so it doesn't get removed altogether
    2929 %ptr = getelementptr [ 2 x i32 ]* %target, i32 0, i32 0
    3030 %val = load i32* %ptr
    3131 ret i32 %val
    266266 } else if (isa(L)) {
    267267 // FIXME: implement.
    268268
    269 // This is really wierd; type uniquing is broken?
    269 // This is really weird; type uniquing is broken?
    270270 if (L->getType() != R->getType()) {
    271271 if (!L->getType()->isPointerTy() || !R->getType()->isPointerTy()) {
    272272 if (Complain) Engine.log("different phi types");
    305305 sign: ``-std c99``. At most one occurrence is allowed.
    306306
    307307 - ``parameter_list_option`` - same as the above, but more than one option
    308 occurence is allowed.
    308 occurrence is allowed.
    309309
    310310 - ``prefix_option`` - same as the parameter_option, but the option name and
    311311 argument do not have to be separated. Example: ``-ofile``. This can be also
    313313 (``=file`` will be interpreted as option value). At most one occurrence is
    314314 allowed.
    315315
    316 - ``prefix_list_option`` - same as the above, but more than one occurence of
    316 - ``prefix_list_option`` - same as the above, but more than one occurrence of
    317317 the option is allowed; example: ``-lm -lpthread``.
    318318
    319319 - ``alias_option`` - a special option type for creating aliases. Unlike other
    190190 // ('-S' && '-emit-llvm') && !('opt') -> output .ll
    191191 (and (switch_on "emit-llvm", "S"), (not (switch_on "opt"))),
    192192 [(forward "S"), (output_suffix "ll")],
    193 // Ususally just output .bc
    193 // Usually just output .bc
    194194 (not (switch_on "fsyntax-only")),
    195195 [(append_cmd "-c"), (append_cmd "-emit-llvm")],
    196196
    280280
    281281 //
    282282 // Generates code for all added modules into one native object file.
    283 // On sucess returns a pointer to a generated mach-o/ELF buffer and
    283 // On success returns a pointer to a generated mach-o/ELF buffer and
    284284 // length set to the buffer size. The buffer is owned by the
    285285 // lto_code_gen_t and will be freed when lto_codegen_dispose()
    286286 // is called, or lto_codegen_compile() is called again.
    5757 #read the file one line at a time
    5858 buffer = input.readline()
    5959 while buffer != '':
    60 #filter out the unecessary checks on all the edge lines
    60 #filter out the unnecessary checks on all the edge lines
    6161 if not arrowexp.search(buffer):
    6262 #check to see if this is a node we are looking for
    6363 for regexp in regexp_list:
    168168 static error_code GetFileNameFromHandle(HANDLE FileHandle,
    169169 std::string& Name) {
    170170 char Filename[MAX_PATH+1];
    171 bool Sucess = false;
    171 bool Success = false;
    172172 Name.clear();
    173173
    174174 // Get the file size.
    175175 LARGE_INTEGER FileSize;
    176 Sucess = ::GetFileSizeEx(FileHandle, &FileSize);
    177
    178 if (!Sucess)
    176 Success = ::GetFileSizeEx(FileHandle, &FileSize);
    177
    178 if (!Success)
    179179 return windows_error(::GetLastError());
    180180
    181181 // Create a file mapping object.
    197197 if (!MappedFile)
    198198 return windows_error(::GetLastError());
    199199
    200 Sucess = ::GetMappedFileNameA(::GetCurrentProcess(),
    200 Success = ::GetMappedFileNameA(::GetCurrentProcess(),
    201201 MappedFile,
    202202 Filename,
    203203 array_lengthof(Filename) - 1);
    204204
    205 if (!Sucess)
    205 if (!Success)
    206206 return windows_error(::GetLastError());
    207207 else {
    208208 Name = Filename;
    793793 'endtime' => $endtime,
    794794 'target_triple' => $targetTriple,
    795795
    796 # Unused, but left around for backwards compatability.
    796 # Unused, but left around for backwards compatibility.
    797797 'warnings' => "",
    798798 'cvsusercommitlist' => "",
    799799 'cvsuserupdatelist' => "",
    606606 for (bitIndex = 0; bitIndex < NumBits; bitIndex++)
    607607 BitValueArray[StartBit + bitIndex] = BIT_UNSET;
    608608
    609 // Delegates to an inferior filter chooser for futher processing on this
    609 // Delegates to an inferior filter chooser for further processing on this
    610610 // group of instructions whose segment values are variable.
    611611 FilterChooserMap.insert(std::pair(
    612612 (unsigned)-1,
    638638 BitValueArray[StartBit + bitIndex] = BIT_FALSE;
    639639 }
    640640
    641 // Delegates to an inferior filter chooser for futher processing on this
    641 // Delegates to an inferior filter chooser for further processing on this
    642642 // category of instructions.
    643643 FilterChooserMap.insert(std::pair(
    644644 mapIterator->first,
    8787 // 2. The operand matcher will try every possible entry with the same
    8888 // mnemonic and will check if the target feature for this mnemonic also
    8989 // matches. After that, if the operand to be matched has its index
    90 // present in the mask, a successfull match occurs. Otherwise, fallback
    90 // present in the mask, a successful match occurs. Otherwise, fallback
    9191 // to the regular operand parsing.
    9292 //
    9393 // 3. For a match success, each operand class that has a 'ParserMethod'
    257257 return ValueName < RHS.ValueName;
    258258
    259259 default:
    260 // This class preceeds the RHS if it is a proper subset of the RHS.
    260 // This class precedes the RHS if it is a proper subset of the RHS.
    261261 if (isSubsetOf(RHS))
    262262 return true;
    263263 if (RHS.isSubsetOf(*this))
    12641264 II->BuildAliasResultOperands();
    12651265 }
    12661266
    1267 // Reorder classes so that classes preceed super classes.
    1267 // Reorder classes so that classes precede super classes.
    12681268 std::sort(Classes.begin(), Classes.end(), less_ptr());
    12691269 }
    12701270
    15371537 // operand from the earlier one.We can only tie single MCOperand values.
    15381538 //assert(OpInfo.MINumOperands == 1 && "Not a singular MCOperand");
    15391539 unsigned TiedOp = OpInfo.TiedOperandNum;
    1540 assert(i > TiedOp && "Tied operand preceeds its target!");
    1540 assert(i > TiedOp && "Tied operand precedes its target!");
    15411541 CaseOS << " Inst.addOperand(Inst.getOperand(" << TiedOp << "));\n";
    15421542 Signature += "__Tie" + utostr(TiedOp);
    15431543 break;
    437437 for (bitIndex = 0; bitIndex < NumBits; bitIndex++)
    438438 BitValueArray[StartBit + bitIndex] = BIT_UNSET;
    439439
    440 // Delegates to an inferior filter chooser for futher processing on this
    440 // Delegates to an inferior filter chooser for further processing on this
    441441 // group of instructions whose segment values are variable.
    442442 FilterChooserMap.insert(std::pair(
    443443 (unsigned)-1,
    470470 BitValueArray[StartBit + bitIndex] = BIT_FALSE;
    471471 }
    472472
    473 // Delegates to an inferior filter chooser for futher processing on this
    473 // Delegates to an inferior filter chooser for further processing on this
    474474 // category of instructions.
    475475 FilterChooserMap.insert(std::pair(
    476476 mapIterator->first,
    3434 const Record *A = *(Record**) Av;
    3535 const Record *B = *(Record**) Bv;
    3636
    37 // Sentinel options preceed all others and are only ordered by precedence.
    37 // Sentinel options precede all others and are only ordered by precedence.
    3838 bool ASent = A->getValueAsDef("Kind")->getValueAsBit("Sentinel");
    3939 bool BSent = B->getValueAsDef("Kind")->getValueAsBit("Sentinel");
    4040 if (ASent != BSent)
    7878 /// regardless of ModR/M byte, two entries - one for bytes 0x00-0xbf and one
    7979 /// for bytes 0xc0-0xff -, or 256 entries, one for each possible byte.
    8080 /// nnnn is the number of a table for looking up these values. The tables
    81 /// are writen separately so that tables consisting entirely of zeros will
    81 /// are written separately so that tables consisting entirely of zeros will
    8282 /// not be duplicated. (These all have the name modRMEmptyTable.) A table
    8383 /// is printed as:
    8484 ///
    55 #
    66 # You can specify TARGETS=ppc (or i386) on the buildit command line to limit the
    77 # build to just one target. The default is for ppc and i386. The compiler
    8 # targetted at this host gets built anyway, but not installed unless it's listed
    8 # targeted at this host gets built anyway, but not installed unless it's listed
    99 # in TARGETS.
    1010
    1111 # Include the set of standard Apple makefile definitions.
    3737 Documentation
    3838 =============
    3939
    40 The offical *lit* documentation is in the man page, available online at the LLVM
    40 The official *lit* documentation is in the man page, available online at the LLVM
    4141 Command Guide: http://llvm.org/cmds/lit.html.
    4242
    4343
    122122 return *this;
    123123 }
    124124
    125 // Returns a pointer to the last occurence of a valid path separator in
    125 // Returns a pointer to the last occurrence of a valid path separator in
    126126 // the FilePath. On Windows, for example, both '/' and '\' are valid path
    127127 // separators. Returns NULL if no path separator was found.
    128128 const char* FilePath::FindLastPathSeparator() const {
    14141414 // Utility functions for encoding Unicode text (wide strings) in
    14151415 // UTF-8.
    14161416
    1417 // A Unicode code-point can have upto 21 bits, and is encoded in UTF-8
    1417 // A Unicode code-point can have up to 21 bits, and is encoded in UTF-8
    14181418 // like this:
    14191419 //
    14201420 // Code-point length Encoding
    195195
    196196 void Normalize();
    197197
    198 // Returns a pointer to the last occurence of a valid path separator in
    198 // Returns a pointer to the last occurrence of a valid path separator in
    199199 // the FilePath. On Windows, for example, both '/' and '\' are valid path
    200200 // separators. Returns NULL if no path separator was found.
    201201 const char* FindLastPathSeparator() const;