llvm.org GIT mirror llvm / 79b609c
[Tests] Add a tricky LFTR case for documentation purposes Thought of this case while working on something else. We appear to get it right in all of the variations I tried, but that's by accident. So, add a test which would catch the potential bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363953 91177308-0d34-0410-b5e6-96231b3b80d8 Philip Reames 2 months ago
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426426 exit:
427427 ret void
428428 }
429
430 ; Demonstrate a case where two nested loops share a single exiting block.
431 ; The key point is that the exit count is *different* for the two loops, and
432 ; thus we can't rewrite the exit for the outer one. There are three sub-cases
433 ; which can happen here: a) the outer loop has a backedge taken count of zero
434 ; (for the case where we know the inner exit is known taken), b) the exit is
435 ; known never taken (but may have an exit count outside the range of the IV)
436 ; or c) the outer loop has an unanalyzable exit count (where we can't tell).
437 define void @nested(i32 %n) {
438 ; CHECK-LABEL: @nested(
439 ; CHECK-NEXT: entry:
440 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], 1
441 ; CHECK-NEXT: br label [[OUTER:%.*]]
442 ; CHECK: outer:
443 ; CHECK-NEXT: [[IV1:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV1_NEXT:%.*]], [[OUTER_LATCH:%.*]] ]
444 ; CHECK-NEXT: store volatile i32 [[IV1]], i32* @A
445 ; CHECK-NEXT: [[IV1_NEXT]] = add nuw nsw i32 [[IV1]], 1
446 ; CHECK-NEXT: br label [[INNER:%.*]]
447 ; CHECK: inner:
448 ; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ 0, [[OUTER]] ], [ [[IV2_NEXT:%.*]], [[INNER_LATCH:%.*]] ]
449 ; CHECK-NEXT: store volatile i32 [[IV2]], i32* @A
450 ; CHECK-NEXT: [[IV2_NEXT]] = add nuw nsw i32 [[IV2]], 1
451 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV2]], 20
452 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[INNER_LATCH]], label [[EXIT_LOOPEXIT:%.*]]
453 ; CHECK: inner_latch:
454 ; CHECK-NEXT: [[EXITCOND2:%.*]] = icmp ne i32 [[IV2_NEXT]], [[TMP0]]
455 ; CHECK-NEXT: br i1 [[EXITCOND2]], label [[INNER]], label [[OUTER_LATCH]]
456 ; CHECK: outer_latch:
457 ; CHECK-NEXT: [[EXITCOND3:%.*]] = icmp ne i32 [[IV1_NEXT]], 21
458 ; CHECK-NEXT: br i1 [[EXITCOND3]], label [[OUTER]], label [[EXIT_LOOPEXIT1:%.*]]
459 ; CHECK: exit.loopexit:
460 ; CHECK-NEXT: br label [[EXIT:%.*]]
461 ; CHECK: exit.loopexit1:
462 ; CHECK-NEXT: br label [[EXIT]]
463 ; CHECK: exit:
464 ; CHECK-NEXT: ret void
465 ;
466 entry:
467 br label %outer
468
469 outer:
470 %iv1 = phi i32 [ 0, %entry ], [ %iv1.next, %outer_latch ]
471 store volatile i32 %iv1, i32* @A
472 %iv1.next = add i32 %iv1, 1
473 br label %inner
474
475 inner:
476 %iv2 = phi i32 [ 0, %outer ], [ %iv2.next, %inner_latch ]
477 store volatile i32 %iv2, i32* @A
478 %iv2.next = add i32 %iv2, 1
479 %innertest = icmp ult i32 %iv2, 20
480 br i1 %innertest, label %inner_latch, label %exit
481
482 inner_latch:
483 %innertestb = icmp ult i32 %iv2, %n
484 br i1 %innertestb, label %inner, label %outer_latch
485
486 outer_latch:
487 %outertest = icmp ult i32 %iv1, 20
488 br i1 %outertest, label %outer, label %exit
489
490 exit:
491 ret void
492 }