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If val# def is ~0U, meaning it's defined by a PHI, and it's previously split, spill before the barrier because it's impossible to determine if all the defs are spilled in the same spill slot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58129 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 11 years ago
2 changed file(s) with 35 addition(s) and 9 deletion(s). Raw diff Collapse all Expand all
526526 int SS;
527527 unsigned SpillIndex = 0;
528528 MachineInstr *SpillMI = NULL;
529 if (isAlreadySplit(CurrLI->reg, ValNo->id, SS)) {
530 // If it's already split, just restore the value. There is no need to spill
531 // the def again.
532 } else if (ValNo->def == ~0U) {
529 bool PrevSpilled = isAlreadySplit(CurrLI->reg, ValNo->id, SS);
530 if (ValNo->def == ~0U) {
533531 // If it's defined by a phi, we must split just before the barrier.
534532 MachineBasicBlock::iterator SpillPt =
535533 findSpillPoint(BarrierMBB, Barrier, RefsInMBB, SpillIndex);
536534 if (SpillPt == BarrierMBB->begin())
537535 return false; // No gap to insert spill.
538536 // Add spill.
539 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
537 if (!PrevSpilled)
538 // If previously split, reuse the spill slot.
539 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
540540 TII->storeRegToStackSlot(*BarrierMBB, SpillPt, CurrLI->reg, true, SS, RC);
541541 SpillMI = prior(SpillPt);
542542 LIs->InsertMachineInstrInMaps(SpillMI, SpillIndex);
543 } else {
543 } else if (!PrevSpilled) {
544 // If it's already split, just restore the value. There is no need to spill
545 // the def again.
544546 // Check if it's possible to insert a spill after the def MI.
545547 MachineBasicBlock::iterator SpillPt =
546548 findNextEmptySlot(DefMBB, DefMI, SpillIndex);
548550 return false; // No gap to insert spill.
549551 SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
550552
551 // Add spill. The store instruction kills the register if def is before the
552 // barrier in the barrier block.
553 // Add spill. The store instruction kills the register if def is before
554 // the barrier in the barrier block.
553555 TII->storeRegToStackSlot(*DefMBB, SpillPt, CurrLI->reg,
554556 DefMBB == BarrierMBB, SS, RC);
555557 SpillMI = prior(SpillPt);
566568 // If live interval is spilled in the same block as the barrier, just
567569 // create a hole in the interval.
568570 if (!DefMBB ||
569 (SpillIndex && SpillMI->getParent() == BarrierMBB)) {
571 (SpillMI && SpillMI->getParent() == BarrierMBB)) {
570572 UpdateIntervalForSplit(ValNo, LIs->getUseIndex(SpillIndex)+1,
571573 LIs->getDefIndex(RestoreIndex));
572574
0 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
1 ; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 4
2
3 define i32 @main(i32 %argc, i8** %argv) nounwind {
4 entry:
5 br label %bb
6
7 bb: ; preds = %bb, %entry
8 %k.0.reg2mem.0 = phi double [ 1.000000e+00, %entry ], [ %6, %bb ] ; [#uses=2]
9 %Flint.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %5, %bb ] ; [#uses=1]
10 %twoThrd.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; [#uses=1]
11 %0 = tail call double @llvm.pow.f64(double 0x3FE5555555555555, double 0.000000e+00) ; [#uses=1]
12 %1 = add double %0, %twoThrd.0.reg2mem.0 ; [#uses=1]
13 %2 = tail call double @sin(double %k.0.reg2mem.0) nounwind readonly ; [#uses=1]
14 %3 = mul double 0.000000e+00, %2 ; [#uses=1]
15 %4 = fdiv double 1.000000e+00, %3 ; [#uses=1]
16 %5 = add double %4, %Flint.0.reg2mem.0 ; [#uses=1]
17 %6 = add double %k.0.reg2mem.0, 1.000000e+00 ; [#uses=1]
18 br label %bb
19 }
20
21 declare double @llvm.pow.f64(double, double) nounwind readonly
22
23 declare double @sin(double) nounwind readonly