llvm.org GIT mirror llvm / 78dfeb7
[AMDGPU][MC][DOC] Updated AMD GPU assembler description. Minor bugfixing and improvements. See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350120 91177308-0d34-0410-b5e6-96231b3b80d8 Dmitry Preobrazhensky 7 months ago
8 changed file(s) with 2051 addition(s) and 2050 deletion(s). Raw diff Collapse all Expand all
3131 .. parsed-literal::
3232
3333 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
34 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
35 ds_add_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
36 ds_add_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
37 ds_add_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
38 ds_add_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
39 ds_add_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
40 ds_add_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
41 ds_and_b32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
42 ds_and_b64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
43 ds_and_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
44 ds_and_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
45 ds_and_src2_b32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
46 ds_and_src2_b64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
47 ds_append :ref:`vdst` :ref:`ds_offset16` :ref:`gds`
48 ds_cmpst_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
49 ds_cmpst_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
50 ds_cmpst_f32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
51 ds_cmpst_f64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
52 ds_cmpst_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
53 ds_cmpst_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
54 ds_cmpst_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
55 ds_cmpst_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
56 ds_condxchg32_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
57 ds_consume :ref:`vdst` :ref:`ds_offset16` :ref:`gds`
58 ds_dec_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
59 ds_dec_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
60 ds_dec_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
61 ds_dec_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
62 ds_dec_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
63 ds_dec_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
64 ds_gws_barrier :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
65 ds_gws_init :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
66 ds_gws_sema_br :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
67 ds_gws_sema_p :ref:`ds_offset16` :ref:`gds`
68 ds_gws_sema_release_all :ref:`ds_offset16` :ref:`gds`
69 ds_gws_sema_v :ref:`ds_offset16` :ref:`gds`
70 ds_inc_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
71 ds_inc_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
72 ds_inc_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
73 ds_inc_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
74 ds_inc_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
75 ds_inc_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
76 ds_max_f32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
77 ds_max_f64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
78 ds_max_i32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
79 ds_max_i64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
80 ds_max_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
81 ds_max_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
82 ds_max_rtn_i32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
83 ds_max_rtn_i64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
84 ds_max_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
85 ds_max_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
86 ds_max_src2_f32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
87 ds_max_src2_f64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
88 ds_max_src2_i32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
89 ds_max_src2_i64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
90 ds_max_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
91 ds_max_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
92 ds_max_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
93 ds_max_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
94 ds_min_f32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
95 ds_min_f64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
96 ds_min_i32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
97 ds_min_i64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
98 ds_min_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
99 ds_min_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
100 ds_min_rtn_i32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
101 ds_min_rtn_i64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
102 ds_min_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
103 ds_min_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
104 ds_min_src2_f32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
105 ds_min_src2_f64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
106 ds_min_src2_i32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
107 ds_min_src2_i64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
108 ds_min_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
109 ds_min_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
110 ds_min_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
111 ds_min_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
112 ds_mskor_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
113 ds_mskor_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
114 ds_mskor_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
115 ds_mskor_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
34 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
35 ds_add_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
36 ds_add_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
37 ds_add_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
38 ds_add_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
39 ds_add_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
40 ds_add_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
41 ds_and_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
42 ds_and_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
43 ds_and_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
44 ds_and_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
45 ds_and_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
46 ds_and_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
47 ds_append :ref:`vdst` :ref:`offset16` :ref:`gds`
48 ds_cmpst_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
49 ds_cmpst_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
50 ds_cmpst_f32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
51 ds_cmpst_f64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
52 ds_cmpst_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
53 ds_cmpst_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
54 ds_cmpst_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
55 ds_cmpst_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
56 ds_condxchg32_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
57 ds_consume :ref:`vdst` :ref:`offset16` :ref:`gds`
58 ds_dec_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
59 ds_dec_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
60 ds_dec_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
61 ds_dec_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
62 ds_dec_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
63 ds_dec_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
64 ds_gws_barrier :ref:`vdata` :ref:`offset16` :ref:`gds`
65 ds_gws_init :ref:`vdata` :ref:`offset16` :ref:`gds`
66 ds_gws_sema_br :ref:`vdata` :ref:`offset16` :ref:`gds`
67 ds_gws_sema_p :ref:`offset16` :ref:`gds`
68 ds_gws_sema_release_all :ref:`offset16` :ref:`gds`
69 ds_gws_sema_v :ref:`offset16` :ref:`gds`
70 ds_inc_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
71 ds_inc_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
72 ds_inc_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
73 ds_inc_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
74 ds_inc_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
75 ds_inc_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
76 ds_max_f32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
77 ds_max_f64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
78 ds_max_i32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
79 ds_max_i64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
80 ds_max_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
81 ds_max_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
82 ds_max_rtn_i32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
83 ds_max_rtn_i64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
84 ds_max_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
85 ds_max_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
86 ds_max_src2_f32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
87 ds_max_src2_f64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
88 ds_max_src2_i32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
89 ds_max_src2_i64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
90 ds_max_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
91 ds_max_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
92 ds_max_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
93 ds_max_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
94 ds_min_f32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
95 ds_min_f64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
96 ds_min_i32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
97 ds_min_i64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
98 ds_min_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
99 ds_min_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
100 ds_min_rtn_i32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
101 ds_min_rtn_i64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
102 ds_min_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
103 ds_min_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
104 ds_min_src2_f32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
105 ds_min_src2_f64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
106 ds_min_src2_i32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
107 ds_min_src2_i64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
108 ds_min_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
109 ds_min_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
110 ds_min_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
111 ds_min_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
112 ds_mskor_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
113 ds_mskor_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
114 ds_mskor_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
115 ds_mskor_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
116116 ds_nop
117 ds_or_b32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
118 ds_or_b64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
119 ds_or_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
120 ds_or_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
121 ds_or_src2_b32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
122 ds_or_src2_b64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
123 ds_ordered_count :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
124 ds_read2_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
125 ds_read2_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
126 ds_read2st64_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
127 ds_read2st64_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
128 ds_read_b128 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
129 ds_read_b32 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
130 ds_read_b64 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
131 ds_read_b96 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
132 ds_read_i16 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
133 ds_read_i8 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
134 ds_read_u16 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
135 ds_read_u8 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
136 ds_rsub_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
137 ds_rsub_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
138 ds_rsub_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
139 ds_rsub_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
140 ds_rsub_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
141 ds_rsub_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
142 ds_sub_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
143 ds_sub_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
144 ds_sub_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
145 ds_sub_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
146 ds_sub_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
147 ds_sub_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
148 ds_swizzle_b32 :ref:`vdst`, :ref:`vaddr` :ref:`sw_offset16` :ref:`gds`
149 ds_wrap_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
150 ds_write2_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
151 ds_write2_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
152 ds_write2st64_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
153 ds_write2st64_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
154 ds_write_b128 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
155 ds_write_b16 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
156 ds_write_b32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
157 ds_write_b64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
158 ds_write_b8 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
159 ds_write_b96 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
160 ds_write_src2_b32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
161 ds_write_src2_b64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
162 ds_wrxchg2_rtn_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
163 ds_wrxchg2_rtn_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
164 ds_wrxchg2st64_rtn_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
165 ds_wrxchg2st64_rtn_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
166 ds_wrxchg_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
167 ds_wrxchg_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
168 ds_xor_b32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
169 ds_xor_b64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
170 ds_xor_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
171 ds_xor_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
172 ds_xor_src2_b32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
173 ds_xor_src2_b64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
117 ds_or_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
118 ds_or_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
119 ds_or_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
120 ds_or_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
121 ds_or_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
122 ds_or_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
123 ds_ordered_count :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
124 ds_read2_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
125 ds_read2_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
126 ds_read2st64_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
127 ds_read2st64_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
128 ds_read_b128 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
129 ds_read_b32 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
130 ds_read_b64 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
131 ds_read_b96 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
132 ds_read_i16 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
133 ds_read_i8 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
134 ds_read_u16 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
135 ds_read_u8 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
136 ds_rsub_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
137 ds_rsub_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
138 ds_rsub_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
139 ds_rsub_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
140 ds_rsub_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
141 ds_rsub_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
142 ds_sub_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
143 ds_sub_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
144 ds_sub_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
145 ds_sub_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
146 ds_sub_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
147 ds_sub_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
148 ds_swizzle_b32 :ref:`vdst`, :ref:`vaddr` :ref:`pattern` :ref:`gds`
149 ds_wrap_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
150 ds_write2_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
151 ds_write2_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
152 ds_write2st64_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
153 ds_write2st64_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
154 ds_write_b128 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
155 ds_write_b16 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
156 ds_write_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
157 ds_write_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
158 ds_write_b8 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
159 ds_write_b96 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
160 ds_write_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
161 ds_write_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
162 ds_wrxchg2_rtn_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
163 ds_wrxchg2_rtn_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
164 ds_wrxchg2st64_rtn_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
165 ds_wrxchg2st64_rtn_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
166 ds_wrxchg_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
167 ds_wrxchg_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
168 ds_xor_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
169 ds_xor_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
170 ds_xor_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
171 ds_xor_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
172 ds_xor_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
173 ds_xor_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
174174
175175 EXP
176176 -----------------------
187187 .. parsed-literal::
188188
189189 **INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
190 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
190 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
191191 flat_atomic_add :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`glc` :ref:`slc`
192192 flat_atomic_add_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`glc` :ref:`slc`
193193 flat_atomic_and :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`glc` :ref:`slc`
337337
338338 .. parsed-literal::
339339
340 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
341 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
342 buffer_atomic_add :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
343 buffer_atomic_add_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
344 buffer_atomic_and :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
345 buffer_atomic_and_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
346 buffer_atomic_cmpswap :ref:`vdata`::ref:`dst`::ref:`b32x2`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
347 buffer_atomic_cmpswap_x2 :ref:`vdata`::ref:`dst`::ref:`b64x2`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
348 buffer_atomic_dec :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
349 buffer_atomic_dec_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
350 buffer_atomic_inc :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
351 buffer_atomic_inc_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
352 buffer_atomic_or :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
353 buffer_atomic_or_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
354 buffer_atomic_smax :ref:`vdata`::ref:`dst`::ref:`s32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
355 buffer_atomic_smax_x2 :ref:`vdata`::ref:`dst`::ref:`s64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
356 buffer_atomic_smin :ref:`vdata`::ref:`dst`::ref:`s32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
357 buffer_atomic_smin_x2 :ref:`vdata`::ref:`dst`::ref:`s64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
358 buffer_atomic_sub :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
359 buffer_atomic_sub_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
360 buffer_atomic_swap :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
361 buffer_atomic_swap_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
362 buffer_atomic_umax :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
363 buffer_atomic_umax_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
364 buffer_atomic_umin :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
365 buffer_atomic_umin_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
366 buffer_atomic_xor :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
367 buffer_atomic_xor_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
368 buffer_load_dword :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
369 buffer_load_dwordx2 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
370 buffer_load_dwordx3 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
371 buffer_load_dwordx4 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
372 buffer_load_format_x :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
373 buffer_load_format_xy :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
374 buffer_load_format_xyz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
375 buffer_load_format_xyzw :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
376 buffer_load_sbyte :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
377 buffer_load_sshort :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
378 buffer_load_ubyte :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
379 buffer_load_ushort :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
380 buffer_store_byte :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
381 buffer_store_dword :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
382 buffer_store_dwordx2 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
383 buffer_store_dwordx3 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
384 buffer_store_dwordx4 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
385 buffer_store_format_x :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
386 buffer_store_format_xy :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
387 buffer_store_format_xyz :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
388 buffer_store_format_xyzw :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
389 buffer_store_short :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
340 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
341 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
342 buffer_atomic_add :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
343 buffer_atomic_add_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
344 buffer_atomic_and :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
345 buffer_atomic_and_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
346 buffer_atomic_cmpswap :ref:`vdata`::ref:`dst`::ref:`b32x2`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
347 buffer_atomic_cmpswap_x2 :ref:`vdata`::ref:`dst`::ref:`b64x2`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
348 buffer_atomic_dec :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
349 buffer_atomic_dec_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
350 buffer_atomic_inc :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
351 buffer_atomic_inc_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
352 buffer_atomic_or :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
353 buffer_atomic_or_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
354 buffer_atomic_smax :ref:`vdata`::ref:`dst`::ref:`s32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
355 buffer_atomic_smax_x2 :ref:`vdata`::ref:`dst`::ref:`s64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
356 buffer_atomic_smin :ref:`vdata`::ref:`dst`::ref:`s32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
357 buffer_atomic_smin_x2 :ref:`vdata`::ref:`dst`::ref:`s64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
358 buffer_atomic_sub :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
359 buffer_atomic_sub_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
360 buffer_atomic_swap :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
361 buffer_atomic_swap_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
362 buffer_atomic_umax :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
363 buffer_atomic_umax_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
364 buffer_atomic_umin :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
365 buffer_atomic_umin_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
366 buffer_atomic_xor :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
367 buffer_atomic_xor_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
368 buffer_load_dword :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
369 buffer_load_dwordx2 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
370 buffer_load_dwordx3 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
371 buffer_load_dwordx4 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
372 buffer_load_format_x :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
373 buffer_load_format_xy :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
374 buffer_load_format_xyz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
375 buffer_load_format_xyzw :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
376 buffer_load_sbyte :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
377 buffer_load_sshort :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
378 buffer_load_ubyte :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
379 buffer_load_ushort :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
380 buffer_store_byte :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
381 buffer_store_dword :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
382 buffer_store_dwordx2 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
383 buffer_store_dwordx3 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
384 buffer_store_dwordx4 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
385 buffer_store_format_x :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
386 buffer_store_format_xy :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
387 buffer_store_format_xyz :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
388 buffer_store_format_xyzw :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
389 buffer_store_short :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`addr64` :ref:`offset12` :ref:`glc` :ref:`slc`
390390 buffer_wbinvl1
391391 buffer_wbinvl1_vol
392392
755755 .. parsed-literal::
756756
757757 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
758 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
758 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
759759 v_add_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
760760 v_add_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
761761 v_add_i32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`
3131 .. parsed-literal::
3232
3333 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
34 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
35 ds_add_f32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
36 ds_add_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
37 ds_add_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
38 ds_add_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
39 ds_add_src2_f32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
40 ds_add_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
41 ds_add_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
42 ds_add_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
43 ds_add_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
44 ds_and_b32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
45 ds_and_b64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
46 ds_and_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
47 ds_and_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
48 ds_and_src2_b32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
49 ds_and_src2_b64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
50 ds_append :ref:`vdst` :ref:`ds_offset16` :ref:`gds`
51 ds_bpermute_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16`
52 ds_cmpst_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
53 ds_cmpst_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
54 ds_cmpst_f32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
55 ds_cmpst_f64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
56 ds_cmpst_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
57 ds_cmpst_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
58 ds_cmpst_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
59 ds_cmpst_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
60 ds_condxchg32_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
61 ds_consume :ref:`vdst` :ref:`ds_offset16` :ref:`gds`
62 ds_dec_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
63 ds_dec_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
64 ds_dec_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
65 ds_dec_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
66 ds_dec_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
67 ds_dec_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
68 ds_gws_barrier :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
69 ds_gws_init :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
70 ds_gws_sema_br :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
71 ds_gws_sema_p :ref:`ds_offset16` :ref:`gds`
72 ds_gws_sema_release_all :ref:`ds_offset16` :ref:`gds`
73 ds_gws_sema_v :ref:`ds_offset16` :ref:`gds`
74 ds_inc_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
75 ds_inc_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
76 ds_inc_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
77 ds_inc_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
78 ds_inc_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
79 ds_inc_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
80 ds_max_f32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
81 ds_max_f64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
82 ds_max_i32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
83 ds_max_i64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
84 ds_max_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
85 ds_max_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
86 ds_max_rtn_i32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
87 ds_max_rtn_i64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
88 ds_max_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
89 ds_max_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
90 ds_max_src2_f32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
91 ds_max_src2_f64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
92 ds_max_src2_i32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
93 ds_max_src2_i64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
94 ds_max_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
95 ds_max_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
96 ds_max_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
97 ds_max_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
98 ds_min_f32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
99 ds_min_f64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
100 ds_min_i32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
101 ds_min_i64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
102 ds_min_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
103 ds_min_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
104 ds_min_rtn_i32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
105 ds_min_rtn_i64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
106 ds_min_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
107 ds_min_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
108 ds_min_src2_f32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
109 ds_min_src2_f64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
110 ds_min_src2_i32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
111 ds_min_src2_i64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
112 ds_min_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
113 ds_min_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
114 ds_min_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
115 ds_min_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
116 ds_mskor_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
117 ds_mskor_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
118 ds_mskor_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
119 ds_mskor_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
34 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
35 ds_add_f32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
36 ds_add_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
37 ds_add_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
38 ds_add_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
39 ds_add_src2_f32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
40 ds_add_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
41 ds_add_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
42 ds_add_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
43 ds_add_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
44 ds_and_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
45 ds_and_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
46 ds_and_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
47 ds_and_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
48 ds_and_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
49 ds_and_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
50 ds_append :ref:`vdst` :ref:`offset16` :ref:`gds`
51 ds_bpermute_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16`
52 ds_cmpst_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
53 ds_cmpst_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
54 ds_cmpst_f32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
55 ds_cmpst_f64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
56 ds_cmpst_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
57 ds_cmpst_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
58 ds_cmpst_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
59 ds_cmpst_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
60 ds_condxchg32_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
61 ds_consume :ref:`vdst` :ref:`offset16` :ref:`gds`
62 ds_dec_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
63 ds_dec_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
64 ds_dec_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
65 ds_dec_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
66 ds_dec_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
67 ds_dec_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
68 ds_gws_barrier :ref:`vdata` :ref:`offset16` :ref:`gds`
69 ds_gws_init :ref:`vdata` :ref:`offset16` :ref:`gds`
70 ds_gws_sema_br :ref:`vdata` :ref:`offset16` :ref:`gds`
71 ds_gws_sema_p :ref:`offset16` :ref:`gds`
72 ds_gws_sema_release_all :ref:`offset16` :ref:`gds`
73 ds_gws_sema_v :ref:`offset16` :ref:`gds`
74 ds_inc_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
75 ds_inc_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
76 ds_inc_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
77 ds_inc_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
78 ds_inc_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
79 ds_inc_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
80 ds_max_f32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
81 ds_max_f64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
82 ds_max_i32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
83 ds_max_i64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
84 ds_max_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
85 ds_max_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
86 ds_max_rtn_i32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
87 ds_max_rtn_i64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
88 ds_max_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
89 ds_max_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
90 ds_max_src2_f32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
91 ds_max_src2_f64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
92 ds_max_src2_i32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
93 ds_max_src2_i64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
94 ds_max_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
95 ds_max_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
96 ds_max_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
97 ds_max_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
98 ds_min_f32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
99 ds_min_f64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
100 ds_min_i32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
101 ds_min_i64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
102 ds_min_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
103 ds_min_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
104 ds_min_rtn_i32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
105 ds_min_rtn_i64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
106 ds_min_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
107 ds_min_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
108 ds_min_src2_f32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
109 ds_min_src2_f64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
110 ds_min_src2_i32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
111 ds_min_src2_i64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
112 ds_min_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
113 ds_min_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
114 ds_min_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
115 ds_min_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
116 ds_mskor_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
117 ds_mskor_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
118 ds_mskor_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
119 ds_mskor_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
120120 ds_nop
121 ds_or_b32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
122 ds_or_b64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
123 ds_or_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
124 ds_or_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
125 ds_or_src2_b32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
126 ds_or_src2_b64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
127 ds_ordered_count :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
128 ds_permute_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16`
129 ds_read2_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
130 ds_read2_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
131 ds_read2st64_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
132 ds_read2st64_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
133 ds_read_b128 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
134 ds_read_b32 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
135 ds_read_b64 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
136 ds_read_b96 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
137 ds_read_i16 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
138 ds_read_i8 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
139 ds_read_u16 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
140 ds_read_u8 :ref:`vdst`, :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
141 ds_rsub_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
142 ds_rsub_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
143 ds_rsub_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
144 ds_rsub_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
145 ds_rsub_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
146 ds_rsub_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
147 ds_sub_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
148 ds_sub_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
149 ds_sub_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
150 ds_sub_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
151 ds_sub_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
152 ds_sub_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
153 ds_swizzle_b32 :ref:`vdst`, :ref:`vaddr` :ref:`sw_offset16` :ref:`gds`
154 ds_wrap_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
155 ds_write2_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
156 ds_write2_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
157 ds_write2st64_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
158 ds_write2st64_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
159 ds_write_b128 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
160 ds_write_b16 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
161 ds_write_b32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
162 ds_write_b64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
163 ds_write_b8 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
164 ds_write_b96 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
165 ds_write_src2_b32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
166 ds_write_src2_b64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
167 ds_wrxchg2_rtn_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
168 ds_wrxchg2_rtn_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
169 ds_wrxchg2st64_rtn_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
170 ds_wrxchg2st64_rtn_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset8` :ref:`ds_offset8` :ref:`gds`
171 ds_wrxchg_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
172 ds_wrxchg_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
173 ds_xor_b32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
174 ds_xor_b64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
175 ds_xor_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
176 ds_xor_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
177 ds_xor_src2_b32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
178 ds_xor_src2_b64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
121 ds_or_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
122 ds_or_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
123 ds_or_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
124 ds_or_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
125 ds_or_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
126 ds_or_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
127 ds_ordered_count :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
128 ds_permute_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16`
129 ds_read2_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
130 ds_read2_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
131 ds_read2st64_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
132 ds_read2st64_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr` :ref:`offset8` :ref:`offset8` :ref:`gds`
133 ds_read_b128 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
134 ds_read_b32 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
135 ds_read_b64 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
136 ds_read_b96 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
137 ds_read_i16 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
138 ds_read_i8 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
139 ds_read_u16 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
140 ds_read_u8 :ref:`vdst`, :ref:`vaddr` :ref:`offset16` :ref:`gds`
141 ds_rsub_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
142 ds_rsub_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
143 ds_rsub_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
144 ds_rsub_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
145 ds_rsub_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
146 ds_rsub_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
147 ds_sub_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
148 ds_sub_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
149 ds_sub_src2_u32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
150 ds_sub_src2_u64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
151 ds_sub_u32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
152 ds_sub_u64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
153 ds_swizzle_b32 :ref:`vdst`, :ref:`vaddr` :ref:`pattern` :ref:`gds`
154 ds_wrap_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset16` :ref:`gds`
155 ds_write2_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
156 ds_write2_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
157 ds_write2st64_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
158 ds_write2st64_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
159 ds_write_b128 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
160 ds_write_b16 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
161 ds_write_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
162 ds_write_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
163 ds_write_b8 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
164 ds_write_b96 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
165 ds_write_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
166 ds_write_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
167 ds_wrxchg2_rtn_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
168 ds_wrxchg2_rtn_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
169 ds_wrxchg2st64_rtn_b32 :ref:`vdst`::ref:`b32x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
170 ds_wrxchg2st64_rtn_b64 :ref:`vdst`::ref:`b64x2`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`offset8` :ref:`offset8` :ref:`gds`
171 ds_wrxchg_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
172 ds_wrxchg_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
173 ds_xor_b32 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
174 ds_xor_b64 :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
175 ds_xor_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
176 ds_xor_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`offset16` :ref:`gds`
177 ds_xor_src2_b32 :ref:`vaddr` :ref:`offset16` :ref:`gds`
178 ds_xor_src2_b64 :ref:`vaddr` :ref:`offset16` :ref:`gds`
179179
180180 EXP
181181 -----------------------
192192 .. parsed-literal::
193193
194194 **INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
195 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
195 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
196196 flat_atomic_add :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`glc` :ref:`slc`
197197 flat_atomic_add_x2 :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`glc` :ref:`slc`
198198 flat_atomic_and :ref:`vdst`::ref:`opt`, :ref:`vaddr`, :ref:`vdata` :ref:`glc` :ref:`slc`
336336
337337 .. parsed-literal::
338338
339 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
340 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
341 buffer_atomic_add :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
342 buffer_atomic_add_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
343 buffer_atomic_and :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
344 buffer_atomic_and_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
345 buffer_atomic_cmpswap :ref:`vdata`::ref:`dst`::ref:`b32x2`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
346 buffer_atomic_cmpswap_x2 :ref:`vdata`::ref:`dst`::ref:`b64x2`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
347 buffer_atomic_dec :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
348 buffer_atomic_dec_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
349 buffer_atomic_inc :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
350 buffer_atomic_inc_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
351 buffer_atomic_or :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
352 buffer_atomic_or_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
353 buffer_atomic_smax :ref:`vdata`::ref:`dst`::ref:`s32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
354 buffer_atomic_smax_x2 :ref:`vdata`::ref:`dst`::ref:`s64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
355 buffer_atomic_smin :ref:`vdata`::ref:`dst`::ref:`s32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
356 buffer_atomic_smin_x2 :ref:`vdata`::ref:`dst`::ref:`s64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
357 buffer_atomic_sub :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
358 buffer_atomic_sub_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
359 buffer_atomic_swap :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
360 buffer_atomic_swap_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
361 buffer_atomic_umax :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
362 buffer_atomic_umax_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
363 buffer_atomic_umin :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
364 buffer_atomic_umin_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
365 buffer_atomic_xor :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
366 buffer_atomic_xor_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
367 buffer_load_dword :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
368 buffer_load_dwordx2 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
369 buffer_load_dwordx3 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
370 buffer_load_dwordx4 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
371 buffer_load_format_d16_x :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
372 buffer_load_format_d16_xy :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
373 buffer_load_format_d16_xyz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
374 buffer_load_format_d16_xyzw :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
375 buffer_load_format_x :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
376 buffer_load_format_xy :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
377 buffer_load_format_xyz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
378 buffer_load_format_xyzw :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
379 buffer_load_sbyte :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
380 buffer_load_sshort :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
381 buffer_load_ubyte :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
382 buffer_load_ushort :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc` :ref:`lds`
383 buffer_store_byte :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
384 buffer_store_dword :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
385 buffer_store_dwordx2 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
386 buffer_store_dwordx3 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
387 buffer_store_dwordx4 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
388 buffer_store_format_d16_x :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
389 buffer_store_format_d16_xy :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
390 buffer_store_format_d16_xyz :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
391 buffer_store_format_d16_xyzw :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
392 buffer_store_format_x :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
393 buffer_store_format_xy :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
394 buffer_store_format_xyz :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
395 buffer_store_format_xyzw :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
396 buffer_store_lds_dword :ref:`srsrc`, :ref:`soffset` :ref:`buf_offset12` :ref:`lds` :ref:`glc` :ref:`slc`
397 buffer_store_short :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`buf_offset12` :ref:`glc` :ref:`slc`
339 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
340 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
341 buffer_atomic_add :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
342 buffer_atomic_add_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
343 buffer_atomic_and :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
344 buffer_atomic_and_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
345 buffer_atomic_cmpswap :ref:`vdata`::ref:`dst`::ref:`b32x2`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
346 buffer_atomic_cmpswap_x2 :ref:`vdata`::ref:`dst`::ref:`b64x2`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
347 buffer_atomic_dec :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
348 buffer_atomic_dec_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
349 buffer_atomic_inc :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
350 buffer_atomic_inc_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
351 buffer_atomic_or :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
352 buffer_atomic_or_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
353 buffer_atomic_smax :ref:`vdata`::ref:`dst`::ref:`s32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
354 buffer_atomic_smax_x2 :ref:`vdata`::ref:`dst`::ref:`s64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
355 buffer_atomic_smin :ref:`vdata`::ref:`dst`::ref:`s32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
356 buffer_atomic_smin_x2 :ref:`vdata`::ref:`dst`::ref:`s64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
357 buffer_atomic_sub :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
358 buffer_atomic_sub_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
359 buffer_atomic_swap :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
360 buffer_atomic_swap_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
361 buffer_atomic_umax :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
362 buffer_atomic_umax_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
363 buffer_atomic_umin :ref:`vdata`::ref:`dst`::ref:`u32`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
364 buffer_atomic_umin_x2 :ref:`vdata`::ref:`dst`::ref:`u64`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
365 buffer_atomic_xor :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
366 buffer_atomic_xor_x2 :ref:`vdata`::ref:`dst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
367 buffer_load_dword :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
368 buffer_load_dwordx2 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
369 buffer_load_dwordx3 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
370 buffer_load_dwordx4 :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
371 buffer_load_format_d16_x :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
372 buffer_load_format_d16_xy :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
373 buffer_load_format_d16_xyz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
374 buffer_load_format_d16_xyzw :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
375 buffer_load_format_x :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
376 buffer_load_format_xy :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
377 buffer_load_format_xyz :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
378 buffer_load_format_xyzw :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
379 buffer_load_sbyte :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
380 buffer_load_sshort :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
381 buffer_load_ubyte :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
382 buffer_load_ushort :ref:`vdst`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc` :ref:`lds`
383 buffer_store_byte :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
384 buffer_store_dword :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
385 buffer_store_dwordx2 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
386 buffer_store_dwordx3 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
387 buffer_store_dwordx4 :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
388 buffer_store_format_d16_x :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
389 buffer_store_format_d16_xy :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
390 buffer_store_format_d16_xyz :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
391 buffer_store_format_d16_xyzw :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
392 buffer_store_format_x :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
393 buffer_store_format_xy :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
394 buffer_store_format_xyz :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
395 buffer_store_format_xyzw :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
396 buffer_store_lds_dword :ref:`srsrc`, :ref:`soffset` :ref:`offset12` :ref:`lds` :ref:`glc` :ref:`slc`
397 buffer_store_short :ref:`vdata`, :ref:`vaddr`, :ref:`srsrc`, :ref:`soffset` :ref:`idxen` :ref:`offen` :ref:`offset12` :ref:`glc` :ref:`slc`
398398 buffer_wbinvl1
399399 buffer_wbinvl1_vol
400400
404404 .. parsed-literal::
405405
406406 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
407 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
407 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
408408 s_atc_probe :ref:`imm3`, :ref:`sbase`, :ref:`soffset`
409409 s_atc_probe_buffer :ref:`imm3`, :ref:`sbase`, :ref:`soffset`
410410 s_buffer_load_dword :ref:`sdst`, :ref:`sbase`, :ref:`soffset` :ref:`glc`
845845
846846 .. parsed-literal::
847847
848 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
849 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
850 v_add_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
851 v_add_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
852 v_add_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
853 v_add_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
854 v_add_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
855 v_add_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
856 v_add_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
857 v_add_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
858 v_add_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
859 v_add_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
860 v_add_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
861 v_add_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
862 v_addc_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
863 v_addc_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
864 v_addc_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m`, :ref:`vcc` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
865 v_and_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
866 v_and_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
867 v_and_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
868 v_ashrrev_i16 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`vsrc1`
869 v_ashrrev_i16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u16`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
870 v_ashrrev_i16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u16`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
871 v_ashrrev_i32 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`vsrc1`
872 v_ashrrev_i32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
873 v_ashrrev_i32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u32`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
874 v_cndmask_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
875 v_cndmask_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
876 v_cndmask_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m`, :ref:`vcc` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
877 v_ldexp_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`::ref:`i16`
878 v_ldexp_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`i16` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
879 v_ldexp_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m`::ref:`i16` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
880 v_lshlrev_b16 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`vsrc1`
881 v_lshlrev_b16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u16`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
882 v_lshlrev_b16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u16`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
883 v_lshlrev_b32 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`vsrc1`
884 v_lshlrev_b32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
885 v_lshlrev_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u32`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
886 v_lshrrev_b16 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`vsrc1`
887 v_lshrrev_b16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u16`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
888 v_lshrrev_b16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u16`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
889 v_lshrrev_b32 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`vsrc1`
890 v_lshrrev_b32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
891 v_lshrrev_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u32`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
892 v_mac_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
893 v_mac_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
894 v_mac_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
895 v_mac_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
896 v_mac_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
897 v_mac_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
898 v_madak_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`, :ref:`imm32`
899 v_madak_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`, :ref:`imm32`
900 v_madmk_f16 :ref:`vdst`, :ref:`src0`, :ref:`imm32`, :ref:`vsrc2`
901 v_madmk_f32 :ref:`vdst`, :ref:`src0`, :ref:`imm32`, :ref:`vsrc2`
902 v_max_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
903 v_max_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
904 v_max_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
905 v_max_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
906 v_max_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
907 v_max_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
908 v_max_i16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
909 v_max_i16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
910 v_max_i16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
911 v_max_i32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
912 v_max_i32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
913 v_max_i32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
914 v_max_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
915 v_max_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
916 v_max_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
917 v_max_u32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
918 v_max_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
919 v_max_u32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
920 v_min_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
921 v_min_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
922 v_min_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
923 v_min_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
924 v_min_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
925 v_min_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
926 v_min_i16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
927 v_min_i16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
928 v_min_i16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
929 v_min_i32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
930 v_min_i32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
931 v_min_i32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
932 v_min_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
933 v_min_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
934 v_min_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
935 v_min_u32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
936 v_min_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
937 v_min_u32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
938 v_mul_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
939 v_mul_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
940 v_mul_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
941 v_mul_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
942 v_mul_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
943 v_mul_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
944 v_mul_hi_i32_i24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
945 v_mul_hi_i32_i24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
946 v_mul_hi_i32_i24_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
947 v_mul_hi_u32_u24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
948 v_mul_hi_u32_u24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
949 v_mul_hi_u32_u24_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
950 v_mul_i32_i24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
951 v_mul_i32_i24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
952 v_mul_i32_i24_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
953 v_mul_legacy_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
954 v_mul_legacy_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
955 v_mul_legacy_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
956 v_mul_lo_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
957 v_mul_lo_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
958 v_mul_lo_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
959 v_mul_u32_u24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
960 v_mul_u32_u24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
961 v_mul_u32_u24_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
962 v_or_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
963 v_or_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
964 v_or_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
965 v_sub_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
966 v_sub_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
967 v_sub_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
968 v_sub_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
969 v_sub_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
970 v_sub_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
971 v_sub_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
972 v_sub_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
973 v_sub_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
974 v_sub_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
975 v_sub_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
976 v_sub_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
977 v_subb_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
978 v_subb_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
979 v_subb_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m`, :ref:`vcc` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
980 v_subbrev_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
981 v_subbrev_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
982 v_subbrev_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m`, :ref:`vcc` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
983 v_subrev_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
984 v_subrev_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
985 v_subrev_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
986 v_subrev_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
987 v_subrev_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
988 v_subrev_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
989 v_subrev_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
990 v_subrev_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
991 v_subrev_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
992 v_subrev_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
993 v_subrev_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
994 v_subrev_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
995 v_xor_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
996 v_xor_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
997 v_xor_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
848 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
849 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
850 v_add_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
851 v_add_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
852 v_add_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
853 v_add_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
854 v_add_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
855 v_add_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
856 v_add_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
857 v_add_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
858 v_add_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
859 v_add_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
860 v_add_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
861 v_add_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
862 v_addc_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
863 v_addc_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
864 v_addc_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m`, :ref:`vcc` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
865 v_and_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
866 v_and_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
867 v_and_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
868 v_ashrrev_i16 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`vsrc1`
869 v_ashrrev_i16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u16`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
870 v_ashrrev_i16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u16`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
871 v_ashrrev_i32 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`vsrc1`
872 v_ashrrev_i32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
873 v_ashrrev_i32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u32`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
874 v_cndmask_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
875 v_cndmask_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
876 v_cndmask_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m`, :ref:`vcc` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
877 v_ldexp_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`::ref:`i16`
878 v_ldexp_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`i16` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
879 v_ldexp_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m`::ref:`i16` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
880 v_lshlrev_b16 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`vsrc1`
881 v_lshlrev_b16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u16`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
882 v_lshlrev_b16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u16`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
883 v_lshlrev_b32 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`vsrc1`
884 v_lshlrev_b32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
885 v_lshlrev_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u32`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
886 v_lshrrev_b16 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`vsrc1`
887 v_lshrrev_b16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u16`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
888 v_lshrrev_b16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u16`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
889 v_lshrrev_b32 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`vsrc1`
890 v_lshrrev_b32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`u32`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
891 v_lshrrev_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`u32`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
892 v_mac_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
893 v_mac_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
894 v_mac_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
895 v_mac_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
896 v_mac_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
897 v_mac_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
898 v_madak_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`, :ref:`imm32`
899 v_madak_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`, :ref:`imm32`
900 v_madmk_f16 :ref:`vdst`, :ref:`src0`, :ref:`imm32`, :ref:`vsrc2`
901 v_madmk_f32 :ref:`vdst`, :ref:`src0`, :ref:`imm32`, :ref:`vsrc2`
902 v_max_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
903 v_max_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
904 v_max_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
905 v_max_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
906 v_max_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
907 v_max_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
908 v_max_i16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
909 v_max_i16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
910 v_max_i16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
911 v_max_i32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
912 v_max_i32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
913 v_max_i32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
914 v_max_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
915 v_max_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
916 v_max_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
917 v_max_u32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
918 v_max_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
919 v_max_u32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
920 v_min_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
921 v_min_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
922 v_min_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
923 v_min_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
924 v_min_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
925 v_min_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
926 v_min_i16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
927 v_min_i16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
928 v_min_i16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
929 v_min_i32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
930 v_min_i32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
931 v_min_i32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
932 v_min_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
933 v_min_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
934 v_min_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
935 v_min_u32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
936 v_min_u32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
937 v_min_u32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
938 v_mul_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
939 v_mul_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
940 v_mul_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
941 v_mul_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
942 v_mul_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
943 v_mul_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
944 v_mul_hi_i32_i24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
945 v_mul_hi_i32_i24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
946 v_mul_hi_i32_i24_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
947 v_mul_hi_u32_u24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
948 v_mul_hi_u32_u24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
949 v_mul_hi_u32_u24_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
950 v_mul_i32_i24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
951 v_mul_i32_i24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
952 v_mul_i32_i24_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
953 v_mul_legacy_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
954 v_mul_legacy_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
955 v_mul_legacy_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
956 v_mul_lo_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
957 v_mul_lo_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
958 v_mul_lo_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
959 v_mul_u32_u24 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
960 v_mul_u32_u24_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
961 v_mul_u32_u24_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
962 v_or_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
963 v_or_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
964 v_or_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
965 v_sub_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
966 v_sub_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
967 v_sub_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
968 v_sub_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
969 v_sub_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
970 v_sub_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
971 v_sub_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
972 v_sub_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
973 v_sub_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
974 v_sub_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
975 v_sub_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
976 v_sub_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
977 v_subb_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
978 v_subb_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
979 v_subb_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m`, :ref:`vcc` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
980 v_subbrev_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`, :ref:`vcc`
981 v_subbrev_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1`, :ref:`vcc` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
982 v_subbrev_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m`, :ref:`vcc` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
983 v_subrev_f16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
984 v_subrev_f16_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
985 v_subrev_f16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
986 v_subrev_f32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
987 v_subrev_f32_dpp :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
988 v_subrev_f32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
989 v_subrev_u16 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
990 v_subrev_u16_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
991 v_subrev_u16_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
992 v_subrev_u32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`vsrc1`
993 v_subrev_u32_dpp :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
994 v_subrev_u32_sdwa :ref:`vdst`, :ref:`vcc`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`clamp` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
995 v_xor_b32 :ref:`vdst`, :ref:`src0`, :ref:`vsrc1`
996 v_xor_b32_dpp :ref:`vdst`, :ref:`vsrc0`, :ref:`vsrc1` :ref:`dpp_ctrl` :ref:`row_mask` :ref:`bank_mask` :ref:`bound_ctrl`
997 v_xor_b32_sdwa :ref:`vdst`, :ref:`vsrc0`::ref:`m`, :ref:`vsrc1`::ref:`m` :ref:`dst_sel` :ref:`dst_unused` :ref:`src0_sel` :ref:`src1_sel`
998998
999999 VOP3
10001000 -----------------------
10011001
10021002 .. parsed-literal::
10031003
1004 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
1005 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1006 v_add_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1007 v_add_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1008 v_add_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1009 v_add_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1010 v_add_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`
1011 v_addc_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2`
1012 v_alignbit_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1013 v_alignbyte_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1014 v_and_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1015 v_ashrrev_i16_e64 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`src1`
1016 v_ashrrev_i32_e64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1017 v_ashrrev_i64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1018 v_bcnt_u32_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1019 v_bfe_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`::ref:`u32`, :ref:`src2`::ref:`u32`
1020 v_bfe_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1021 v_bfi_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1022 v_bfm_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1023 v_bfrev_b32_e64 :ref:`vdst`, :ref:`src`
1024 v_ceil_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1025 v_ceil_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1026 v_ceil_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1004 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
1005 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
1006 v_add_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1007 v_add_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1008 v_add_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1009 v_add_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1010 v_add_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`
1011 v_addc_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2`
1012 v_alignbit_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1013 v_alignbyte_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1014 v_and_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1015 v_ashrrev_i16_e64 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`src1`
1016 v_ashrrev_i32_e64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1017 v_ashrrev_i64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1018 v_bcnt_u32_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1019 v_bfe_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`::ref:`u32`, :ref:`src2`::ref:`u32`
1020 v_bfe_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1021 v_bfi_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1022 v_bfm_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1023 v_bfrev_b32_e64 :ref:`vdst`, :ref:`src`
1024 v_ceil_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1025 v_ceil_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1026 v_ceil_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
10271027 v_clrexcp_e64
1028 v_cmp_class_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1029 v_cmp_class_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1030 v_cmp_class_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1031 v_cmp_eq_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1032 v_cmp_eq_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1033 v_cmp_eq_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1034 v_cmp_eq_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1035 v_cmp_eq_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1036 v_cmp_eq_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1037 v_cmp_eq_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1038 v_cmp_eq_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1039 v_cmp_eq_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1040 v_cmp_f_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1041 v_cmp_f_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1042 v_cmp_f_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1043 v_cmp_f_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1044 v_cmp_f_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1045 v_cmp_f_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1046 v_cmp_f_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1047 v_cmp_f_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1048 v_cmp_f_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1049 v_cmp_ge_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1050 v_cmp_ge_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1051 v_cmp_ge_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1052 v_cmp_ge_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1053 v_cmp_ge_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1054 v_cmp_ge_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1055 v_cmp_ge_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1056 v_cmp_ge_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1057 v_cmp_ge_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1058 v_cmp_gt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1059 v_cmp_gt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1060 v_cmp_gt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1061 v_cmp_gt_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1062 v_cmp_gt_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1063 v_cmp_gt_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1064 v_cmp_gt_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1065 v_cmp_gt_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1066 v_cmp_gt_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1067 v_cmp_le_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1068 v_cmp_le_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1069 v_cmp_le_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1070 v_cmp_le_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1071 v_cmp_le_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1072 v_cmp_le_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1073 v_cmp_le_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1074 v_cmp_le_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1075 v_cmp_le_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1076 v_cmp_lg_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1077 v_cmp_lg_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1078 v_cmp_lg_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1079 v_cmp_lt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1080 v_cmp_lt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1081 v_cmp_lt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1082 v_cmp_lt_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1083 v_cmp_lt_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1084 v_cmp_lt_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1085 v_cmp_lt_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1086 v_cmp_lt_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1087 v_cmp_lt_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1088 v_cmp_ne_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1089 v_cmp_ne_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1090 v_cmp_ne_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1091 v_cmp_ne_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1092 v_cmp_ne_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1093 v_cmp_ne_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1094 v_cmp_neq_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1095 v_cmp_neq_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1096 v_cmp_neq_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1097 v_cmp_nge_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1098 v_cmp_nge_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1099 v_cmp_nge_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1100 v_cmp_ngt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1101 v_cmp_ngt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1102 v_cmp_ngt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1103 v_cmp_nle_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1104 v_cmp_nle_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1105 v_cmp_nle_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1106 v_cmp_nlg_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1107 v_cmp_nlg_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1108 v_cmp_nlg_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1109 v_cmp_nlt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1110 v_cmp_nlt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1111 v_cmp_nlt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1112 v_cmp_o_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1113 v_cmp_o_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1114 v_cmp_o_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1115 v_cmp_t_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1116 v_cmp_t_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1117 v_cmp_t_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1118 v_cmp_t_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1119 v_cmp_t_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1120 v_cmp_t_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1121 v_cmp_tru_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1122 v_cmp_tru_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1123 v_cmp_tru_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1124 v_cmp_u_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1125 v_cmp_u_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1126 v_cmp_u_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1127 v_cmpx_class_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1128 v_cmpx_class_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1129 v_cmpx_class_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1130 v_cmpx_eq_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1131 v_cmpx_eq_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1132 v_cmpx_eq_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1133 v_cmpx_eq_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1134 v_cmpx_eq_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1135 v_cmpx_eq_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1136 v_cmpx_eq_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1137 v_cmpx_eq_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1138 v_cmpx_eq_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1139 v_cmpx_f_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1140 v_cmpx_f_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1141 v_cmpx_f_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1142 v_cmpx_f_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1143 v_cmpx_f_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1144 v_cmpx_f_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1145 v_cmpx_f_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1146 v_cmpx_f_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1147 v_cmpx_f_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1148 v_cmpx_ge_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1149 v_cmpx_ge_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1150 v_cmpx_ge_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1151 v_cmpx_ge_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1152 v_cmpx_ge_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1153 v_cmpx_ge_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1154 v_cmpx_ge_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1155 v_cmpx_ge_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1156 v_cmpx_ge_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1157 v_cmpx_gt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1158 v_cmpx_gt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1159 v_cmpx_gt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1160 v_cmpx_gt_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1161 v_cmpx_gt_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1162 v_cmpx_gt_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1163 v_cmpx_gt_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1164 v_cmpx_gt_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1165 v_cmpx_gt_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1166 v_cmpx_le_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1167 v_cmpx_le_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1168 v_cmpx_le_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1169 v_cmpx_le_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1170 v_cmpx_le_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1171 v_cmpx_le_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1172 v_cmpx_le_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1173 v_cmpx_le_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1174 v_cmpx_le_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1175 v_cmpx_lg_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1176 v_cmpx_lg_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1177 v_cmpx_lg_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1178 v_cmpx_lt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1179 v_cmpx_lt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1180 v_cmpx_lt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1181 v_cmpx_lt_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1182 v_cmpx_lt_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1183 v_cmpx_lt_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1184 v_cmpx_lt_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1185 v_cmpx_lt_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1186 v_cmpx_lt_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1187 v_cmpx_ne_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1188 v_cmpx_ne_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1189 v_cmpx_ne_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1190 v_cmpx_ne_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1191 v_cmpx_ne_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1192 v_cmpx_ne_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1193 v_cmpx_neq_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1194 v_cmpx_neq_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1195 v_cmpx_neq_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1196 v_cmpx_nge_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1197 v_cmpx_nge_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1198 v_cmpx_nge_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1199 v_cmpx_ngt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1200 v_cmpx_ngt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1201 v_cmpx_ngt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1202 v_cmpx_nle_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1203 v_cmpx_nle_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1204 v_cmpx_nle_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1205 v_cmpx_nlg_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1206 v_cmpx_nlg_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1207 v_cmpx_nlg_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1208 v_cmpx_nlt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1209 v_cmpx_nlt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1210 v_cmpx_nlt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1211 v_cmpx_o_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1212 v_cmpx_o_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1213 v_cmpx_o_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1214 v_cmpx_t_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1215 v_cmpx_t_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1216 v_cmpx_t_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1217 v_cmpx_t_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1218 v_cmpx_t_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1219 v_cmpx_t_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1220 v_cmpx_tru_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1221 v_cmpx_tru_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1222 v_cmpx_tru_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1223 v_cmpx_u_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1224 v_cmpx_u_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1225 v_cmpx_u_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1226 v_cndmask_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2`
1227 v_cos_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1228 v_cos_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1229 v_cubeid_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1230 v_cubema_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1231 v_cubesc_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1232 v_cubetc_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1233 v_cvt_f16_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1234 v_cvt_f16_i16_e64 :ref:`vdst`, :ref:`src` :ref:`clamp`
1235 v_cvt_f16_u16_e64 :ref:`vdst`, :ref:`src` :ref:`clamp`
1236 v_cvt_f32_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1237 v_cvt_f32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1238 v_cvt_f32_i32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1239 v_cvt_f32_u32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1240 v_cvt_f32_ubyte0_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1241 v_cvt_f32_ubyte1_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1242 v_cvt_f32_ubyte2_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1243 v_cvt_f32_ubyte3_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1244 v_cvt_f64_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1245 v_cvt_f64_i32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1246 v_cvt_f64_u32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1247 v_cvt_flr_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1248 v_cvt_i16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1249 v_cvt_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1250 v_cvt_i32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1251 v_cvt_off_f32_i4_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1252 v_cvt_pk_i16_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1253 v_cvt_pk_u16_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1254 v_cvt_pk_u8_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`u32`, :ref:`src2`::ref:`u32`
1255 v_cvt_pkaccum_u8_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`u32`
1256 v_cvt_pknorm_i16_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`
1257 v_cvt_pknorm_u16_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`
1258 v_cvt_pkrtz_f16_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`
1259 v_cvt_rpi_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1260 v_cvt_u16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1261 v_cvt_u32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1262 v_cvt_u32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1263 v_div_fixup_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp`
1264 v_div_fixup_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1265 v_div_fixup_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1266 v_div_fmas_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1267 v_div_fmas_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1268 v_div_scale_f32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1269 v_div_scale_f64 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1270 v_exp_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1271 v_exp_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1272 v_exp_legacy_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1273 v_ffbh_i32_e64 :ref:`vdst`, :ref:`src`
1274 v_ffbh_u32_e64 :ref:`vdst`, :ref:`src`
1275 v_ffbl_b32_e64 :ref:`vdst`, :ref:`src`
1276 v_floor_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1277 v_floor_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1278 v_floor_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1279 v_fma_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp`
1280 v_fma_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1281 v_fma_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1282 v_fract_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1283 v_fract_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1284 v_fract_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1285 v_frexp_exp_i16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1286 v_frexp_exp_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1287 v_frexp_exp_i32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1288 v_frexp_mant_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1289 v_frexp_mant_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1290 v_frexp_mant_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1291 v_interp_mov_f32_e64 :ref:`vdst`, :ref:`param`::ref:`b32`, :ref:`attr`::ref:`b32` :ref:`clamp` :ref:`omod`
1292 v_interp_p1_f32_e64 :ref:`vdst`, :ref:`vsrc`::ref:`m`, :ref:`attr`::ref:`b32` :ref:`clamp` :ref:`omod`
1293 v_interp_p1ll_f16 :ref:`vdst`::ref:`f32`, :ref:`vsrc`::ref:`m`::ref:`f32`, :ref:`attr`::ref:`b32` :ref:`high` :ref:`clamp` :ref:`omod`
1294 v_interp_p1lv_f16 :ref:`vdst`::ref:`f32`, :ref:`vsrc0`::ref:`m`::ref:`f32`, :ref:`attr`::ref:`b32`, :ref:`vsrc2`::ref:`m`::ref:`f16x2` :ref:`high` :ref:`clamp` :ref:`omod`
1295 v_interp_p2_f16 :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`f32`, :ref:`attr`::ref:`b32`, :ref:`vsrc2`::ref:`m`::ref:`f32` :ref:`high` :ref:`clamp`
1296 v_interp_p2_f32_e64 :ref:`vdst`, :ref:`vsrc`::ref:`m`, :ref:`attr`::ref:`b32` :ref:`clamp` :ref:`omod`
1297 v_ldexp_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`i16` :ref:`clamp`
1298 v_ldexp_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`i32` :ref:`clamp` :ref:`omod`
1299 v_ldexp_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`i32` :ref:`clamp` :ref:`omod`
1300 v_lerp_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`b32`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b32`
1301 v_log_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1302 v_log_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1303 v_log_legacy_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1304 v_lshlrev_b16_e64 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`src1`
1305 v_lshlrev_b32_e64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1306 v_lshlrev_b64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1307 v_lshrrev_b16_e64 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`src1`
1308 v_lshrrev_b32_e64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1309 v_lshrrev_b64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1310 v_mac_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1311 v_mac_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1312 v_mad_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp`
1313 v_mad_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1314 v_mad_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`clamp`
1315 v_mad_i32_i24 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`i32` :ref:`clamp`
1316 v_mad_i64_i32 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`i64` :ref:`clamp`
1317 v_mad_legacy_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1318 v_mad_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`clamp`
1319 v_mad_u32_u24 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`u32` :ref:`clamp`
1320 v_mad_u64_u32 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`u64` :ref:`clamp`
1321 v_max3_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1322 v_max3_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1323 v_max3_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1324 v_max_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1325 v_max_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1326 v_max_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1327 v_max_i16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1328 v_max_i32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1329 v_max_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1330 v_max_u32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1331 v_mbcnt_hi_u32_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1332 v_mbcnt_lo_u32_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1333 v_med3_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1334 v_med3_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1335 v_med3_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1336 v_min3_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1337 v_min3_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1338 v_min3_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1339 v_min_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1340 v_min_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1341 v_min_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1342 v_min_i16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1343 v_min_i32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1344 v_min_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1345 v_min_u32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1346 v_mov_b32_e64 :ref:`vdst`, :ref:`src`
1347 v_mov_fed_b32_e64 :ref:`vdst`, :ref:`src`
1348 v_movreld_b32_e64 :ref:`vdst`, :ref:`src`
1349 v_movrels_b32_e64 :ref:`vdst`, :ref:`vsrc`
1350 v_movrelsd_b32_e64 :ref:`vdst`, :ref:`vsrc`
1351 v_mqsad_pk_u16_u8 :ref:`vdst`::ref:`b64`, :ref:`src0`::ref:`b64`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b64` :ref:`clamp`
1352 v_mqsad_u32_u8 :ref:`vdst`::ref:`b128`, :ref:`src0`::ref:`b64`, :ref:`src1`::ref:`b32`, :ref:`vsrc2`::ref:`b128` :ref:`clamp`
1353 v_msad_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`b32`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b32` :ref:`clamp`
1354 v_mul_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1355 v_mul_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1356 v_mul_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1357 v_mul_hi_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1358 v_mul_hi_i32_i24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1359 v_mul_hi_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1360 v_mul_hi_u32_u24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1361 v_mul_i32_i24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1362 v_mul_legacy_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1363 v_mul_lo_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1364 v_mul_lo_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1365 v_mul_u32_u24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1>`
1028 v_cmp_class_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32>`
1029 v_cmp_class_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1030 v_cmp_class_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1031 v_cmp_eq_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1032 v_cmp_eq_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1033 v_cmp_eq_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1034 v_cmp_eq_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1035 v_cmp_eq_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1036 v_cmp_eq_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1037 v_cmp_eq_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1038 v_cmp_eq_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1039 v_cmp_eq_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1040 v_cmp_f_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1041 v_cmp_f_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1042 v_cmp_f_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1043 v_cmp_f_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1044 v_cmp_f_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1045 v_cmp_f_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1046 v_cmp_f_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1047 v_cmp_f_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1048 v_cmp_f_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1049 v_cmp_ge_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1050 v_cmp_ge_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1051 v_cmp_ge_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1052 v_cmp_ge_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1053 v_cmp_ge_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1054 v_cmp_ge_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1055 v_cmp_ge_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1056 v_cmp_ge_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1057 v_cmp_ge_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1058 v_cmp_gt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1059 v_cmp_gt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1060 v_cmp_gt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1061 v_cmp_gt_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1062 v_cmp_gt_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1063 v_cmp_gt_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1064 v_cmp_gt_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1065 v_cmp_gt_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1066 v_cmp_gt_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1067 v_cmp_le_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1068 v_cmp_le_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1069 v_cmp_le_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1070 v_cmp_le_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1071 v_cmp_le_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1072 v_cmp_le_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1073 v_cmp_le_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1074 v_cmp_le_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1075 v_cmp_le_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1076 v_cmp_lg_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1077 v_cmp_lg_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1078 v_cmp_lg_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1079 v_cmp_lt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1080 v_cmp_lt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1081 v_cmp_lt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1082 v_cmp_lt_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1083 v_cmp_lt_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1084 v_cmp_lt_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1085 v_cmp_lt_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1086 v_cmp_lt_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1087 v_cmp_lt_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1088 v_cmp_ne_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1089 v_cmp_ne_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1090 v_cmp_ne_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1091 v_cmp_ne_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1092 v_cmp_ne_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1093 v_cmp_ne_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1094 v_cmp_neq_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1095 v_cmp_neq_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1096 v_cmp_neq_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1097 v_cmp_nge_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1098 v_cmp_nge_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1099 v_cmp_nge_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1100 v_cmp_ngt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1101 v_cmp_ngt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1102 v_cmp_ngt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1103 v_cmp_nle_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1104 v_cmp_nle_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1105 v_cmp_nle_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1106 v_cmp_nlg_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1107 v_cmp_nlg_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1108 v_cmp_nlg_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1109 v_cmp_nlt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1110 v_cmp_nlt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1111 v_cmp_nlt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1112 v_cmp_o_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1113 v_cmp_o_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1114 v_cmp_o_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1115 v_cmp_t_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1116 v_cmp_t_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1117 v_cmp_t_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1118 v_cmp_t_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1119 v_cmp_t_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1120 v_cmp_t_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1121 v_cmp_tru_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1122 v_cmp_tru_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1123 v_cmp_tru_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1124 v_cmp_u_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1125 v_cmp_u_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1126 v_cmp_u_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1127 v_cmpx_class_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1128 v_cmpx_class_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1129 v_cmpx_class_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`b32`
1130 v_cmpx_eq_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1131 v_cmpx_eq_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1132 v_cmpx_eq_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1133 v_cmpx_eq_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1134 v_cmpx_eq_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1135 v_cmpx_eq_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1136 v_cmpx_eq_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1137 v_cmpx_eq_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1138 v_cmpx_eq_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1139 v_cmpx_f_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1140 v_cmpx_f_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1141 v_cmpx_f_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1142 v_cmpx_f_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1143 v_cmpx_f_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1144 v_cmpx_f_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1145 v_cmpx_f_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1146 v_cmpx_f_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1147 v_cmpx_f_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1148 v_cmpx_ge_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1149 v_cmpx_ge_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1150 v_cmpx_ge_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1151 v_cmpx_ge_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1152 v_cmpx_ge_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1153 v_cmpx_ge_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1154 v_cmpx_ge_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1155 v_cmpx_ge_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1156 v_cmpx_ge_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1157 v_cmpx_gt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1158 v_cmpx_gt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1159 v_cmpx_gt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1160 v_cmpx_gt_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1161 v_cmpx_gt_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1162 v_cmpx_gt_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1163 v_cmpx_gt_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1164 v_cmpx_gt_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1165 v_cmpx_gt_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1166 v_cmpx_le_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1167 v_cmpx_le_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1168 v_cmpx_le_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1169 v_cmpx_le_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1170 v_cmpx_le_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1171 v_cmpx_le_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1172 v_cmpx_le_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1173 v_cmpx_le_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1174 v_cmpx_le_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1175 v_cmpx_lg_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1176 v_cmpx_lg_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1177 v_cmpx_lg_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1178 v_cmpx_lt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1179 v_cmpx_lt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1180 v_cmpx_lt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1181 v_cmpx_lt_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1182 v_cmpx_lt_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1183 v_cmpx_lt_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1184 v_cmpx_lt_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1185 v_cmpx_lt_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1186 v_cmpx_lt_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1187 v_cmpx_ne_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1188 v_cmpx_ne_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1189 v_cmpx_ne_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1190 v_cmpx_ne_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1191 v_cmpx_ne_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1192 v_cmpx_ne_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1193 v_cmpx_neq_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1194 v_cmpx_neq_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1195 v_cmpx_neq_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1196 v_cmpx_nge_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1197 v_cmpx_nge_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1198 v_cmpx_nge_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1199 v_cmpx_ngt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1200 v_cmpx_ngt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1201 v_cmpx_ngt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1202 v_cmpx_nle_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1203 v_cmpx_nle_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1204 v_cmpx_nle_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1205 v_cmpx_nlg_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1206 v_cmpx_nlg_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1207 v_cmpx_nlg_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1208 v_cmpx_nlt_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1209 v_cmpx_nlt_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1210 v_cmpx_nlt_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1211 v_cmpx_o_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1212 v_cmpx_o_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1213 v_cmpx_o_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1214 v_cmpx_t_i16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1215 v_cmpx_t_i32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1216 v_cmpx_t_i64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1217 v_cmpx_t_u16_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1218 v_cmpx_t_u32_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1219 v_cmpx_t_u64_e64 :ref:`sdst`, :ref:`src0`, :ref:`src1`
1220 v_cmpx_tru_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1221 v_cmpx_tru_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1222 v_cmpx_tru_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1223 v_cmpx_u_f16_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1224 v_cmpx_u_f32_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1225 v_cmpx_u_f64_e64 :ref:`sdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1226 v_cndmask_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2`
1227 v_cos_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1228 v_cos_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1229 v_cubeid_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1230 v_cubema_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1231 v_cubesc_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1232 v_cubetc_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1233 v_cvt_f16_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1234 v_cvt_f16_i16_e64 :ref:`vdst`, :ref:`src` :ref:`clamp`
1235 v_cvt_f16_u16_e64 :ref:`vdst`, :ref:`src` :ref:`clamp`
1236 v_cvt_f32_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1237 v_cvt_f32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1238 v_cvt_f32_i32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1239 v_cvt_f32_u32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1240 v_cvt_f32_ubyte0_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1241 v_cvt_f32_ubyte1_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1242 v_cvt_f32_ubyte2_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1243 v_cvt_f32_ubyte3_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1244 v_cvt_f64_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1245 v_cvt_f64_i32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1246 v_cvt_f64_u32_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1247 v_cvt_flr_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1248 v_cvt_i16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1249 v_cvt_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1250 v_cvt_i32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1251 v_cvt_off_f32_i4_e64 :ref:`vdst`, :ref:`src` :ref:`clamp` :ref:`omod`
1252 v_cvt_pk_i16_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1253 v_cvt_pk_u16_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1254 v_cvt_pk_u8_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`u32`, :ref:`src2`::ref:`u32`
1255 v_cvt_pkaccum_u8_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`u32`
1256 v_cvt_pknorm_i16_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`
1257 v_cvt_pknorm_u16_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`
1258 v_cvt_pkrtz_f16_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`
1259 v_cvt_rpi_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1260 v_cvt_u16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1261 v_cvt_u32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1262 v_cvt_u32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1263 v_div_fixup_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp`
1264 v_div_fixup_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1265 v_div_fixup_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1266 v_div_fmas_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1267 v_div_fmas_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1268 v_div_scale_f32 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1269 v_div_scale_f64 :ref:`vdst`, :ref:`vcc`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1270 v_exp_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1271 v_exp_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1272 v_exp_legacy_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1273 v_ffbh_i32_e64 :ref:`vdst`, :ref:`src`
1274 v_ffbh_u32_e64 :ref:`vdst`, :ref:`src`
1275 v_ffbl_b32_e64 :ref:`vdst`, :ref:`src`
1276 v_floor_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1277 v_floor_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1278 v_floor_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1279 v_fma_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp`
1280 v_fma_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1281 v_fma_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1282 v_fract_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1283 v_fract_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1284 v_fract_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1285 v_frexp_exp_i16_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1286 v_frexp_exp_i32_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1287 v_frexp_exp_i32_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m`
1288 v_frexp_mant_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1289 v_frexp_mant_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1290 v_frexp_mant_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1291 v_interp_mov_f32_e64 :ref:`vdst`, :ref:`param`::ref:`b32`, :ref:`attr`::ref:`b32` :ref:`clamp` :ref:`omod`
1292 v_interp_p1_f32_e64 :ref:`vdst`, :ref:`vsrc`::ref:`m`, :ref:`attr`::ref:`b32` :ref:`clamp` :ref:`omod`
1293 v_interp_p1ll_f16 :ref:`vdst`::ref:`f32`, :ref:`vsrc`::ref:`m`::ref:`f32`, :ref:`attr`::ref:`b32` :ref:`high` :ref:`clamp` :ref:`omod`
1294 v_interp_p1lv_f16 :ref:`vdst`::ref:`f32`, :ref:`vsrc0`::ref:`m`::ref:`f32`, :ref:`attr`::ref:`b32`, :ref:`vsrc2`::ref:`m`::ref:`f16x2` :ref:`high` :ref:`clamp` :ref:`omod`
1295 v_interp_p2_f16 :ref:`vdst`, :ref:`vsrc0`::ref:`m`::ref:`f32`, :ref:`attr`::ref:`b32`, :ref:`vsrc2`::ref:`m`::ref:`f32` :ref:`high` :ref:`clamp`
1296 v_interp_p2_f32_e64 :ref:`vdst`, :ref:`vsrc`::ref:`m`, :ref:`attr`::ref:`b32` :ref:`clamp` :ref:`omod`
1297 v_ldexp_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`i16` :ref:`clamp`
1298 v_ldexp_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`i32` :ref:`clamp` :ref:`omod`
1299 v_ldexp_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`i32` :ref:`clamp` :ref:`omod`
1300 v_lerp_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`b32`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b32`
1301 v_log_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1302 v_log_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1303 v_log_legacy_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1304 v_lshlrev_b16_e64 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`src1`
1305 v_lshlrev_b32_e64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1306 v_lshlrev_b64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1307 v_lshrrev_b16_e64 :ref:`vdst`, :ref:`src0`::ref:`u16`, :ref:`src1`
1308 v_lshrrev_b32_e64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1309 v_lshrrev_b64 :ref:`vdst`, :ref:`src0`::ref:`u32`, :ref:`src1`
1310 v_mac_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1311 v_mac_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1312 v_mad_f16 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp`
1313 v_mad_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1314 v_mad_i16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`clamp`
1315 v_mad_i32_i24 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`i32` :ref:`clamp`
1316 v_mad_i64_i32 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`i64` :ref:`clamp`
1317 v_mad_legacy_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1318 v_mad_u16 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`clamp`
1319 v_mad_u32_u24 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`u32` :ref:`clamp`
1320 v_mad_u64_u32 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`::ref:`u64` :ref:`clamp`
1321 v_max3_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1322 v_max3_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1323 v_max3_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1324 v_max_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1325 v_max_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1326 v_max_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1327 v_max_i16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1328 v_max_i32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1329 v_max_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1330 v_max_u32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1331 v_mbcnt_hi_u32_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1332 v_mbcnt_lo_u32_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1333 v_med3_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1334 v_med3_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1335 v_med3_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1336 v_min3_f32 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m`, :ref:`src2`::ref:`m` :ref:`clamp` :ref:`omod`
1337 v_min3_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1338 v_min3_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1339 v_min_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1340 v_min_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1341 v_min_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1342 v_min_i16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1343 v_min_i32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1344 v_min_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1345 v_min_u32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1346 v_mov_b32_e64 :ref:`vdst`, :ref:`src`
1347 v_mov_fed_b32_e64 :ref:`vdst`, :ref:`src`
1348 v_movreld_b32_e64 :ref:`vdst`, :ref:`src`
1349 v_movrels_b32_e64 :ref:`vdst`, :ref:`vsrc`
1350 v_movrelsd_b32_e64 :ref:`vdst`, :ref:`vsrc`
1351 v_mqsad_pk_u16_u8 :ref:`vdst`::ref:`b64`, :ref:`src0`::ref:`b64`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b64` :ref:`clamp`
1352 v_mqsad_u32_u8 :ref:`vdst`::ref:`b128`, :ref:`src0`::ref:`b64`, :ref:`src1`::ref:`b32`, :ref:`vsrc2`::ref:`b128` :ref:`clamp`
1353 v_msad_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`b32`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b32` :ref:`clamp`
1354 v_mul_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1355 v_mul_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1356 v_mul_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1357 v_mul_hi_i32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1358 v_mul_hi_i32_i24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1359 v_mul_hi_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1360 v_mul_hi_u32_u24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1361 v_mul_i32_i24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1362 v_mul_legacy_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1363 v_mul_lo_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1364 v_mul_lo_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1365 v_mul_u32_u24_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
13661366 v_nop_e64
1367 v_not_b32_e64 :ref:`vdst`, :ref:`src`
1368 v_or_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1369 v_perm_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1370 v_qsad_pk_u16_u8 :ref:`vdst`::ref:`b64`, :ref:`src0`::ref:`b64`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b64` :ref:`clamp`
1371 v_rcp_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1372 v_rcp_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1373 v_rcp_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1374 v_rcp_iflag_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1375 v_readlane_b32 :ref:`sdst`, :ref:`vsrc0`, :ref:`ssrc1`
1376 v_rndne_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1377 v_rndne_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1378 v_rndne_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1379 v_rsq_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1380 v_rsq_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1381 v_rsq_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1382 v_sad_hi_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`u8x4`, :ref:`src1`::ref:`u8x4`, :ref:`src2`::ref:`u32` :ref:`clamp`
1383 v_sad_u16 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`u16x2`, :ref:`src1`::ref:`u16x2`, :ref:`src2`::ref:`u32` :ref:`clamp`
1384 v_sad_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`clamp`
1385 v_sad_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`u8x4`, :ref:`src1`::ref:`u8x4`, :ref:`src2`::ref:`u32` :ref:`clamp`
1386 v_sin_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1387 v_sin_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1388 v_sqrt_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1389 v_sqrt_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1390 v_sqrt_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1391 v_sub_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1392 v_sub_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1393 v_sub_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1394 v_sub_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`
1395 v_subb_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2`
1396 v_subbrev_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2`
1397 v_subrev_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1398 v_subrev_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1399 v_subrev_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1400 v_subrev_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`
1401 v_trig_preop_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`u32` :ref:`clamp` :ref:`omod`
1402 v_trunc_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1403 v_trunc_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1404 v_trunc_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1405 v_writelane_b32 :ref:`vdst`, :ref:`ssrc0`, :ref:`ssrc1`
1406 v_xor_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1367 v_not_b32_e64 :ref:`vdst`, :ref:`src`
1368 v_or_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1369 v_perm_b32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2`
1370 v_qsad_pk_u16_u8 :ref:`vdst`::ref:`b64`, :ref:`src0`::ref:`b64`, :ref:`src1`::ref:`b32`, :ref:`src2`::ref:`b64` :ref:`clamp`
1371 v_rcp_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1372 v_rcp_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1373 v_rcp_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1374 v_rcp_iflag_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1375 v_readlane_b32 :ref:`sdst`, :ref:`vsrc0`, :ref:`ssrc1`
1376 v_rndne_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1377 v_rndne_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1378 v_rndne_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1379 v_rsq_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1380 v_rsq_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1381 v_rsq_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1382 v_sad_hi_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`u8x4`, :ref:`src1`::ref:`u8x4`, :ref:`src2`::ref:`u32` :ref:`clamp`
1383 v_sad_u16 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`u16x2`, :ref:`src1`::ref:`u16x2`, :ref:`src2`::ref:`u32` :ref:`clamp`
1384 v_sad_u32 :ref:`vdst`, :ref:`src0`, :ref:`src1`, :ref:`src2` :ref:`clamp`
1385 v_sad_u8 :ref:`vdst`::ref:`u32`, :ref:`src0`::ref:`u8x4`, :ref:`src1`::ref:`u8x4`, :ref:`src2`::ref:`u32` :ref:`clamp`
1386 v_sin_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1387 v_sin_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1388 v_sqrt_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1389 v_sqrt_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1390 v_sqrt_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1391 v_sub_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1392 v_sub_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1393 v_sub_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1394 v_sub_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`
1395 v_subb_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2`
1396 v_subbrev_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`, :ref:`ssrc2`
1397 v_subrev_f16_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp`
1398 v_subrev_f32_e64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`m` :ref:`clamp` :ref:`omod`
1399 v_subrev_u16_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
1400 v_subrev_u32_e64 :ref:`vdst`, :ref:`sdst`, :ref:`src0`, :ref:`src1`
1401 v_trig_preop_f64 :ref:`vdst`, :ref:`src0`::ref:`m`, :ref:`src1`::ref:`u32` :ref:`clamp` :ref:`omod`
1402 v_trunc_f16_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp`
1403 v_trunc_f32_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1404 v_trunc_f64_e64 :ref:`vdst`, :ref:`src`::ref:`m` :ref:`clamp` :ref:`omod`
1405 v_writelane_b32 :ref:`vdst`, :ref:`ssrc0`, :ref:`ssrc1`
1406 v_xor_b32_e64 :ref:`vdst`, :ref:`src0`, :ref:`src1`
14071407
14081408 VOPC
14091409 -----------------------
3131 .. parsed-literal::
3232
3333 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
34 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
35 ds_add_f32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
36 ds_add_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
37 ds_add_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
38 ds_add_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
39 ds_add_src2_f32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
40 ds_add_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
41 ds_add_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
42 ds_add_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
43 ds_add_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
44 ds_and_b32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
45 ds_and_b64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
46 ds_and_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
47 ds_and_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
48 ds_and_src2_b32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
49 ds_and_src2_b64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
50 ds_append :ref:`vdst` :ref:`ds_offset16` :ref:`gds`
51 ds_bpermute_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16`
52 ds_cmpst_b32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
53 ds_cmpst_b64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
54 ds_cmpst_f32 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
55 ds_cmpst_f64 :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
56 ds_cmpst_rtn_b32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
57 ds_cmpst_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
58 ds_cmpst_rtn_f32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
59 ds_cmpst_rtn_f64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata0`, :ref:`vdata1` :ref:`ds_offset16` :ref:`gds`
60 ds_condxchg32_rtn_b64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
61 ds_consume :ref:`vdst` :ref:`ds_offset16` :ref:`gds`
62 ds_dec_rtn_u32 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
63 ds_dec_rtn_u64 :ref:`vdst`, :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
64 ds_dec_src2_u32 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
65 ds_dec_src2_u64 :ref:`vaddr` :ref:`ds_offset16` :ref:`gds`
66 ds_dec_u32 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
67 ds_dec_u64 :ref:`vaddr`, :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
68 ds_gws_barrier :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
69 ds_gws_init :ref:`vdata` :ref:`ds_offset16` :ref:`gds`
70 ds_gws_sema_br :ref:`vdata` :ref:`ds_offset16