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ps][microMIPS] Add R_MICROMIPS_PC21_S1 relocation Differential Revision: http://reviews.llvm.org/D15526 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270048 91177308-0d34-0410-b5e6-96231b3b80d8 Zoran Jovanovic 4 years ago
7 changed file(s) with 42 addition(s) and 4 deletion(s). Raw diff Collapse all Expand all
107107 ELF_RELOC(R_MICROMIPS_TLS_TPREL_LO16, 170)
108108 ELF_RELOC(R_MICROMIPS_GPREL7_S2, 172)
109109 ELF_RELOC(R_MICROMIPS_PC23_S2, 173)
110 ELF_RELOC(R_MICROMIPS_PC21_S2, 174)
110 ELF_RELOC(R_MICROMIPS_PC21_S1, 174)
111111 ELF_RELOC(R_MICROMIPS_PC26_S1, 175)
112112 ELF_RELOC(R_MICROMIPS_PC18_S3, 176)
113113 ELF_RELOC(R_MICROMIPS_PC19_S2, 177)
188188 return 0;
189189 }
190190 break;
191
191 case Mips::fixup_MICROMIPS_PC21_S1:
192 // Forcing a signed division because Value can be negative.
193 Value = (int64_t)Value / 2;
194 // We now check if Value can be encoded as a 21-bit signed immediate.
195 if (!isInt<21>(Value) && Ctx) {
196 Ctx->reportError(Fixup.getLoc(), "out of range PC21 fixup");
197 return 0;
198 }
199 break;
192200 }
193201
194202 return Value;
342350 { "fixup_MICROMIPS_PC26_S1", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
343351 { "fixup_MICROMIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
344352 { "fixup_MICROMIPS_PC18_S3", 0, 18, MCFixupKindInfo::FKF_IsPCRel },
353 { "fixup_MICROMIPS_PC21_S1", 0, 21, MCFixupKindInfo::FKF_IsPCRel },
345354 { "fixup_MICROMIPS_CALL16", 0, 16, 0 },
346355 { "fixup_MICROMIPS_GOT_DISP", 0, 16, 0 },
347356 { "fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 },
410419 { "fixup_MICROMIPS_PC26_S1", 6, 26, MCFixupKindInfo::FKF_IsPCRel },
411420 { "fixup_MICROMIPS_PC19_S2",13, 19, MCFixupKindInfo::FKF_IsPCRel },
412421 { "fixup_MICROMIPS_PC18_S3",14, 18, MCFixupKindInfo::FKF_IsPCRel },
422 { "fixup_MICROMIPS_PC21_S1",11, 21, MCFixupKindInfo::FKF_IsPCRel },
413423 { "fixup_MICROMIPS_CALL16", 16, 16, 0 },
414424 { "fixup_MICROMIPS_GOT_DISP", 16, 16, 0 },
415425 { "fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 },
246246 return ELF::R_MICROMIPS_PC19_S2;
247247 case Mips::fixup_MICROMIPS_PC18_S3:
248248 return ELF::R_MICROMIPS_PC18_S3;
249 case Mips::fixup_MICROMIPS_PC21_S1:
250 return ELF::R_MICROMIPS_PC21_S1;
249251 case Mips::fixup_MIPS_PC19_S2:
250252 return ELF::R_MIPS_PC19_S2;
251253 case Mips::fixup_MIPS_PC18_S3:
607609 case ELF::R_MICROMIPS_TLS_TPREL_LO16:
608610 case ELF::R_MICROMIPS_GPREL7_S2:
609611 case ELF::R_MICROMIPS_PC23_S2:
610 case ELF::R_MICROMIPS_PC21_S2:
612 case ELF::R_MICROMIPS_PC21_S1:
611613 case ELF::R_MICROMIPS_PC26_S1:
612614 case ELF::R_MICROMIPS_PC18_S3:
613615 case ELF::R_MICROMIPS_PC19_S2:
175175 // resulting in - R_MICROMIPS_PC18_S3
176176 fixup_MICROMIPS_PC18_S3,
177177
178 // resulting in - R_MICROMIPS_PC21_S1
179 fixup_MICROMIPS_PC21_S1,
180
178181 // resulting in - R_MICROMIPS_CALL16
179182 fixup_MICROMIPS_CALL16,
180183
383383 assert(MO.isExpr() &&
384384 "getBranchTarget21OpValueMM expects only expressions or immediates");
385385
386 // TODO: Push fixup.
386 const MCExpr *FixupExpression = MCBinaryExpr::createAdd(
387 MO.getExpr(), MCConstantExpr::create(-4, Ctx), Ctx);
388 Fixups.push_back(MCFixup::create(0, FixupExpression,
389 MCFixupKind(Mips::fixup_MICROMIPS_PC21_S1)));
387390 return 0;
388391 }
389392
1616 # CHECK-FIXUP: lwpc $2, bar # encoding: [0x78,0b01001AAA,A,A]
1717 # CHECK-FIXUP: # fixup A - offset: 0,
1818 # CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
19 # CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
20 # CHECK-FIXUP: # fixup A - offset: 0,
21 # CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
22 # CHECK-FIXUP: bnezc $3, bar # encoding: [0xa0,0b011AAAAA,A,A]
23 # CHECK-FIXUP: # fixup A - offset: 0,
24 # CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
1925 #------------------------------------------------------------------------------
2026 # Check that the appropriate relocations were created.
2127 #------------------------------------------------------------------------------
2430 # CHECK-ELF: 0x4 R_MICROMIPS_PC26_S1 bar 0x0
2531 # CHECK-ELF: 0x8 R_MICROMIPS_PC19_S2 bar 0x0
2632 # CHECK-ELF: 0xC R_MICROMIPS_PC19_S2 bar 0x0
33 # CHECK-ELF: 0x10 R_MICROMIPS_PC21_S1 bar 0x0
34 # CHECK-ELF: 0x14 R_MICROMIPS_PC21_S1 bar 0x0
2735 # CHECK-ELF: ]
2836
2937 balc bar
3038 bc bar
3139 addiupc $2,bar
3240 lwpc $2,bar
41 beqzc $3, bar
42 bnezc $3, bar
1919 # CHECK-FIXUP: ldpc $2, bar # encoding: [0x78,0b010110AA,A,A]
2020 # CHECK-FIXUP: # fixup A - offset: 0,
2121 # CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC18_S3
22 # CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
23 # CHECK-FIXUP: # fixup A - offset: 0,
24 # CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
25 # CHECK-FIXUP: bnezc $3, bar # encoding: [0xa0,0b011AAAAA,A,A]
26 # CHECK-FIXUP: # fixup A - offset: 0,
27 # CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
2228 #------------------------------------------------------------------------------
2329 # Check that the appropriate relocations were created.
2430 #------------------------------------------------------------------------------
2834 # CHECK-ELF: 0x8 R_MICROMIPS_PC19_S2 bar 0x0
2935 # CHECK-ELF: 0xC R_MICROMIPS_PC19_S2 bar 0x0
3036 # CHECK-ELF: 0x10 R_MICROMIPS_PC18_S3 bar 0x0
37 # CHECK-ELF: 0x14 R_MICROMIPS_PC21_S1 bar 0x0
38 # CHECK-ELF: 0x18 R_MICROMIPS_PC21_S1 bar 0x0
3139 # CHECK-ELF: ]
3240
3341 balc bar
3543 addiupc $2,bar
3644 lwpc $2,bar
3745 ldpc $2, bar
46 beqzc $3, bar
47 bnezc $3, bar