llvm.org GIT mirror llvm / 775dd6e
Avoid caching the relocation model on the subtarget, this is for two reasons: a) we're already caching the target machine which contains it, b) which relocation model you get is dependent upon whether or not you ask before MCCodeGenInfo is constructed on the target machine, so avoid any latent issues there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213420 91177308-0d34-0410-b5e6-96231b3b80d8 Eric Christopher 5 years ago
3 changed file(s) with 10 addition(s) and 11 deletion(s). Raw diff Collapse all Expand all
103103
104104 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
105105 const std::string &FS, bool little,
106 Reloc::Model _RM, MipsTargetMachine *_TM)
106 MipsTargetMachine *_TM)
107107 : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32),
108108 MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false),
109109 IsFPXX(false), IsFP64bit(false), UseOddSPReg(true), IsNaN2008bit(false),
112112 HasMips4_32r2(false), HasMips5_32r2(false), InMips16Mode(false),
113113 InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false),
114114 HasDSPR2(false), AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16),
115 HasMSA(false), RM(_RM), OverrideMode(NoOverride), TM(_TM),
116 TargetTriple(TT),
115 HasMSA(false), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT),
117116 DL(computeDataLayout(initializeSubtargetDependencies(CPU, FS, TM))),
118117 TSInfo(DL), JITInfo(), InstrInfo(MipsInstrInfo::create(*TM)),
119118 FrameLowering(MipsFrameLowering::create(*TM, *this)),
173172 // Set UseSmallSection.
174173 // TODO: Investigate the IsLinux check. I suspect it's really checking for
175174 // bare-metal.
176 UseSmallSection = !IsLinux && (RM == Reloc::Static);
175 UseSmallSection = !IsLinux && (TM->getRelocationModel() == Reloc::Static);
177176 }
178177
179178 /// This overrides the PostRAScheduler bit in the SchedModel for any CPU.
293292 DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n");
294293 return Mips16ConstantIslands;
295294 }
295
296 Reloc::Model MipsSubtarget::getRelocationModel() const {
297 return TM->getRelocationModel();
298 }
133133 bool HasMSA;
134134
135135 InstrItineraryData InstrItins;
136
137 // Relocation Model
138 Reloc::Model RM;
139136
140137 // We can override the determination of whether we are in mips16 mode
141138 // as from the command line
175172 /// This constructor initializes the data members to match that
176173 /// of the specified triple.
177174 MipsSubtarget(const std::string &TT, const std::string &CPU,
178 const std::string &FS, bool little, Reloc::Model RM,
179 MipsTargetMachine *TM);
175 const std::string &FS, bool little, MipsTargetMachine *TM);
180176
181177 /// ParseSubtargetFeatures - Parses features string setting specified
182178 /// subtarget options. Definition of function is auto generated by tblgen.
275271 unsigned stackAlignment() const { return hasMips64() ? 16 : 8; }
276272
277273 // Grab relocation model
278 Reloc::Model getRelocationModel() const {return RM;}
274 Reloc::Model getRelocationModel() const;
279275
280276 /// \brief Reset the subtarget for the Mips target.
281277 void resetSubtarget(MachineFunction *MF);
5555 Reloc::Model RM, CodeModel::Model CM,
5656 CodeGenOpt::Level OL, bool isLittle)
5757 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
58 Subtarget(TT, CPU, FS, isLittle, RM, this) {
58 Subtarget(TT, CPU, FS, isLittle, this) {
5959 initAsmInfo();
6060 }
6161