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Merging r275869: ------------------------------------------------------------------------ r275869 | arsenm | 2016-07-18 11:34:53 -0700 (Mon, 18 Jul 2016) | 7 lines AMDGPU: Remove dead check in AMDGPUPromoteAlloca This is currently only called with GEP users. A direct alloca would only happen with current typed pointers for arrays which are a perverse case. Also fix crashes on 0 x and 1 x arrays. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@277077 91177308-0d34-0410-b5e6-96231b3b80d8 Hans Wennborg 4 years ago
3 changed file(s) with 130 addition(s) and 43 deletion(s). Raw diff Collapse all Expand all
347347 static Value *
348348 calculateVectorIndex(Value *Ptr,
349349 const std::map &GEPIdx) {
350 if (isa(Ptr))
351 return Constant::getNullValue(Type::getInt32Ty(Ptr->getContext()));
352
353350 GetElementPtrInst *GEP = cast(Ptr);
354351
355352 auto I = GEPIdx.find(GEP);
359356 static Value* GEPToVectorIndex(GetElementPtrInst *GEP) {
360357 // FIXME we only support simple cases
361358 if (GEP->getNumOperands() != 3)
362 return NULL;
359 return nullptr;
363360
364361 ConstantInt *I0 = dyn_cast(GEP->getOperand(1));
365362 if (!I0 || !I0->isZero())
366 return NULL;
363 return nullptr;
367364
368365 return GEP->getOperand(2);
369366 }
397394 // are just being conservative for now.
398395 if (!AllocaTy ||
399396 AllocaTy->getElementType()->isVectorTy() ||
400 AllocaTy->getNumElements() > 4) {
397 AllocaTy->getNumElements() > 4 ||
398 AllocaTy->getNumElements() < 2) {
401399 DEBUG(dbgs() << " Cannot convert type to vector\n");
402400 return false;
403401 }
442440 IRBuilder<> Builder(Inst);
443441 switch (Inst->getOpcode()) {
444442 case Instruction::Load: {
443 Type *VecPtrTy = VectorTy->getPointerTo(AMDGPUAS::PRIVATE_ADDRESS);
445444 Value *Ptr = Inst->getOperand(0);
446445 Value *Index = calculateVectorIndex(Ptr, GEPVectorIdx);
447 Value *BitCast = Builder.CreateBitCast(Alloca, VectorTy->getPointerTo(0));
446
447 Value *BitCast = Builder.CreateBitCast(Alloca, VecPtrTy);
448448 Value *VecValue = Builder.CreateLoad(BitCast);
449449 Value *ExtractElement = Builder.CreateExtractElement(VecValue, Index);
450450 Inst->replaceAllUsesWith(ExtractElement);
452452 break;
453453 }
454454 case Instruction::Store: {
455 Type *VecPtrTy = VectorTy->getPointerTo(AMDGPUAS::PRIVATE_ADDRESS);
456
455457 Value *Ptr = Inst->getOperand(1);
456458 Value *Index = calculateVectorIndex(Ptr, GEPVectorIdx);
457 Value *BitCast = Builder.CreateBitCast(Alloca, VectorTy->getPointerTo(0));
459 Value *BitCast = Builder.CreateBitCast(Alloca, VecPtrTy);
458460 Value *VecValue = Builder.CreateLoad(BitCast);
459461 Value *NewVecValue = Builder.CreateInsertElement(VecValue,
460462 Inst->getOperand(0),
468470 break;
469471
470472 default:
471 Inst->dump();
472473 llvm_unreachable("Inconsistency in instructions promotable to vector");
473474 }
474475 }
416416 ret void
417417 }
418418
419 ; HSAOPT: !0 = !{}
420 ; HSAOPT: !1 = !{i32 0, i32 2048}
421
422 ; NOHSAOPT: !0 = !{i32 0, i32 2048}
423
424
425419 ; FUNC-LABEL: v16i32_stack:
426420
427421 ; R600: MOVA_INT
526520 ret void
527521 }
528522
523 ; OPT-LABEL: @direct_alloca_read_0xi32(
524 ; OPT: store [0 x i32] undef, [0 x i32] addrspace(3)*
525 ; OPT: load [0 x i32], [0 x i32] addrspace(3)*
526 define void @direct_alloca_read_0xi32([0 x i32] addrspace(1)* %out, i32 %index) {
527 entry:
528 %tmp = alloca [0 x i32]
529 store [0 x i32] [], [0 x i32]* %tmp
530 %load = load [0 x i32], [0 x i32]* %tmp
531 store [0 x i32] %load, [0 x i32] addrspace(1)* %out
532 ret void
533 }
534
535 ; OPT-LABEL: @direct_alloca_read_1xi32(
536 ; OPT: store [1 x i32] zeroinitializer, [1 x i32] addrspace(3)*
537 ; OPT: load [1 x i32], [1 x i32] addrspace(3)*
538 define void @direct_alloca_read_1xi32([1 x i32] addrspace(1)* %out, i32 %index) {
539 entry:
540 %tmp = alloca [1 x i32]
541 store [1 x i32] [i32 0], [1 x i32]* %tmp
542 %load = load [1 x i32], [1 x i32]* %tmp
543 store [1 x i32] %load, [1 x i32] addrspace(1)* %out
544 ret void
545 }
546
529547 attributes #0 = { nounwind "amdgpu-max-waves-per-eu"="2" }
548
549 ; HSAOPT: !0 = !{}
550 ; HSAOPT: !1 = !{i32 0, i32 2048}
551
552 ; NOHSAOPT: !0 = !{i32 0, i32 2048}
22 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC %s
33 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC %s
44 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG -check-prefix=FUNC %s
5 ; RUN: opt -S -mtriple=amdgcn-- -amdgpu-promote-alloca -sroa -instcombine < %s | FileCheck -check-prefix=OPT %s
6
7 ; OPT-LABEL: @vector_read(
8 ; OPT: %0 = extractelement <4 x i32> , i32 %index
9 ; OPT: store i32 %0, i32 addrspace(1)* %out, align 4
510
611 ; FUNC-LABEL: {{^}}vector_read:
712 ; EG: MOV
1116 ; EG: MOVA_INT
1217 define void @vector_read(i32 addrspace(1)* %out, i32 %index) {
1318 entry:
14 %0 = alloca [4 x i32]
15 %x = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 0
16 %y = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 1
17 %z = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 2
18 %w = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 3
19 %tmp = alloca [4 x i32]
20 %x = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 0
21 %y = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 1
22 %z = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 2
23 %w = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 3
1924 store i32 0, i32* %x
2025 store i32 1, i32* %y
2126 store i32 2, i32* %z
2227 store i32 3, i32* %w
23 %1 = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 %index
24 %2 = load i32, i32* %1
25 store i32 %2, i32 addrspace(1)* %out
28 %tmp1 = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 %index
29 %tmp2 = load i32, i32* %tmp1
30 store i32 %tmp2, i32 addrspace(1)* %out
2631 ret void
2732 }
33
34 ; OPT-LABEL: @vector_write(
35 ; OPT: %0 = insertelement <4 x i32> zeroinitializer, i32 1, i32 %w_index
36 ; OPT: %1 = extractelement <4 x i32> %0, i32 %r_index
37 ; OPT: store i32 %1, i32 addrspace(1)* %out, align 4
2838
2939 ; FUNC-LABEL: {{^}}vector_write:
3040 ; EG: MOV
3545 ; EG: MOVA_INT
3646 define void @vector_write(i32 addrspace(1)* %out, i32 %w_index, i32 %r_index) {
3747 entry:
38 %0 = alloca [4 x i32]
39 %x = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 0
40 %y = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 1
41 %z = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 2
42 %w = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 3
48 %tmp = alloca [4 x i32]
49 %x = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 0
50 %y = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 1
51 %z = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 2
52 %w = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 3
4353 store i32 0, i32* %x
4454 store i32 0, i32* %y
4555 store i32 0, i32* %z
4656 store i32 0, i32* %w
47 %1 = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 %w_index
48 store i32 1, i32* %1
49 %2 = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 %r_index
50 %3 = load i32, i32* %2
51 store i32 %3, i32 addrspace(1)* %out
57 %tmp1 = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 %w_index
58 store i32 1, i32* %tmp1
59 %tmp2 = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 %r_index
60 %tmp3 = load i32, i32* %tmp2
61 store i32 %tmp3, i32 addrspace(1)* %out
5262 ret void
5363 }
5464
5565 ; This test should be optimize to:
5666 ; store i32 0, i32 addrspace(1)* %out
67
68 ; OPT-LABEL: @bitcast_gep(
69 ; OPT-LABEL: store i32 0, i32 addrspace(1)* %out, align 4
70
5771 ; FUNC-LABEL: {{^}}bitcast_gep:
5872 ; EG: STORE_RAW
5973 define void @bitcast_gep(i32 addrspace(1)* %out, i32 %w_index, i32 %r_index) {
6074 entry:
61 %0 = alloca [4 x i32]
62 %x = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 0
63 %y = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 1
64 %z = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 2
65 %w = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 3
75 %tmp = alloca [4 x i32]
76 %x = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 0
77 %y = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 1
78 %z = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 2
79 %w = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 3
6680 store i32 0, i32* %x
6781 store i32 0, i32* %y
6882 store i32 0, i32* %z
6983 store i32 0, i32* %w
70 %1 = getelementptr [4 x i32], [4 x i32]* %0, i32 0, i32 1
71 %2 = bitcast i32* %1 to [4 x i32]*
72 %3 = getelementptr [4 x i32], [4 x i32]* %2, i32 0, i32 0
73 %4 = load i32, i32* %3
74 store i32 %4, i32 addrspace(1)* %out
84 %tmp1 = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 1
85 %tmp2 = bitcast i32* %tmp1 to [4 x i32]*
86 %tmp3 = getelementptr [4 x i32], [4 x i32]* %tmp2, i32 0, i32 0
87 %tmp4 = load i32, i32* %tmp3
88 store i32 %tmp4, i32 addrspace(1)* %out
7589 ret void
7690 }
91
92 ; OPT-LABEL: @vector_read_bitcast_gep(
93 ; OPT: %0 = extractelement <4 x i32> , i32 %index
94 ; OPT: store i32 %0, i32 addrspace(1)* %out, align 4
95 define void @vector_read_bitcast_gep(i32 addrspace(1)* %out, i32 %index) {
96 entry:
97 %tmp = alloca [4 x i32]
98 %x = getelementptr inbounds [4 x i32], [4 x i32]* %tmp, i32 0, i32 0
99 %y = getelementptr inbounds [4 x i32], [4 x i32]* %tmp, i32 0, i32 1
100 %z = getelementptr inbounds [4 x i32], [4 x i32]* %tmp, i32 0, i32 2
101 %w = getelementptr inbounds [4 x i32], [4 x i32]* %tmp, i32 0, i32 3
102 %bc = bitcast i32* %x to float*
103 store float 1.0, float* %bc
104 store i32 1, i32* %y
105 store i32 2, i32* %z
106 store i32 3, i32* %w
107 %tmp1 = getelementptr inbounds [4 x i32], [4 x i32]* %tmp, i32 0, i32 %index
108 %tmp2 = load i32, i32* %tmp1
109 store i32 %tmp2, i32 addrspace(1)* %out
110 ret void
111 }
112
113 ; FIXME: Should be able to promote this. Instcombine should fold the
114 ; cast in the hasOneUse case so it might not matter in practice
115
116 ; OPT-LABEL: @vector_read_bitcast_alloca(
117 ; OPT: alloca [4 x float]
118 ; OPT: store float
119 ; OPT: store float
120 ; OPT: store float
121 ; OPT: store float
122 ; OPT: load float
123 define void @vector_read_bitcast_alloca(float addrspace(1)* %out, i32 %index) {
124 entry:
125 %tmp = alloca [4 x i32]
126 %tmp.bc = bitcast [4 x i32]* %tmp to [4 x float]*
127 %x = getelementptr inbounds [4 x float], [4 x float]* %tmp.bc, i32 0, i32 0
128 %y = getelementptr inbounds [4 x float], [4 x float]* %tmp.bc, i32 0, i32 1
129 %z = getelementptr inbounds [4 x float], [4 x float]* %tmp.bc, i32 0, i32 2
130 %w = getelementptr inbounds [4 x float], [4 x float]* %tmp.bc, i32 0, i32 3
131 store float 0.0, float* %x
132 store float 1.0, float* %y
133 store float 2.0, float* %z
134 store float 4.0, float* %w
135 %tmp1 = getelementptr inbounds [4 x float], [4 x float]* %tmp.bc, i32 0, i32 %index
136 %tmp2 = load float, float* %tmp1
137 store float %tmp2, float addrspace(1)* %out
138 ret void
139 }