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Merge r328945 which corrected the fundamental structure of the `adox` instructions. This is necessary to fully merge the EFLAGS fix patch series. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@332932 91177308-0d34-0410-b5e6-96231b3b80d8 Chandler Carruth 2 years ago
1 changed file(s) with 12 addition(s) and 20 deletion(s). Raw diff Collapse all Expand all
13331333 }
13341334
13351335 //===----------------------------------------------------------------------===//
1336 // ADCX Instruction
1336 // ADCX and ADOX Instructions
13371337 //
13381338 let Predicates = [HasADX], Defs = [EFLAGS], Uses = [EFLAGS],
13391339 Constraints = "$src0 = $dst", AddedComplexity = 10 in {
13481348 [(set GR64:$dst, EFLAGS,
13491349 (X86adc_flag GR64:$src0, GR64:$src, EFLAGS))],
13501350 IIC_BIN_CARRY_NONMEM>, T8PD;
1351
1352 // We don't have patterns for ADOX yet.
1353 def ADOX32rr : I<0xF6, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src0, GR32:$src),
1354 "adox{l}\t{$src, $dst|$dst, $src}", [], IIC_BIN_NONMEM>, T8XS;
1355
1356 def ADOX64rr : RI<0xF6, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src0, GR64:$src),
1357 "adox{q}\t{$src, $dst|$dst, $src}", [], IIC_BIN_NONMEM>, T8XS;
13511358 } // SchedRW
13521359
13531360 let mayLoad = 1, SchedRW = [WriteALULd] in {
13621369 [(set GR64:$dst, EFLAGS,
13631370 (X86adc_flag GR64:$src0, (loadi64 addr:$src), EFLAGS))],
13641371 IIC_BIN_CARRY_MEM>, T8PD;
1365 }
1366 }
1367
1368 //===----------------------------------------------------------------------===//
1369 // ADOX Instruction
1370 //
1371 let Predicates = [HasADX], hasSideEffects = 0, Defs = [EFLAGS],
1372 Uses = [EFLAGS] in {
1373 let SchedRW = [WriteALU] in {
1374 def ADOX32rr : I<0xF6, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
1375 "adox{l}\t{$src, $dst|$dst, $src}", [], IIC_BIN_NONMEM>, T8XS;
1376
1377 def ADOX64rr : RI<0xF6, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
1378 "adox{q}\t{$src, $dst|$dst, $src}", [], IIC_BIN_NONMEM>, T8XS;
1379 } // SchedRW
1380
1381 let mayLoad = 1, SchedRW = [WriteALULd] in {
1382 def ADOX32rm : I<0xF6, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
1372
1373 // We don't have patterns for ADOX yet.
1374 def ADOX32rm : I<0xF6, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src0, i32mem:$src),
13831375 "adox{l}\t{$src, $dst|$dst, $src}", [], IIC_BIN_MEM>, T8XS;
13841376
1385 def ADOX64rm : RI<0xF6, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
1377 def ADOX64rm : RI<0xF6, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src0, i64mem:$src),
13861378 "adox{q}\t{$src, $dst|$dst, $src}", [], IIC_BIN_MEM>, T8XS;
13871379 }
13881380 }