llvm.org GIT mirror llvm / 759e3fa
Remove edis - the enhanced disassembler. Fixes PR14654. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170578 91177308-0d34-0410-b5e6-96231b3b80d8 Roman Divacky 7 years ago
36 changed file(s) with 4 addition(s) and 4006 deletion(s). Raw diff Collapse all Expand all
18671867 $(ObjDir)/%GenDisassemblerTables.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
18681868 $(Echo) "Building $(
18691869 $(Verb) $(LLVMTableGen) -gen-disassembler -o $(call SYSPATH, $@) $<
1870
1871 $(TARGET:%=$(ObjDir)/%GenEDInfo.inc.tmp): \
1872 $(ObjDir)/%GenEDInfo.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
1873 $(Echo) "Building $(
1874 $(Verb) $(LLVMTableGen) -gen-enhanced-disassembly-info -o $(call SYSPATH, $@) $<
18751870
18761871 $(TARGET:%=$(ObjDir)/%GenFastISel.inc.tmp): \
18771872 $(ObjDir)/%GenFastISel.inc.tmp : %.td $(ObjDir)/.dir $(LLVM_TBLGEN)
1818 class MemoryObject;
1919 class raw_ostream;
2020 class MCContext;
21
22 struct EDInstInfo;
2321
2422 /// MCDisassembler - Superclass for all disassemblers. Consumes a memory region
2523 /// and provides an array of assembly instructions.
8381 raw_ostream &vStream,
8482 raw_ostream &cStream) const = 0;
8583
86 /// getEDInfo - Returns the enhanced instruction information corresponding to
87 /// the disassembler.
88 ///
89 /// @return - An array of instruction information, with one entry for
90 /// each MCInst opcode this disassembler returns.
91 /// NULL if there is no info for this target.
92 virtual const EDInstInfo *getEDInfo() const { return (EDInstInfo*)0; }
93
9484 private:
9585 //
9686 // Hooks for symbolic disassembly via the public 'C' interface.
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-530
include/llvm-c/EnhancedDisassembly.h less more
None /*===-- llvm-c/EnhancedDisassembly.h - Disassembler C Interface ---*- C -*-===*\
1 |* *|
2 |* The LLVM Compiler Infrastructure *|
3 |* *|
4 |* This file is distributed under the University of Illinois Open Source *|
5 |* License. See LICENSE.TXT for details. *|
6 |* *|
7 |*===----------------------------------------------------------------------===*|
8 |* *|
9 |* This header declares the C interface to EnhancedDisassembly.so, which *|
10 |* implements a disassembler with the ability to extract operand values and *|
11 |* individual tokens from assembly instructions. *|
12 |* *|
13 |* The header declares additional interfaces if the host compiler supports *|
14 |* the blocks API. *|
15 |* *|
16 \*===----------------------------------------------------------------------===*/
17
18 #ifndef LLVM_C_ENHANCEDDISASSEMBLY_H
19 #define LLVM_C_ENHANCEDDISASSEMBLY_H
20
21 #include "llvm/Support/DataTypes.h"
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /**
28 * @defgroup LLVMCEnhancedDisassembly Enhanced Disassembly
29 * @ingroup LLVMC
30 * @deprecated
31 *
32 * This module contains an interface to the Enhanced Disassembly (edis)
33 * library. The edis library is deprecated and will likely disappear in
34 * the near future. You should use the @ref LLVMCDisassembler interface
35 * instead.
36 *
37 * @{
38 */
39
40 /*!
41 @typedef EDByteReaderCallback
42 Interface to memory from which instructions may be read.
43 @param byte A pointer whose target should be filled in with the data returned.
44 @param address The address of the byte to be read.
45 @param arg An anonymous argument for client use.
46 @result 0 on success; -1 otherwise.
47 */
48 typedef int (*EDByteReaderCallback)(uint8_t *byte, uint64_t address, void *arg);
49
50 /*!
51 @typedef EDRegisterReaderCallback
52 Interface to registers from which registers may be read.
53 @param value A pointer whose target should be filled in with the value of the
54 register.
55 @param regID The LLVM register identifier for the register to read.
56 @param arg An anonymous argument for client use.
57 @result 0 if the register could be read; -1 otherwise.
58 */
59 typedef int (*EDRegisterReaderCallback)(uint64_t *value, unsigned regID,
60 void* arg);
61
62 /*!
63 @typedef EDAssemblySyntax_t
64 An assembly syntax for use in tokenizing instructions.
65 */
66 enum {
67 /*! @constant kEDAssemblySyntaxX86Intel Intel syntax for i386 and x86_64. */
68 kEDAssemblySyntaxX86Intel = 0,
69 /*! @constant kEDAssemblySyntaxX86ATT AT&T syntax for i386 and x86_64. */
70 kEDAssemblySyntaxX86ATT = 1,
71 kEDAssemblySyntaxARMUAL = 2
72 };
73 typedef unsigned EDAssemblySyntax_t;
74
75 /*!
76 @typedef EDDisassemblerRef
77 Encapsulates a disassembler for a single CPU architecture.
78 */
79 typedef void *EDDisassemblerRef;
80
81 /*!
82 @typedef EDInstRef
83 Encapsulates a single disassembled instruction in one assembly syntax.
84 */
85 typedef void *EDInstRef;
86
87 /*!
88 @typedef EDTokenRef
89 Encapsulates a token from the disassembly of an instruction.
90 */
91 typedef void *EDTokenRef;
92
93 /*!
94 @typedef EDOperandRef
95 Encapsulates an operand of an instruction.
96 */
97 typedef void *EDOperandRef;
98
99 /*!
100 @functiongroup Getting a disassembler
101 */
102
103 /*!
104 @function EDGetDisassembler
105 Gets the disassembler for a given target.
106 @param disassembler A pointer whose target will be filled in with the
107 disassembler.
108 @param triple Identifies the target. Example: "x86_64-apple-darwin10"
109 @param syntax The assembly syntax to use when decoding instructions.
110 @result 0 on success; -1 otherwise.
111 */
112 int EDGetDisassembler(EDDisassemblerRef *disassembler,
113 const char *triple,
114 EDAssemblySyntax_t syntax);
115
116 /*!
117 @functiongroup Generic architectural queries
118 */
119
120 /*!
121 @function EDGetRegisterName
122 Gets the human-readable name for a given register.
123 @param regName A pointer whose target will be pointed at the name of the
124 register. The name does not need to be deallocated and will be
125 @param disassembler The disassembler to query for the name.
126 @param regID The register identifier, as returned by EDRegisterTokenValue.
127 @result 0 on success; -1 otherwise.
128 */
129 int EDGetRegisterName(const char** regName,
130 EDDisassemblerRef disassembler,
131 unsigned regID);
132
133 /*!
134 @function EDRegisterIsStackPointer
135 Determines if a register is one of the platform's stack-pointer registers.
136 @param disassembler The disassembler to query.
137 @param regID The register identifier, as returned by EDRegisterTokenValue.
138 @result 1 if true; 0 otherwise.
139 */
140 int EDRegisterIsStackPointer(EDDisassemblerRef disassembler,
141 unsigned regID);
142
143 /*!
144 @function EDRegisterIsProgramCounter
145 Determines if a register is one of the platform's stack-pointer registers.
146 @param disassembler The disassembler to query.
147 @param regID The register identifier, as returned by EDRegisterTokenValue.
148 @result 1 if true; 0 otherwise.
149 */
150 int EDRegisterIsProgramCounter(EDDisassemblerRef disassembler,
151 unsigned regID);
152
153 /*!
154 @functiongroup Creating and querying instructions
155 */
156
157 /*!
158 @function EDCreateInst
159 Gets a set of contiguous instructions from a disassembler.
160 @param insts A pointer to an array that will be filled in with the
161 instructions. Must have at least count entries. Entries not filled in will
162 be set to NULL.
163 @param count The maximum number of instructions to fill in.
164 @param disassembler The disassembler to use when decoding the instructions.
165 @param byteReader The function to use when reading the instruction's machine
166 code.
167 @param address The address of the first byte of the instruction.
168 @param arg An anonymous argument to be passed to byteReader.
169 @result The number of instructions read on success; 0 otherwise.
170 */
171 unsigned int EDCreateInsts(EDInstRef *insts,
172 unsigned int count,
173 EDDisassemblerRef disassembler,
174 EDByteReaderCallback byteReader,
175 uint64_t address,
176 void *arg);
177
178 /*!
179 @function EDReleaseInst
180 Frees the memory for an instruction. The instruction can no longer be accessed
181 after this call.
182 @param inst The instruction to be freed.
183 */
184 void EDReleaseInst(EDInstRef inst);
185
186 /*!
187 @function EDInstByteSize
188 @param inst The instruction to be queried.
189 @result The number of bytes in the instruction's machine-code representation.
190 */
191 int EDInstByteSize(EDInstRef inst);
192
193 /*!
194 @function EDGetInstString
195 Gets the disassembled text equivalent of the instruction.
196 @param buf A pointer whose target will be filled in with a pointer to the
197 string. (The string becomes invalid when the instruction is released.)
198 @param inst The instruction to be queried.
199 @result 0 on success; -1 otherwise.
200 */
201 int EDGetInstString(const char **buf,
202 EDInstRef inst);
203
204 /*!
205 @function EDInstID
206 @param instID A pointer whose target will be filled in with the LLVM identifier
207 for the instruction.
208 @param inst The instruction to be queried.
209 @result 0 on success; -1 otherwise.
210 */
211 int EDInstID(unsigned *instID, EDInstRef inst);
212
213 /*!
214 @function EDInstIsBranch
215 @param inst The instruction to be queried.
216 @result 1 if the instruction is a branch instruction; 0 if it is some other
217 type of instruction; -1 if there was an error.
218 */
219 int EDInstIsBranch(EDInstRef inst);
220
221 /*!
222 @function EDInstIsMove
223 @param inst The instruction to be queried.
224 @result 1 if the instruction is a move instruction; 0 if it is some other
225 type of instruction; -1 if there was an error.
226 */
227 int EDInstIsMove(EDInstRef inst);
228
229 /*!
230 @function EDBranchTargetID
231 @param inst The instruction to be queried.
232 @result The ID of the branch target operand, suitable for use with
233 EDCopyOperand. -1 if no such operand exists.
234 */
235 int EDBranchTargetID(EDInstRef inst);
236
237 /*!
238 @function EDMoveSourceID
239 @param inst The instruction to be queried.
240 @result The ID of the move source operand, suitable for use with
241 EDCopyOperand. -1 if no such operand exists.
242 */
243 int EDMoveSourceID(EDInstRef inst);
244
245 /*!
246 @function EDMoveTargetID
247 @param inst The instruction to be queried.
248 @result The ID of the move source operand, suitable for use with
249 EDCopyOperand. -1 if no such operand exists.
250 */
251 int EDMoveTargetID(EDInstRef inst);
252
253 /*!
254 @functiongroup Creating and querying tokens
255 */
256
257 /*!
258 @function EDNumTokens
259 @param inst The instruction to be queried.
260 @result The number of tokens in the instruction, or -1 on error.
261 */
262 int EDNumTokens(EDInstRef inst);
263
264 /*!
265 @function EDGetToken
266 Retrieves a token from an instruction. The token is valid until the
267 instruction is released.
268 @param token A pointer to be filled in with the token.
269 @param inst The instruction to be queried.
270 @param index The index of the token in the instruction.
271 @result 0 on success; -1 otherwise.
272 */
273 int EDGetToken(EDTokenRef *token,
274 EDInstRef inst,
275 int index);
276
277 /*!
278 @function EDGetTokenString
279 Gets the disassembled text for a token.
280 @param buf A pointer whose target will be filled in with a pointer to the
281 string. (The string becomes invalid when the token is released.)
282 @param token The token to be queried.
283 @result 0 on success; -1 otherwise.
284 */
285 int EDGetTokenString(const char **buf,
286 EDTokenRef token);
287
288 /*!
289 @function EDOperandIndexForToken
290 Returns the index of the operand to which a token belongs.
291 @param token The token to be queried.
292 @result The operand index on success; -1 otherwise
293 */
294 int EDOperandIndexForToken(EDTokenRef token);
295
296 /*!
297 @function EDTokenIsWhitespace
298 @param token The token to be queried.
299 @result 1 if the token is whitespace; 0 if not; -1 on error.
300 */
301 int EDTokenIsWhitespace(EDTokenRef token);
302
303 /*!
304 @function EDTokenIsPunctuation
305 @param token The token to be queried.
306 @result 1 if the token is punctuation; 0 if not; -1 on error.
307 */
308 int EDTokenIsPunctuation(EDTokenRef token);
309
310 /*!
311 @function EDTokenIsOpcode
312 @param token The token to be queried.
313 @result 1 if the token is opcode; 0 if not; -1 on error.
314 */
315 int EDTokenIsOpcode(EDTokenRef token);
316
317 /*!
318 @function EDTokenIsLiteral
319 @param token The token to be queried.
320 @result 1 if the token is a numeric literal; 0 if not; -1 on error.
321 */
322 int EDTokenIsLiteral(EDTokenRef token);
323
324 /*!
325 @function EDTokenIsRegister
326 @param token The token to be queried.
327 @result 1 if the token identifies a register; 0 if not; -1 on error.
328 */
329 int EDTokenIsRegister(EDTokenRef token);
330
331 /*!
332 @function EDTokenIsNegativeLiteral
333 @param token The token to be queried.
334 @result 1 if the token is a negative signed literal; 0 if not; -1 on error.
335 */
336 int EDTokenIsNegativeLiteral(EDTokenRef token);
337
338 /*!
339 @function EDLiteralTokenAbsoluteValue
340 @param value A pointer whose target will be filled in with the absolute value
341 of the literal.
342 @param token The token to be queried.
343 @result 0 on success; -1 otherwise.
344 */
345 int EDLiteralTokenAbsoluteValue(uint64_t *value,
346 EDTokenRef token);
347
348 /*!
349 @function EDRegisterTokenValue
350 @param registerID A pointer whose target will be filled in with the LLVM
351 register identifier for the token.
352 @param token The token to be queried.
353 @result 0 on success; -1 otherwise.
354 */
355 int EDRegisterTokenValue(unsigned *registerID,
356 EDTokenRef token);
357
358 /*!
359 @functiongroup Creating and querying operands
360 */
361
362 /*!
363 @function EDNumOperands
364 @param inst The instruction to be queried.
365 @result The number of operands in the instruction, or -1 on error.
366 */
367 int EDNumOperands(EDInstRef inst);
368
369 /*!
370 @function EDGetOperand
371 Retrieves an operand from an instruction. The operand is valid until the
372 instruction is released.
373 @param operand A pointer to be filled in with the operand.
374 @param inst The instruction to be queried.
375 @param index The index of the operand in the instruction.
376 @result 0 on success; -1 otherwise.
377 */
378 int EDGetOperand(EDOperandRef *operand,
379 EDInstRef inst,
380 int index);
381
382 /*!
383 @function EDOperandIsRegister
384 @param operand The operand to be queried.
385 @result 1 if the operand names a register; 0 if not; -1 on error.
386 */
387 int EDOperandIsRegister(EDOperandRef operand);
388
389 /*!
390 @function EDOperandIsImmediate
391 @param operand The operand to be queried.
392 @result 1 if the operand specifies an immediate value; 0 if not; -1 on error.
393 */
394 int EDOperandIsImmediate(EDOperandRef operand);
395
396 /*!
397 @function EDOperandIsMemory
398 @param operand The operand to be queried.
399 @result 1 if the operand specifies a location in memory; 0 if not; -1 on error.
400 */
401 int EDOperandIsMemory(EDOperandRef operand);
402
403 /*!
404 @function EDRegisterOperandValue
405 @param value A pointer whose target will be filled in with the LLVM register ID
406 of the register named by the operand.
407 @param operand The operand to be queried.
408 @result 0 on success; -1 otherwise.
409 */
410 int EDRegisterOperandValue(unsigned *value,
411 EDOperandRef operand);
412
413 /*!
414 @function EDImmediateOperandValue
415 @param value A pointer whose target will be filled in with the value of the
416 immediate.
417 @param operand The operand to be queried.
418 @result 0 on success; -1 otherwise.
419 */
420 int EDImmediateOperandValue(uint64_t *value,
421 EDOperandRef operand);
422
423 /*!
424 @function EDEvaluateOperand
425 Evaluates an operand using a client-supplied register state accessor. Register
426 operands are evaluated by reading the value of the register; immediate operands
427 are evaluated by reporting the immediate value; memory operands are evaluated
428 by computing the target address (with only those relocations applied that were
429 already applied to the original bytes).
430 @param result A pointer whose target is to be filled with the result of
431 evaluating the operand.
432 @param operand The operand to be evaluated.
433 @param regReader The function to use when reading registers from the register
434 state.
435 @param arg An anonymous argument for client use.
436 @result 0 if the operand could be evaluated; -1 otherwise.
437 */
438 int EDEvaluateOperand(uint64_t *result,
439 EDOperandRef operand,
440 EDRegisterReaderCallback regReader,
441 void *arg);
442
443 #ifdef __BLOCKS__
444
445 /*!
446 @typedef EDByteBlock_t
447 Block-based interface to memory from which instructions may be read.
448 @param byte A pointer whose target should be filled in with the data returned.
449 @param address The address of the byte to be read.
450 @result 0 on success; -1 otherwise.
451 */
452 typedef int (^EDByteBlock_t)(uint8_t *byte, uint64_t address);
453
454 /*!
455 @typedef EDRegisterBlock_t
456 Block-based interface to registers from which registers may be read.
457 @param value A pointer whose target should be filled in with the value of the
458 register.
459 @param regID The LLVM register identifier for the register to read.
460 @result 0 if the register could be read; -1 otherwise.
461 */
462 typedef int (^EDRegisterBlock_t)(uint64_t *value, unsigned regID);
463
464 /*!
465 @typedef EDTokenVisitor_t
466 Block-based handler for individual tokens.
467 @param token The current token being read.
468 @result 0 to continue; 1 to stop normally; -1 on error.
469 */
470 typedef int (^EDTokenVisitor_t)(EDTokenRef token);
471
472 /*! @functiongroup Block-based interfaces */
473
474 /*!
475 @function EDBlockCreateInsts
476 Gets a set of contiguous instructions from a disassembler, using a block to
477 read memory.
478 @param insts A pointer to an array that will be filled in with the
479 instructions. Must have at least count entries. Entries not filled in will
480 be set to NULL.
481 @param count The maximum number of instructions to fill in.
482 @param disassembler The disassembler to use when decoding the instructions.
483 @param byteBlock The block to use when reading the instruction's machine
484 code.
485 @param address The address of the first byte of the instruction.
486 @result The number of instructions read on success; 0 otherwise.
487 */
488 unsigned int EDBlockCreateInsts(EDInstRef *insts,
489 int count,
490 EDDisassemblerRef disassembler,
491 EDByteBlock_t byteBlock,
492 uint64_t address);
493
494 /*!
495 @function EDBlockEvaluateOperand
496 Evaluates an operand using a block to read registers.
497 @param result A pointer whose target is to be filled with the result of
498 evaluating the operand.
499 @param operand The operand to be evaluated.
500 @param regBlock The block to use when reading registers from the register
501 state.
502 @result 0 if the operand could be evaluated; -1 otherwise.
503 */
504 int EDBlockEvaluateOperand(uint64_t *result,
505 EDOperandRef operand,
506 EDRegisterBlock_t regBlock);
507
508 /*!
509 @function EDBlockVisitTokens
510 Visits every token with a visitor.
511 @param inst The instruction with the tokens to be visited.
512 @param visitor The visitor.
513 @result 0 if the visit ended normally; -1 if the visitor encountered an error
514 or there was some other error.
515 */
516 int EDBlockVisitTokens(EDInstRef inst,
517 EDTokenVisitor_t visitor);
518
519 /**
520 * @}
521 */
522
523 #endif
524
525 #ifdef __cplusplus
526 }
527 #endif
528
529 #endif
0 add_llvm_library(LLVMMCDisassembler
11 Disassembler.cpp
2 EDDisassembler.cpp
3 EDInst.cpp
4 EDMain.cpp
5 EDOperand.cpp
6 EDToken.cpp
72 )
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lib/MC/MCDisassembler/EDDisassembler.cpp less more
None //===-EDDisassembler.cpp - LLVM Enhanced Disassembler ---------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the Enhanced Disassembly library's disassembler class.
10 // The disassembler is responsible for vending individual instructions according
11 // to a given architecture and disassembly syntax.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #include "EDDisassembler.h"
16 #include "EDInst.h"
17 #include "llvm/MC/EDInstInfo.h"
18 #include "llvm/MC/MCAsmInfo.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCDisassembler.h"
21 #include "llvm/MC/MCExpr.h"
22 #include "llvm/MC/MCInst.h"
23 #include "llvm/MC/MCInstPrinter.h"
24 #include "llvm/MC/MCInstrInfo.h"
25 #include "llvm/MC/MCParser/AsmLexer.h"
26 #include "llvm/MC/MCParser/MCAsmParser.h"
27 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
28 #include "llvm/MC/MCRegisterInfo.h"
29 #include "llvm/MC/MCStreamer.h"
30 #include "llvm/MC/MCSubtargetInfo.h"
31 #include "llvm/MC/MCTargetAsmLexer.h"
32 #include "llvm/MC/MCTargetAsmParser.h"
33 #include "llvm/Support/MemoryBuffer.h"
34 #include "llvm/Support/MemoryObject.h"
35 #include "llvm/Support/SourceMgr.h"
36 #include "llvm/Support/TargetRegistry.h"
37 using namespace llvm;
38
39 EDDisassembler::DisassemblerMap_t EDDisassembler::sDisassemblers;
40
41 struct TripleMap {
42 Triple::ArchType Arch;
43 const char *String;
44 };
45
46 static const struct TripleMap triplemap[] = {
47 { Triple::x86, "i386-unknown-unknown" },
48 { Triple::x86_64, "x86_64-unknown-unknown" },
49 { Triple::arm, "arm-unknown-unknown" },
50 { Triple::thumb, "thumb-unknown-unknown" }
51 };
52
53 /// infoFromArch - Returns the TripleMap corresponding to a given architecture,
54 /// or NULL if there is an error
55 ///
56 /// @arg arch - The Triple::ArchType for the desired architecture
57 static const char *tripleFromArch(Triple::ArchType arch) {
58 unsigned int infoIndex;
59
60 for (infoIndex = 0; triplemap[infoIndex].String != NULL; ++infoIndex) {
61 if (arch == triplemap[infoIndex].Arch)
62 return triplemap[infoIndex].String;
63 }
64
65 return NULL;
66 }
67
68 /// getLLVMSyntaxVariant - gets the constant to use to get an assembly printer
69 /// for the desired assembly syntax, suitable for passing to
70 /// Target::createMCInstPrinter()
71 ///
72 /// @arg arch - The target architecture
73 /// @arg syntax - The assembly syntax in sd form
74 static int getLLVMSyntaxVariant(Triple::ArchType arch,
75 EDDisassembler::AssemblySyntax syntax) {
76 switch (syntax) {
77 // Mappings below from X86AsmPrinter.cpp
78 case EDDisassembler::kEDAssemblySyntaxX86ATT:
79 if (arch == Triple::x86 || arch == Triple::x86_64)
80 return 0;
81 break;
82 case EDDisassembler::kEDAssemblySyntaxX86Intel:
83 if (arch == Triple::x86 || arch == Triple::x86_64)
84 return 1;
85 break;
86 case EDDisassembler::kEDAssemblySyntaxARMUAL:
87 if (arch == Triple::arm || arch == Triple::thumb)
88 return 0;
89 break;
90 }
91
92 return -1;
93 }
94
95 EDDisassembler *EDDisassembler::getDisassembler(Triple::ArchType arch,
96 AssemblySyntax syntax) {
97 const char *triple = tripleFromArch(arch);
98 return getDisassembler(StringRef(triple), syntax);
99 }
100
101 EDDisassembler *EDDisassembler::getDisassembler(StringRef str,
102 AssemblySyntax syntax) {
103 CPUKey key;
104 key.Triple = str.str();
105 key.Syntax = syntax;
106
107 EDDisassembler::DisassemblerMap_t::iterator i = sDisassemblers.find(key);
108
109 if (i != sDisassemblers.end()) {
110 return i->second;
111 }
112
113 EDDisassembler *sdd = new EDDisassembler(key);
114 if (!sdd->valid()) {
115 delete sdd;
116 return NULL;
117 }
118
119 sDisassemblers[key] = sdd;
120
121 return sdd;
122 }
123
124 EDDisassembler::EDDisassembler(CPUKey &key) :
125 Valid(false),
126 HasSemantics(false),
127 ErrorStream(nulls()),
128 Key(key),
129 TgtTriple(key.Triple.c_str()) {
130
131 LLVMSyntaxVariant = getLLVMSyntaxVariant(TgtTriple.getArch(), key.Syntax);
132
133 if (LLVMSyntaxVariant < 0)
134 return;
135
136 std::string tripleString(key.Triple);
137 std::string errorString;
138
139 Tgt = TargetRegistry::lookupTarget(key.Triple,
140 errorString);
141
142 if (!Tgt)
143 return;
144
145 MRI.reset(Tgt->createMCRegInfo(tripleString));
146
147 if (!MRI)
148 return;
149
150 initMaps(*MRI);
151
152 AsmInfo.reset(Tgt->createMCAsmInfo(tripleString));
153
154 if (!AsmInfo)
155 return;
156
157 STI.reset(Tgt->createMCSubtargetInfo(tripleString, "", ""));
158
159 if (!STI)
160 return;
161
162 Disassembler.reset(Tgt->createMCDisassembler(*STI));
163
164 if (!Disassembler)
165 return;
166
167 InstInfos = Disassembler->getEDInfo();
168
169 MII.reset(Tgt->createMCInstrInfo());
170
171 if (!MII)
172 return;
173
174 InstString.reset(new std::string);
175 InstStream.reset(new raw_string_ostream(*InstString));
176 InstPrinter.reset(Tgt->createMCInstPrinter(LLVMSyntaxVariant, *AsmInfo,
177 *MII, *MRI, *STI));
178
179 if (!InstPrinter)
180 return;
181
182 GenericAsmLexer.reset(new AsmLexer(*AsmInfo));
183 SpecificAsmLexer.reset(Tgt->createMCAsmLexer(*MRI, *AsmInfo));
184 SpecificAsmLexer->InstallLexer(*GenericAsmLexer);
185
186 initMaps(*MRI);
187
188 Valid = true;
189 }
190
191 EDDisassembler::~EDDisassembler() {
192 if (!valid())
193 return;
194 }
195
196 namespace {
197 /// EDMemoryObject - a subclass of MemoryObject that allows use of a callback
198 /// as provided by the sd interface. See MemoryObject.
199 class EDMemoryObject : public llvm::MemoryObject {
200 private:
201 EDByteReaderCallback Callback;
202 void *Arg;
203 public:
204 EDMemoryObject(EDByteReaderCallback callback,
205 void *arg) : Callback(callback), Arg(arg) { }
206 ~EDMemoryObject() { }
207 uint64_t getBase() const { return 0x0; }
208 uint64_t getExtent() const { return (uint64_t)-1; }
209 int readByte(uint64_t address, uint8_t *ptr) const {
210 if (!Callback)
211 return -1;
212
213 if (Callback(ptr, address, Arg))
214 return -1;
215
216 return 0;
217 }
218 };
219 }
220
221 EDInst *EDDisassembler::createInst(EDByteReaderCallback byteReader,
222 uint64_t address,
223 void *arg) {
224 EDMemoryObject memoryObject(byteReader, arg);
225
226 MCInst* inst = new MCInst;
227 uint64_t byteSize;
228
229 MCDisassembler::DecodeStatus S;
230 S = Disassembler->getInstruction(*inst, byteSize, memoryObject, address,
231 ErrorStream, nulls());
232 switch (S) {
233 case MCDisassembler::Fail:
234 case MCDisassembler::SoftFail:
235 // FIXME: Do something different on soft failure mode?
236 delete inst;
237 return NULL;
238
239 case MCDisassembler::Success: {
240 const llvm::EDInstInfo *thisInstInfo = NULL;
241
242 if (InstInfos) {
243 thisInstInfo = &InstInfos[inst->getOpcode()];
244 }
245
246 EDInst* sdInst = new EDInst(inst, byteSize, *this, thisInstInfo);
247 return sdInst;
248 }
249 }
250 return NULL;
251 }
252
253 void EDDisassembler::initMaps(const MCRegisterInfo ®isterInfo) {
254 unsigned numRegisters = registerInfo.getNumRegs();
255 unsigned registerIndex;
256
257 for (registerIndex = 0; registerIndex < numRegisters; ++registerIndex) {
258 const char* registerName = registerInfo.getName(registerIndex);
259
260 RegVec.push_back(registerName);
261 RegRMap[registerName] = registerIndex;
262 }
263
264 switch (TgtTriple.getArch()) {
265 default:
266 break;
267 case Triple::x86:
268 case Triple::x86_64:
269 stackPointers.insert(registerIDWithName("SP"));
270 stackPointers.insert(registerIDWithName("ESP"));
271 stackPointers.insert(registerIDWithName("RSP"));
272
273 programCounters.insert(registerIDWithName("IP"));
274 programCounters.insert(registerIDWithName("EIP"));
275 programCounters.insert(registerIDWithName("RIP"));
276 break;
277 case Triple::arm:
278 case Triple::thumb:
279 stackPointers.insert(registerIDWithName("SP"));
280
281 programCounters.insert(registerIDWithName("PC"));
282 break;
283 }
284 }
285
286 const char *EDDisassembler::nameWithRegisterID(unsigned registerID) const {
287 if (registerID >= RegVec.size())
288 return NULL;
289 else
290 return RegVec[registerID].c_str();
291 }
292
293 unsigned EDDisassembler::registerIDWithName(const char *name) const {
294 regrmap_t::const_iterator iter = RegRMap.find(std::string(name));
295 if (iter == RegRMap.end())
296 return 0;
297 else
298 return (*iter).second;
299 }
300
301 bool EDDisassembler::registerIsStackPointer(unsigned registerID) {
302 return (stackPointers.find(registerID) != stackPointers.end());
303 }
304
305 bool EDDisassembler::registerIsProgramCounter(unsigned registerID) {
306 return (programCounters.find(registerID) != programCounters.end());
307 }
308
309 int EDDisassembler::printInst(std::string &str, MCInst &inst) {
310 PrinterMutex.acquire();
311
312 InstPrinter->printInst(&inst, *InstStream, "");
313 InstStream->flush();
314 str = *InstString;
315 InstString->clear();
316
317 PrinterMutex.release();
318
319 return 0;
320 }
321
322 static void diag_handler(const SMDiagnostic &diag, void *context) {
323 if (context)
324 diag.print("", static_cast(context)->ErrorStream);
325 }
326
327 int EDDisassembler::parseInst(SmallVectorImpl &operands,
328 SmallVectorImpl &tokens,
329 const std::string &str) {
330 int ret = 0;
331
332 switch (TgtTriple.getArch()) {
333 default:
334 return -1;
335 case Triple::x86:
336 case Triple::x86_64:
337 case Triple::arm:
338 case Triple::thumb:
339 break;
340 }
341
342 const char *cStr = str.c_str();
343 MemoryBuffer *buf = MemoryBuffer::getMemBuffer(cStr, cStr + strlen(cStr));
344
345 StringRef instName;
346 SMLoc instLoc;
347
348 SourceMgr sourceMgr;
349 sourceMgr.setDiagHandler(diag_handler, static_cast(this));
350 sourceMgr.AddNewSourceBuffer(buf, SMLoc()); // ownership of buf handed over
351 MCContext context(*AsmInfo, *MRI, NULL);
352 OwningPtr streamer(createNullStreamer(context));
353 OwningPtr genericParser(createMCAsmParser(sourceMgr,
354 context, *streamer,
355 *AsmInfo));
356
357 OwningPtr STI(Tgt->createMCSubtargetInfo(Key.Triple.c_str(), "", ""));
358 OwningPtr
359 TargetParser(Tgt->createMCAsmParser(*STI, *genericParser));
360
361 AsmToken OpcodeToken = genericParser->Lex();
362 AsmToken NextToken = genericParser->Lex(); // consume next token, because specificParser expects us to
363
364 if (OpcodeToken.is(AsmToken::Identifier)) {
365 instName = OpcodeToken.getString();
366 instLoc = OpcodeToken.getLoc();
367
368 ParseInstructionInfo Info;
369 if (NextToken.isNot(AsmToken::Eof) &&
370 TargetParser->ParseInstruction(Info, instName, instLoc, operands))
371 ret = -1;
372 } else {
373 ret = -1;
374 }
375
376 ParserMutex.acquire();
377
378 if (!ret) {
379 GenericAsmLexer->setBuffer(buf);
380
381 while (SpecificAsmLexer->Lex(),
382 SpecificAsmLexer->isNot(AsmToken::Eof) &&
383 SpecificAsmLexer->isNot(AsmToken::EndOfStatement)) {
384 if (SpecificAsmLexer->is(AsmToken::Error)) {
385 ret = -1;
386 break;
387 }
388 tokens.push_back(SpecificAsmLexer->getTok());
389 }
390 }
391
392 ParserMutex.release();
393
394 return ret;
395 }
396
397 int EDDisassembler::llvmSyntaxVariant() const {
398 return LLVMSyntaxVariant;
399 }
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lib/MC/MCDisassembler/EDDisassembler.h less more
None //===-- EDDisassembler.h - LLVM Enhanced Disassembler -----------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the interface for the Enhanced Disassembly library's
10 // disassembler class. The disassembler is responsible for vending individual
11 // instructions according to a given architecture and disassembly syntax.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #ifndef LLVM_EDDISASSEMBLER_H
16 #define LLVM_EDDISASSEMBLER_H
17
18 #include "EDInfo.h"
19 #include "llvm/ADT/OwningPtr.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/Support/Mutex.h"
22 #include "llvm/Support/raw_ostream.h"
23 #include
24 #include
25 #include
26 #include
27
28 namespace llvm {
29 class AsmLexer;
30 class AsmParser;
31 class AsmToken;
32 class MCContext;
33 class MCAsmInfo;
34 class MCAsmLexer;
35 class MCDisassembler;
36 class MCInst;
37 class MCInstPrinter;
38 class MCInstrInfo;
39 class MCParsedAsmOperand;
40 class MCRegisterInfo;
41 class MCStreamer;
42 class MCSubtargetInfo;
43 class MCTargetAsmLexer;
44 class MCTargetAsmParser;
45 template class SmallVectorImpl;
46 class SourceMgr;
47 class Target;
48
49 struct EDInstInfo;
50 struct EDInst;
51 struct EDOperand;
52 struct EDToken;
53
54 typedef int (*EDByteReaderCallback)(uint8_t *byte, uint64_t address, void *arg);
55
56 /// EDDisassembler - Encapsulates a disassembler for a single architecture and
57 /// disassembly syntax. Also manages the static disassembler registry.
58 struct EDDisassembler {
59 typedef enum {
60 /*! @constant kEDAssemblySyntaxX86Intel Intel syntax for i386 and x86_64. */
61 kEDAssemblySyntaxX86Intel = 0,
62 /*! @constant kEDAssemblySyntaxX86ATT AT&T syntax for i386 and x86_64. */
63 kEDAssemblySyntaxX86ATT = 1,
64 kEDAssemblySyntaxARMUAL = 2
65 } AssemblySyntax;
66
67
68 ////////////////////
69 // Static members //
70 ////////////////////
71
72 /// CPUKey - Encapsulates the descriptor of an architecture/disassembly-syntax
73 /// pair
74 struct CPUKey {
75 /// The architecture type
76 std::string Triple;
77
78 /// The assembly syntax
79 AssemblySyntax Syntax;
80
81 /// operator== - Equality operator
82 bool operator==(const CPUKey &key) const {
83 return (Triple == key.Triple &&
84 Syntax == key.Syntax);
85 }
86
87 /// operator< - Less-than operator
88 bool operator<(const CPUKey &key) const {
89 return ((Triple < key.Triple) ||
90 ((Triple == key.Triple) && Syntax < (key.Syntax)));
91 }
92 };
93
94 typedef std::map DisassemblerMap_t;
95
96 /// A map from disassembler specifications to disassemblers. Populated
97 /// lazily.
98 static DisassemblerMap_t sDisassemblers;
99
100 /// getDisassembler - Returns the specified disassemble, or NULL on failure
101 ///
102 /// @arg arch - The desired architecture
103 /// @arg syntax - The desired disassembly syntax
104 static EDDisassembler *getDisassembler(llvm::Triple::ArchType arch,
105 AssemblySyntax syntax);
106
107 /// getDisassembler - Returns the disassembler for a given combination of
108 /// CPU type, CPU subtype, and assembly syntax, or NULL on failure
109 ///
110 /// @arg str - The string representation of the architecture triple, e.g.,
111 /// "x86_64-apple-darwin"
112 /// @arg syntax - The disassembly syntax for the required disassembler
113 static EDDisassembler *getDisassembler(llvm::StringRef str,
114 AssemblySyntax syntax);
115
116 ////////////////////////
117 // Per-object members //
118 ////////////////////////
119
120 /// True only if the object has been successfully initialized
121 bool Valid;
122 /// True if the disassembler can provide semantic information
123 bool HasSemantics;
124
125 /// The stream to write errors to
126 llvm::raw_ostream &ErrorStream;
127
128 /// The triple/syntax pair for the current architecture
129 CPUKey Key;
130 /// The Triple fur the current architecture
131 Triple TgtTriple;
132 /// The LLVM target corresponding to the disassembler
133 const llvm::Target *Tgt;
134 /// The assembly information for the target architecture
135 llvm::OwningPtr AsmInfo;
136 /// The subtarget information for the target architecture
137 llvm::OwningPtr STI;
138 // The instruction information for the target architecture.
139 llvm::OwningPtr MII;
140 // The register information for the target architecture.
141 llvm::OwningPtr MRI;
142 /// The disassembler for the target architecture
143 llvm::OwningPtr Disassembler;
144 /// The output string for the instruction printer; must be guarded with
145 /// PrinterMutex
146 llvm::OwningPtr InstString;
147 /// The output stream for the disassembler; must be guarded with
148 /// PrinterMutex
149 llvm::OwningPtr InstStream;
150 /// The instruction printer for the target architecture; must be guarded with
151 /// PrinterMutex when printing
152 llvm::OwningPtr InstPrinter;
153 /// The mutex that guards the instruction printer's printing functions, which
154 /// use a shared stream
155 llvm::sys::Mutex PrinterMutex;
156 /// The array of instruction information provided by the TableGen backend for
157 /// the target architecture
158 const llvm::EDInstInfo *InstInfos;
159 /// The target-specific lexer for use in tokenizing strings, in
160 /// target-independent and target-specific portions
161 llvm::OwningPtr GenericAsmLexer;
162 llvm::OwningPtr SpecificAsmLexer;
163 /// The guard for the above
164 llvm::sys::Mutex ParserMutex;
165 /// The LLVM number used for the target disassembly syntax variant
166 int LLVMSyntaxVariant;
167
168 typedef std::vector regvec_t;
169 typedef std::map regrmap_t;
170
171 /// A vector of registers for quick mapping from LLVM register IDs to names
172 regvec_t RegVec;
173 /// A map of registers for quick mapping from register names to LLVM IDs
174 regrmap_t RegRMap;
175
176 /// A set of register IDs for aliases of the stack pointer for the current
177 /// architecture
178 std::set stackPointers;
179 /// A set of register IDs for aliases of the program counter for the current
180 /// architecture
181 std::set programCounters;
182
183 /// Constructor - initializes a disassembler with all the necessary objects,
184 /// which come pre-allocated from the registry accessor function
185 ///
186 /// @arg key - the architecture and disassembly syntax for the
187 /// disassembler
188 EDDisassembler(CPUKey& key);
189
190 /// valid - reports whether there was a failure in the constructor.
191 bool valid() {
192 return Valid;
193 }
194
195 /// hasSemantics - reports whether the disassembler can provide operands and
196 /// tokens.
197 bool hasSemantics() {
198 return HasSemantics;
199 }
200
201 ~EDDisassembler();
202
203 /// createInst - creates and returns an instruction given a callback and
204 /// memory address, or NULL on failure
205 ///
206 /// @arg byteReader - A callback function that provides machine code bytes
207 /// @arg address - The address of the first byte of the instruction,
208 /// suitable for passing to byteReader
209 /// @arg arg - An opaque argument for byteReader
210 EDInst *createInst(EDByteReaderCallback byteReader,
211 uint64_t address,
212 void *arg);
213
214 /// initMaps - initializes regVec and regRMap using the provided register
215 /// info
216 ///
217 /// @arg registerInfo - the register information to use as a source
218 void initMaps(const llvm::MCRegisterInfo ®isterInfo);
219 /// nameWithRegisterID - Returns the name (owned by the EDDisassembler) of a
220 /// register for a given register ID, or NULL on failure
221 ///
222 /// @arg registerID - the ID of the register to be queried
223 const char *nameWithRegisterID(unsigned registerID) const;
224 /// registerIDWithName - Returns the ID of a register for a given register
225 /// name, or (unsigned)-1 on failure
226 ///
227 /// @arg name - The name of the register
228 unsigned registerIDWithName(const char *name) const;
229
230 /// registerIsStackPointer - reports whether a register ID is an alias for the
231 /// stack pointer register
232 ///
233 /// @arg registerID - The LLVM register ID
234 bool registerIsStackPointer(unsigned registerID);
235 /// registerIsStackPointer - reports whether a register ID is an alias for the
236 /// stack pointer register
237 ///
238 /// @arg registerID - The LLVM register ID
239 bool registerIsProgramCounter(unsigned registerID);
240
241 /// printInst - prints an MCInst to a string, returning 0 on success, or -1
242 /// otherwise
243 ///
244 /// @arg str - A reference to a string which is filled in with the string
245 /// representation of the instruction
246 /// @arg inst - A reference to the MCInst to be printed
247 int printInst(std::string& str,
248 llvm::MCInst& inst);
249
250 /// parseInst - extracts operands and tokens from a string for use in
251 /// tokenizing the string. Returns 0 on success, or -1 otherwise.
252 ///
253 /// @arg operands - A reference to a vector that will be filled in with the
254 /// parsed operands
255 /// @arg tokens - A reference to a vector that will be filled in with the
256 /// tokens
257 /// @arg str - The string representation of the instruction
258 int parseInst(llvm::SmallVectorImpl &operands,
259 llvm::SmallVectorImpl &tokens,
260 const std::string &str);
261
262 /// llvmSyntaxVariant - returns the LLVM syntax variant for this disassembler
263 int llvmSyntaxVariant() const;
264 };
265
266 } // end namespace llvm
267
268 #endif
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lib/MC/MCDisassembler/EDInfo.h less more
None //===-- EDInfo.h - LLVM Enhanced Disassembler -------------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #ifndef LLVM_EDINFO_H
10 #define LLVM_EDINFO_H
11
12 enum {
13 EDIS_MAX_OPERANDS = 13,
14 EDIS_MAX_SYNTAXES = 2
15 };
16
17 enum OperandTypes {
18 kOperandTypeNone,
19 kOperandTypeImmediate,
20 kOperandTypeRegister,
21 kOperandTypeX86Memory,
22 kOperandTypeX86EffectiveAddress,
23 kOperandTypeX86PCRelative,
24 kOperandTypeARMBranchTarget,
25 kOperandTypeARMSoReg,
26 kOperandTypeARMSoImm,
27 kOperandTypeARMRotImm,
28 kOperandTypeARMSoImm2Part,
29 kOperandTypeARMPredicate,
30 kOperandTypeAddrModeImm12,
31 kOperandTypeLdStSOReg,
32 kOperandTypeARMAddrMode2,
33 kOperandTypeARMAddrMode2Offset,
34 kOperandTypeARMAddrMode3,
35 kOperandTypeARMAddrMode3Offset,
36 kOperandTypeARMAddrMode4,
37 kOperandTypeARMAddrMode5,
38 kOperandTypeARMAddrMode6,
39 kOperandTypeARMAddrMode6Offset,
40 kOperandTypeARMAddrMode7,
41 kOperandTypeARMAddrModePC,
42 kOperandTypeARMRegisterList,
43 kOperandTypeARMDPRRegisterList,
44 kOperandTypeARMSPRRegisterList,
45 kOperandTypeARMTBAddrMode,
46 kOperandTypeThumbITMask,
47 kOperandTypeThumbAddrModeRegS1,
48 kOperandTypeThumbAddrModeRegS2,
49 kOperandTypeThumbAddrModeRegS4,
50 kOperandTypeThumbAddrModeImmS1,
51 kOperandTypeThumbAddrModeImmS2,
52 kOperandTypeThumbAddrModeImmS4,
53 kOperandTypeThumbAddrModeRR,
54 kOperandTypeThumbAddrModeSP,
55 kOperandTypeThumbAddrModePC,
56 kOperandTypeThumb2AddrModeReg,
57 kOperandTypeThumb2SoReg,
58 kOperandTypeThumb2SoImm,
59 kOperandTypeThumb2AddrModeImm8,
60 kOperandTypeThumb2AddrModeImm8Offset,
61 kOperandTypeThumb2AddrModeImm12,
62 kOperandTypeThumb2AddrModeSoReg,
63 kOperandTypeThumb2AddrModeImm8s4,
64 kOperandTypeThumb2AddrModeImm8s4Offset
65 };
66
67 enum OperandFlags {
68 kOperandFlagSource = 0x1,
69 kOperandFlagTarget = 0x2
70 };
71
72 enum InstructionTypes {
73 kInstructionTypeNone,
74 kInstructionTypeMove,
75 kInstructionTypeBranch,
76 kInstructionTypePush,
77 kInstructionTypePop,
78 kInstructionTypeCall,
79 kInstructionTypeReturn
80 };
81
82
83 #endif
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lib/MC/MCDisassembler/EDInst.cpp less more
None //===-EDInst.cpp - LLVM Enhanced Disassembler -----------------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the Enhanced Disassembly library's instruction class.
10 // The instruction is responsible for vending the string representation,
11 // individual tokens, and operands for a single instruction.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #include "EDInst.h"
16 #include "EDDisassembler.h"
17 #include "EDOperand.h"
18 #include "EDToken.h"
19 #include "llvm/MC/EDInstInfo.h"
20 #include "llvm/MC/MCInst.h"
21
22 using namespace llvm;
23
24 EDInst::EDInst(llvm::MCInst *inst,
25 uint64_t byteSize,
26 EDDisassembler &disassembler,
27 const llvm::EDInstInfo *info) :
28 Disassembler(disassembler),
29 Inst(inst),
30 ThisInstInfo(info),
31 ByteSize(byteSize),
32 BranchTarget(-1),
33 MoveSource(-1),
34 MoveTarget(-1) {
35 OperandOrder = ThisInstInfo->operandOrders[Disassembler.llvmSyntaxVariant()];
36 }
37
38 EDInst::~EDInst() {
39 unsigned int index;
40 unsigned int numOperands = Operands.size();
41
42 for (index = 0; index < numOperands; ++index)
43 delete Operands[index];
44
45 unsigned int numTokens = Tokens.size();
46
47 for (index = 0; index < numTokens; ++index)
48 delete Tokens[index];
49
50 delete Inst;
51 }
52
53 uint64_t EDInst::byteSize() {
54 return ByteSize;
55 }
56
57 int EDInst::stringify() {
58 if (StringifyResult.valid())
59 return StringifyResult.result();
60
61 if (Disassembler.printInst(String, *Inst))
62 return StringifyResult.setResult(-1);
63
64 String.push_back('\n');
65
66 return StringifyResult.setResult(0);
67 }
68
69 int EDInst::getString(const char*& str) {
70 if (stringify())
71 return -1;
72
73 str = String.c_str();
74
75 return 0;
76 }
77
78 unsigned EDInst::instID() {
79 return Inst->getOpcode();
80 }
81
82 bool EDInst::isBranch() {
83 if (ThisInstInfo)
84 return
85 ThisInstInfo->instructionType == kInstructionTypeBranch ||
86 ThisInstInfo->instructionType == kInstructionTypeCall;
87 else
88 return false;
89 }
90
91 bool EDInst::isMove() {
92 if (ThisInstInfo)
93 return ThisInstInfo->instructionType == kInstructionTypeMove;
94 else
95 return false;
96 }
97
98 int EDInst::parseOperands() {
99 if (ParseResult.valid())
100 return ParseResult.result();
101
102 if (!ThisInstInfo)
103 return ParseResult.setResult(-1);
104
105 unsigned int opIndex;
106 unsigned int mcOpIndex = 0;
107
108 for (opIndex = 0; opIndex < ThisInstInfo->numOperands; ++opIndex) {
109 if (isBranch() &&
110 (ThisInstInfo->operandFlags[opIndex] & kOperandFlagTarget)) {
111 BranchTarget = opIndex;
112 }
113 else if (isMove()) {
114 if (ThisInstInfo->operandFlags[opIndex] & kOperandFlagSource)
115 MoveSource = opIndex;
116 else if (ThisInstInfo->operandFlags[opIndex] & kOperandFlagTarget)
117 MoveTarget = opIndex;
118 }
119
120 EDOperand *operand = new EDOperand(Disassembler, *this, opIndex, mcOpIndex);
121
122 Operands.push_back(operand);
123 }
124
125 return ParseResult.setResult(0);
126 }
127
128 int EDInst::branchTargetID() {
129 if (parseOperands())
130 return -1;
131 return BranchTarget;
132 }
133
134 int EDInst::moveSourceID() {
135 if (parseOperands())
136 return -1;
137 return MoveSource;
138 }
139
140 int EDInst::moveTargetID() {
141 if (parseOperands())
142 return -1;
143 return MoveTarget;
144 }
145
146 int EDInst::numOperands() {
147 if (parseOperands())
148 return -1;
149 return Operands.size();
150 }
151
152 int EDInst::getOperand(EDOperand *&operand, unsigned int index) {
153 if (parseOperands())
154 return -1;
155
156 if (index >= Operands.size())
157 return -1;
158
159 operand = Operands[index];
160 return 0;
161 }
162
163 int EDInst::tokenize() {
164 if (TokenizeResult.valid())
165 return TokenizeResult.result();
166
167 if (ThisInstInfo == NULL)
168 return TokenizeResult.setResult(-1);
169
170 if (stringify())
171 return TokenizeResult.setResult(-1);
172
173 return TokenizeResult.setResult(EDToken::tokenize(Tokens,
174 String,
175 OperandOrder,
176 Disassembler));
177
178 }
179
180 int EDInst::numTokens() {
181 if (tokenize())
182 return -1;
183 return Tokens.size();
184 }
185
186 int EDInst::getToken(EDToken *&token, unsigned int index) {
187 if (tokenize())
188 return -1;
189 token = Tokens[index];
190 return 0;
191 }
192
193 #ifdef __BLOCKS__
194 int EDInst::visitTokens(EDTokenVisitor_t visitor) {
195 if (tokenize())
196 return -1;
197
198 tokvec_t::iterator iter;
199
200 for (iter = Tokens.begin(); iter != Tokens.end(); ++iter) {
201 int ret = visitor(*iter);
202 if (ret == 1)
203 return 0;
204 if (ret != 0)
205 return -1;
206 }
207
208 return 0;
209 }
210 #endif
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lib/MC/MCDisassembler/EDInst.h less more
None //===-- EDInst.h - LLVM Enhanced Disassembler -------------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the interface for the Enhanced Disassembly library's
10 // instruction class. The instruction is responsible for vending the string
11 // representation, individual tokens and operands for a single instruction.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #ifndef LLVM_EDINST_H
16 #define LLVM_EDINST_H
17
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/Support/DataTypes.h"
20 #include
21 #include
22
23 namespace llvm {
24 class MCInst;
25 struct EDInstInfo;
26 struct EDToken;
27 struct EDDisassembler;
28 struct EDOperand;
29
30 #ifdef __BLOCKS__
31 typedef int (^EDTokenVisitor_t)(EDToken *token);
32 #endif
33
34 /// CachedResult - Encapsulates the result of a function along with the validity
35 /// of that result, so that slow functions don't need to run twice
36 struct CachedResult {
37 /// True if the result has been obtained by executing the function
38 bool Valid;
39 /// The result last obtained from the function
40 int Result;
41
42 /// Constructor - Initializes an invalid result
43 CachedResult() : Valid(false) { }
44 /// valid - Returns true if the result has been obtained by executing the
45 /// function and false otherwise
46 bool valid() { return Valid; }
47 /// result - Returns the result of the function or an undefined value if
48 /// valid() is false
49 int result() { return Result; }
50 /// setResult - Sets the result of the function and declares it valid
51 /// returning the result (so that setResult() can be called from inside a
52 /// return statement)
53 /// @arg result - The result of the function
54 int setResult(int result) { Result = result; Valid = true; return result; }
55 };
56
57 /// EDInst - Encapsulates a single instruction, which can be queried for its
58 /// string representation, as well as its operands and tokens
59 struct EDInst {
60 /// The parent disassembler
61 EDDisassembler &Disassembler;
62 /// The containing MCInst
63 llvm::MCInst *Inst;
64 /// The instruction information provided by TableGen for this instruction
65 const llvm::EDInstInfo *ThisInstInfo;
66 /// The number of bytes for the machine code representation of the instruction
67 uint64_t ByteSize;
68
69 /// The result of the stringify() function
70 CachedResult StringifyResult;
71 /// The string representation of the instruction
72 std::string String;
73 /// The order in which operands from the InstInfo's operand information appear
74 /// in String
75 const signed char* OperandOrder;
76
77 /// The result of the parseOperands() function
78 CachedResult ParseResult;
79 typedef llvm::SmallVector opvec_t;
80 /// The instruction's operands
81 opvec_t Operands;
82 /// The operand corresponding to the target, if the instruction is a branch
83 int BranchTarget;
84 /// The operand corresponding to the source, if the instruction is a move
85 int MoveSource;
86 /// The operand corresponding to the target, if the instruction is a move
87 int MoveTarget;
88
89 /// The result of the tokenize() function
90 CachedResult TokenizeResult;
91 typedef std::vector tokvec_t;
92 /// The instruction's tokens
93 tokvec_t Tokens;
94
95 /// Constructor - initializes an instruction given the output of the LLVM
96 /// C++ disassembler
97 ///
98 /// @arg inst - The MCInst, which will now be owned by this object
99 /// @arg byteSize - The size of the consumed instruction, in bytes
100 /// @arg disassembler - The parent disassembler
101 /// @arg instInfo - The instruction information produced by the table
102 /// generator for this instruction
103 EDInst(llvm::MCInst *inst,
104 uint64_t byteSize,
105 EDDisassembler &disassembler,
106 const llvm::EDInstInfo *instInfo);
107 ~EDInst();
108
109 /// byteSize - returns the number of bytes consumed by the machine code
110 /// representation of the instruction
111 uint64_t byteSize();
112 /// instID - returns the LLVM instruction ID of the instruction
113 unsigned instID();
114
115 /// stringify - populates the String and AsmString members of the instruction,
116 /// returning 0 on success or -1 otherwise
117 int stringify();
118 /// getString - retrieves a pointer to the string representation of the
119 /// instructinon, returning 0 on success or -1 otherwise
120 ///
121 /// @arg str - A reference to a pointer that, on success, is set to point to
122 /// the string representation of the instruction; this string is still owned
123 /// by the instruction and will be deleted when it is
124 int getString(const char *&str);
125
126 /// isBranch - Returns true if the instruction is a branch
127 bool isBranch();
128 /// isMove - Returns true if the instruction is a move
129 bool isMove();
130
131 /// parseOperands - populates the Operands member of the instruction,
132 /// returning 0 on success or -1 otherwise
133 int parseOperands();
134 /// branchTargetID - returns the ID (suitable for use with getOperand()) of
135 /// the target operand if the instruction is a branch, or -1 otherwise
136 int branchTargetID();
137 /// moveSourceID - returns the ID of the source operand if the instruction
138 /// is a move, or -1 otherwise
139 int moveSourceID();
140 /// moveTargetID - returns the ID of the target operand if the instruction
141 /// is a move, or -1 otherwise
142 int moveTargetID();
143
144 /// numOperands - returns the number of operands available to retrieve, or -1
145 /// on error
146 int numOperands();
147 /// getOperand - retrieves an operand from the instruction's operand list by
148 /// index, returning 0 on success or -1 on error
149 ///
150 /// @arg operand - A reference whose target is pointed at the operand on
151 /// success, although the operand is still owned by the EDInst
152 /// @arg index - The index of the operand in the instruction
153 int getOperand(EDOperand *&operand, unsigned int index);
154
155 /// tokenize - populates the Tokens member of the instruction, returning 0 on
156 /// success or -1 otherwise
157 int tokenize();
158 /// numTokens - returns the number of tokens in the instruction, or -1 on
159 /// error
160 int numTokens();
161 /// getToken - retrieves a token from the instruction's token list by index,
162 /// returning 0 on success or -1 on error
163 ///
164 /// @arg token - A reference whose target is pointed at the token on success,
165 /// although the token is still owned by the EDInst
166 /// @arg index - The index of the token in the instrcutino
167 int getToken(EDToken *&token, unsigned int index);
168
169 #ifdef __BLOCKS__
170 /// visitTokens - Visits each token in turn and applies a block to it,
171 /// returning 0 if all blocks are visited and/or the block signals
172 /// termination by returning 1; returns -1 on error
173 ///
174 /// @arg visitor - The visitor block to apply to all tokens.
175 int visitTokens(EDTokenVisitor_t visitor);
176 #endif
177 };
178
179 } // end namespace llvm
180
181 #endif
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lib/MC/MCDisassembler/EDMain.cpp less more
None //===-- EDMain.cpp - LLVM Enhanced Disassembly C API ----------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the enhanced disassembler's public C API.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "EDDisassembler.h"
14 #include "EDInst.h"
15 #include "EDOperand.h"
16 #include "EDToken.h"
17 #include "llvm-c/EnhancedDisassembly.h"
18 using namespace llvm;
19
20 int EDGetDisassembler(EDDisassemblerRef *disassembler,
21 const char *triple,
22 EDAssemblySyntax_t syntax) {
23 EDDisassembler::AssemblySyntax Syntax;
24 switch (syntax) {
25 default: llvm_unreachable("Unknown assembly syntax!");
26 case kEDAssemblySyntaxX86Intel:
27 Syntax = EDDisassembler::kEDAssemblySyntaxX86Intel;
28 break;
29 case kEDAssemblySyntaxX86ATT:
30 Syntax = EDDisassembler::kEDAssemblySyntaxX86ATT;
31 break;
32 case kEDAssemblySyntaxARMUAL:
33 Syntax = EDDisassembler::kEDAssemblySyntaxARMUAL;
34 break;
35 }
36
37 EDDisassemblerRef ret = EDDisassembler::getDisassembler(triple, Syntax);
38
39 if (!ret)
40 return -1;
41 *disassembler = ret;
42 return 0;
43 }
44
45 int EDGetRegisterName(const char** regName,
46 EDDisassemblerRef disassembler,
47 unsigned regID) {
48 const char *name = ((EDDisassembler*)disassembler)->nameWithRegisterID(regID);
49 if (!name)
50 return -1;
51 *regName = name;
52 return 0;
53 }
54
55 int EDRegisterIsStackPointer(EDDisassemblerRef disassembler,
56 unsigned regID) {
57 return ((EDDisassembler*)disassembler)->registerIsStackPointer(regID) ? 1 : 0;
58 }
59
60 int EDRegisterIsProgramCounter(EDDisassemblerRef disassembler,
61 unsigned regID) {
62 return ((EDDisassembler*)disassembler)->registerIsProgramCounter(regID) ? 1:0;
63 }
64
65 unsigned int EDCreateInsts(EDInstRef *insts,
66 unsigned int count,
67 EDDisassemblerRef disassembler,
68 ::EDByteReaderCallback byteReader,
69 uint64_t address,
70 void *arg) {
71 unsigned int index;
72
73 for (index = 0; index < count; ++index) {
74 EDInst *inst = ((EDDisassembler*)disassembler)->createInst(byteReader,
75 address, arg);
76
77 if (!inst)
78 return index;
79
80 insts[index] = inst;
81 address += inst->byteSize();
82 }
83
84 return count;
85 }
86
87 void EDReleaseInst(EDInstRef inst) {
88 delete ((EDInst*)inst);
89 }
90
91 int EDInstByteSize(EDInstRef inst) {
92 return ((EDInst*)inst)->byteSize();
93 }
94
95 int EDGetInstString(const char **buf,
96 EDInstRef inst) {
97 return ((EDInst*)inst)->getString(*buf);
98 }
99
100 int EDInstID(unsigned *instID, EDInstRef inst) {
101 *instID = ((EDInst*)inst)->instID();
102 return 0;
103 }
104
105 int EDInstIsBranch(EDInstRef inst) {
106 return ((EDInst*)inst)->isBranch();
107 }
108
109 int EDInstIsMove(EDInstRef inst) {
110 return ((EDInst*)inst)->isMove();
111 }
112
113 int EDBranchTargetID(EDInstRef inst) {
114 return ((EDInst*)inst)->branchTargetID();
115 }
116
117 int EDMoveSourceID(EDInstRef inst) {
118 return ((EDInst*)inst)->moveSourceID();
119 }
120
121 int EDMoveTargetID(EDInstRef inst) {
122 return ((EDInst*)inst)->moveTargetID();
123 }
124
125 int EDNumTokens(EDInstRef inst) {
126 return ((EDInst*)inst)->numTokens();
127 }
128
129 int EDGetToken(EDTokenRef *token,
130 EDInstRef inst,
131 int index) {
132 return ((EDInst*)inst)->getToken(*(EDToken**)token, index);
133 }
134
135 int EDGetTokenString(const char **buf,
136 EDTokenRef token) {
137 return ((EDToken*)token)->getString(*buf);
138 }
139
140 int EDOperandIndexForToken(EDTokenRef token) {
141 return ((EDToken*)token)->operandID();
142 }
143
144 int EDTokenIsWhitespace(EDTokenRef token) {
145 return ((EDToken*)token)->type() == EDToken::kTokenWhitespace;
146 }
147
148 int EDTokenIsPunctuation(EDTokenRef token) {
149 return ((EDToken*)token)->type() == EDToken::kTokenPunctuation;
150 }
151
152 int EDTokenIsOpcode(EDTokenRef token) {
153 return ((EDToken*)token)->type() == EDToken::kTokenOpcode;
154 }
155
156 int EDTokenIsLiteral(EDTokenRef token) {
157 return ((EDToken*)token)->type() == EDToken::kTokenLiteral;
158 }
159
160 int EDTokenIsRegister(EDTokenRef token) {
161 return ((EDToken*)token)->type() == EDToken::kTokenRegister;
162 }
163
164 int EDTokenIsNegativeLiteral(EDTokenRef token) {
165 if (((EDToken*)token)->type() != EDToken::kTokenLiteral)
166 return -1;
167
168 return ((EDToken*)token)->literalSign();
169 }
170
171 int EDLiteralTokenAbsoluteValue(uint64_t *value, EDTokenRef token) {
172 if (((EDToken*)token)->type() != EDToken::kTokenLiteral)
173 return -1;
174
175 return ((EDToken*)token)->literalAbsoluteValue(*value);
176 }
177
178 int EDRegisterTokenValue(unsigned *registerID,
179 EDTokenRef token) {
180 if (((EDToken*)token)->type() != EDToken::kTokenRegister)
181 return -1;
182
183 return ((EDToken*)token)->registerID(*registerID);
184 }
185
186 int EDNumOperands(EDInstRef inst) {
187 return ((EDInst*)inst)->numOperands();
188 }
189
190 int EDGetOperand(EDOperandRef *operand,
191 EDInstRef inst,
192 int index) {
193 return ((EDInst*)inst)->getOperand(*(EDOperand**)operand, index);
194 }
195
196 int EDOperandIsRegister(EDOperandRef operand) {
197 return ((EDOperand*)operand)->isRegister();
198 }
199
200 int EDOperandIsImmediate(EDOperandRef operand) {
201 return ((EDOperand*)operand)->isImmediate();
202 }
203
204 int EDOperandIsMemory(EDOperandRef operand) {
205 return ((EDOperand*)operand)->isMemory();
206 }
207
208 int EDRegisterOperandValue(unsigned *value, EDOperandRef operand) {
209 if (!((EDOperand*)operand)->isRegister())
210 return -1;
211 *value = ((EDOperand*)operand)->regVal();
212 return 0;
213 }
214
215 int EDImmediateOperandValue(uint64_t *value, EDOperandRef operand) {
216 if (!((EDOperand*)operand)->isImmediate())
217 return -1;
218 *value = ((EDOperand*)operand)->immediateVal();
219 return 0;
220 }
221
222 int EDEvaluateOperand(uint64_t *result, EDOperandRef operand,
223 ::EDRegisterReaderCallback regReader, void *arg) {
224 return ((EDOperand*)operand)->evaluate(*result, regReader, arg);
225 }
226
227 #ifdef __BLOCKS__
228
229 struct ByteReaderWrapper {
230 EDByteBlock_t byteBlock;
231 };
232
233 static int readerWrapperCallback(uint8_t *byte,
234 uint64_t address,
235 void *arg) {
236 struct ByteReaderWrapper *wrapper = (struct ByteReaderWrapper *)arg;
237 return wrapper->byteBlock(byte, address);
238 }
239
240 unsigned int EDBlockCreateInsts(EDInstRef *insts,
241 int count,
242 EDDisassemblerRef disassembler,
243 EDByteBlock_t byteBlock,
244 uint64_t address) {
245 struct ByteReaderWrapper wrapper;
246 wrapper.byteBlock = byteBlock;
247
248 return EDCreateInsts(insts, count, disassembler, readerWrapperCallback,
249 address, (void*)&wrapper);
250 }
251
252 int EDBlockEvaluateOperand(uint64_t *result, EDOperandRef operand,
253 EDRegisterBlock_t regBlock) {
254 return ((EDOperand*)operand)->evaluate(*result, regBlock);
255 }
256
257 int EDBlockVisitTokens(EDInstRef inst, ::EDTokenVisitor_t visitor) {
258 return ((EDInst*)inst)->visitTokens((llvm::EDTokenVisitor_t)visitor);
259 }
260
261 #else
262
263 extern "C" unsigned int EDBlockCreateInsts() {
264 return 0;
265 }
266
267 extern "C" int EDBlockEvaluateOperand() {
268 return -1;
269 }
270
271 extern "C" int EDBlockVisitTokens() {
272 return -1;
273 }
274
275 #endif
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lib/MC/MCDisassembler/EDOperand.cpp less more
None //===-- EDOperand.cpp - LLVM Enhanced Disassembler ------------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the Enhanced Disassembly library's operand class. The
10 // operand is responsible for allowing evaluation given a particular register
11 // context.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #include "EDOperand.h"
16 #include "EDDisassembler.h"
17 #include "EDInst.h"
18 #include "llvm/MC/EDInstInfo.h"
19 #include "llvm/MC/MCInst.h"
20 using namespace llvm;
21
22 EDOperand::EDOperand(const EDDisassembler &disassembler,
23 const EDInst &inst,
24 unsigned int opIndex,
25 unsigned int &mcOpIndex) :
26 Disassembler(disassembler),
27 Inst(inst),
28 OpIndex(opIndex),
29 MCOpIndex(mcOpIndex) {
30 unsigned int numMCOperands = 0;
31
32 Triple::ArchType arch = Disassembler.TgtTriple.getArch();
33
34 if (arch == Triple::x86 ||
35 arch == Triple::x86_64) {
36 uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex];
37
38 switch (operandType) {
39 default:
40 break;
41 case kOperandTypeImmediate:
42 numMCOperands = 1;
43 break;
44 case kOperandTypeRegister:
45 numMCOperands = 1;
46 break;
47 case kOperandTypeX86Memory:
48 numMCOperands = 5;
49 break;
50 case kOperandTypeX86EffectiveAddress:
51 numMCOperands = 4;
52 break;
53 case kOperandTypeX86PCRelative:
54 numMCOperands = 1;
55 break;
56 }
57 }
58 else if (arch == Triple::arm ||
59 arch == Triple::thumb) {
60 uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex];
61
62 switch (operandType) {
63 default:
64 case kOperandTypeARMRegisterList:
65 case kOperandTypeARMDPRRegisterList:
66 case kOperandTypeARMSPRRegisterList:
67 break;
68 case kOperandTypeImmediate:
69 case kOperandTypeRegister:
70 case kOperandTypeARMBranchTarget:
71 case kOperandTypeARMSoImm:
72 case kOperandTypeARMRotImm:
73 case kOperandTypeThumb2SoImm:
74 case kOperandTypeARMSoImm2Part:
75 case kOperandTypeARMPredicate:
76 case kOperandTypeThumbITMask:
77 case kOperandTypeThumb2AddrModeImm8Offset:
78 case kOperandTypeARMTBAddrMode:
79 case kOperandTypeThumb2AddrModeImm8s4Offset:
80 case kOperandTypeARMAddrMode7:
81 case kOperandTypeThumb2AddrModeReg:
82 numMCOperands = 1;
83 break;
84 case kOperandTypeThumb2SoReg:
85 case kOperandTypeAddrModeImm12:
86 case kOperandTypeARMAddrMode2Offset:
87 case kOperandTypeARMAddrMode3Offset:
88 case kOperandTypeARMAddrMode4:
89 case kOperandTypeARMAddrMode5:
90 case kOperandTypeARMAddrModePC:
91 case kOperandTypeThumb2AddrModeImm8:
92 case kOperandTypeThumb2AddrModeImm12:
93 case kOperandTypeThumb2AddrModeImm8s4:
94 case kOperandTypeThumbAddrModeImmS1:
95 case kOperandTypeThumbAddrModeImmS2:
96 case kOperandTypeThumbAddrModeImmS4:
97 case kOperandTypeThumbAddrModeRR:
98 case kOperandTypeThumbAddrModeSP:
99 case kOperandTypeThumbAddrModePC:
100 numMCOperands = 2;
101 break;
102 case kOperandTypeARMSoReg:
103 case kOperandTypeLdStSOReg:
104 case kOperandTypeARMAddrMode2:
105 case kOperandTypeARMAddrMode3:
106 case kOperandTypeThumb2AddrModeSoReg:
107 case kOperandTypeThumbAddrModeRegS1:
108 case kOperandTypeThumbAddrModeRegS2:
109 case kOperandTypeThumbAddrModeRegS4:
110 case kOperandTypeARMAddrMode6Offset:
111 numMCOperands = 3;
112 break;
113 case kOperandTypeARMAddrMode6:
114 numMCOperands = 4;
115 break;
116 }
117 }
118
119 mcOpIndex += numMCOperands;
120 }
121
122 EDOperand::~EDOperand() {
123 }
124
125 int EDOperand::evaluate(uint64_t &result,
126 EDRegisterReaderCallback callback,
127 void *arg) {
128 uint8_t operandType = Inst.ThisInstInfo->operandTypes[OpIndex];
129
130 Triple::ArchType arch = Disassembler.TgtTriple.getArch();
131
132 switch (arch) {
133 default:
134 return -1;
135 case Triple::x86:
136 case Triple::x86_64:
137 switch (operandType) {
138 default:
139 return -1;
140 case kOperandTypeImmediate:
141 result = Inst.Inst->getOperand(MCOpIndex).getImm();
142 return 0;
143 case kOperandTypeRegister:
144 {
145 unsigned reg = Inst.Inst->getOperand(MCOpIndex).getReg();
146 return callback(&result, reg, arg);
147 }
148 case kOperandTypeX86PCRelative:
149 {
150 int64_t displacement = Inst.Inst->getOperand(MCOpIndex).getImm();
151
152 uint64_t ripVal;
153
154 // TODO fix how we do this
155
156 if (callback(&ripVal, Disassembler.registerIDWithName("RIP"), arg))
157 return -1;
158
159 result = ripVal + displacement;
160 return 0;
161 }
162 case kOperandTypeX86Memory:
163 case kOperandTypeX86EffectiveAddress:
164 {
165 unsigned baseReg = Inst.Inst->getOperand(MCOpIndex).getReg();
166 uint64_t scaleAmount = Inst.Inst->getOperand(MCOpIndex+1).getImm();
167 unsigned indexReg = Inst.Inst->getOperand(MCOpIndex+2).getReg();
168 int64_t displacement = Inst.Inst->getOperand(MCOpIndex+3).getImm();
169
170 uint64_t addr = 0;
171
172 unsigned segmentReg = Inst.Inst->getOperand(MCOpIndex+4).getReg();
173
174 if (segmentReg != 0 && arch == Triple::x86_64) {
175 unsigned fsID = Disassembler.registerIDWithName("FS");
176 unsigned gsID = Disassembler.registerIDWithName("GS");
177
178 if (segmentReg == fsID ||
179 segmentReg == gsID) {
180 uint64_t segmentBase;
181 if (!callback(&segmentBase, segmentReg, arg))
182 addr += segmentBase;
183 }
184 }
185
186 if (baseReg) {
187 uint64_t baseVal;
188 if (callback(&baseVal, baseReg, arg))
189 return -1;
190 addr += baseVal;
191 }
192
193 if (indexReg) {
194 uint64_t indexVal;
195 if (callback(&indexVal, indexReg, arg))
196 return -1;
197 addr += (scaleAmount * indexVal);
198 }
199
200 addr += displacement;
201
202 result = addr;
203 return 0;
204 }
205 } // switch (operandType)
206 case Triple::arm:
207 case Triple::thumb:
208 switch (operandType) {
209 default:
210 return -1;
211 case kOperandTypeImmediate:
212 if (!Inst.Inst->getOperand(MCOpIndex).isImm())
213 return -1;
214
215 result = Inst.Inst->getOperand(MCOpIndex).getImm();
216 return 0;
217 case kOperandTypeRegister:
218 {
219 if (!Inst.Inst->getOperand(MCOpIndex).isReg())
220 return -1;
221
222 unsigned reg = Inst.Inst->getOperand(MCOpIndex).getReg();
223 return callback(&result, reg, arg);
224 }
225 case kOperandTypeARMBranchTarget:
226 {
227 if (!Inst.Inst->getOperand(MCOpIndex).isImm())
228 return -1;
229
230 int64_t displacement = Inst.Inst->getOperand(MCOpIndex).getImm();
231
232 uint64_t pcVal;
233
234 if (callback(&pcVal, Disassembler.registerIDWithName("PC"), arg))
235 return -1;
236
237 result = pcVal + displacement;
238 return 0;
239 }
240 }
241 }
242 }
243
244 int EDOperand::isRegister() {
245 return(Inst.ThisInstInfo->operandFlags[OpIndex] == kOperandTypeRegister);
246 }
247
248 unsigned EDOperand::regVal() {
249 return Inst.Inst->getOperand(MCOpIndex).getReg();
250 }
251
252 int EDOperand::isImmediate() {
253 return(Inst.ThisInstInfo->operandFlags[OpIndex] == kOperandTypeImmediate);
254 }
255
256 uint64_t EDOperand::immediateVal() {
257 return Inst.Inst->getOperand(MCOpIndex).getImm();
258 }
259
260 int EDOperand::isMemory() {
261 uint8_t operandType = Inst.ThisInstInfo->operandTypes[OpIndex];
262
263 switch (operandType) {
264 default:
265 return 0;
266 case kOperandTypeX86Memory:
267 case kOperandTypeX86PCRelative:
268 case kOperandTypeX86EffectiveAddress:
269 case kOperandTypeARMSoReg:
270 case kOperandTypeARMSoImm:
271 case kOperandTypeARMAddrMode2:
272 case kOperandTypeARMAddrMode2Offset:
273 case kOperandTypeARMAddrMode3:
274 case kOperandTypeARMAddrMode3Offset:
275 case kOperandTypeARMAddrMode4:
276 case kOperandTypeARMAddrMode5:
277 case kOperandTypeARMAddrMode6:
278 case kOperandTypeARMAddrMode7:
279 case kOperandTypeARMAddrModePC:
280 case kOperandTypeARMBranchTarget:
281 case kOperandTypeThumbAddrModeRegS1:
282 case kOperandTypeThumbAddrModeRegS2:
283 case kOperandTypeThumbAddrModeRegS4:
284 case kOperandTypeThumbAddrModeRR:
285 case kOperandTypeThumbAddrModeSP:
286 case kOperandTypeThumb2SoImm:
287 case kOperandTypeThumb2AddrModeImm8:
288 case kOperandTypeThumb2AddrModeImm8Offset:
289 case kOperandTypeThumb2AddrModeImm12:
290 case kOperandTypeThumb2AddrModeSoReg:
291 case kOperandTypeThumb2AddrModeImm8s4:
292 case kOperandTypeThumb2AddrModeReg:
293 return 1;
294 }
295 }
296
297 #ifdef __BLOCKS__
298 namespace {
299 struct RegisterReaderWrapper {
300 EDOperand::EDRegisterBlock_t regBlock;
301 };
302 }
303
304 static int readerWrapperCallback(uint64_t *value, unsigned regID, void *arg) {
305 RegisterReaderWrapper *wrapper = (RegisterReaderWrapper *)arg;
306 return wrapper->regBlock(value, regID);
307 }
308
309 int EDOperand::evaluate(uint64_t &result, EDRegisterBlock_t regBlock) {
310 RegisterReaderWrapper wrapper;
311 wrapper.regBlock = regBlock;
312 return evaluate(result, readerWrapperCallback, (void*)&wrapper);
313 }
314 #endif
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-91
lib/MC/MCDisassembler/EDOperand.h less more
None //===-EDOperand.h - LLVM Enhanced Disassembler ------------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the interface for the Enhanced Disassembly library's
10 // operand class. The operand is responsible for allowing evaluation given a
11 // particular register context.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #ifndef LLVM_EDOPERAND_H
16 #define LLVM_EDOPERAND_H
17
18 #include "llvm/Support/DataTypes.h"
19
20 namespace llvm {
21
22 struct EDDisassembler;
23 struct EDInst;
24
25 typedef int (*EDRegisterReaderCallback)(uint64_t *value, unsigned regID,
26 void* arg);
27
28
29 /// EDOperand - Encapsulates a single operand, which can be evaluated by the
30 /// client
31 struct EDOperand {
32 /// The parent disassembler
33 const EDDisassembler &Disassembler;
34 /// The parent instruction
35 const EDInst &Inst;
36
37 /// The index of the operand in the EDInst
38 unsigned int OpIndex;
39 /// The index of the first component of the operand in the MCInst
40 unsigned int MCOpIndex;
41
42 /// Constructor - Initializes an EDOperand
43 ///
44 /// @arg disassembler - The disassembler responsible for the operand
45 /// @arg inst - The instruction containing this operand
46 /// @arg opIndex - The index of the operand in inst
47 /// @arg mcOpIndex - The index of the operand in the original MCInst
48 EDOperand(const EDDisassembler &disassembler,
49 const EDInst &inst,
50 unsigned int opIndex,
51 unsigned int &mcOpIndex);
52 ~EDOperand();
53
54 /// evaluate - Returns the numeric value of an operand to the extent possible,
55 /// returning 0 on success or -1 if there was some problem (such as a
56 /// register not being readable)
57 ///
58 /// @arg result - A reference whose target is filled in with the value of
59 /// the operand (the address if it is a memory operand)
60 /// @arg callback - A function to call to obtain register values
61 /// @arg arg - An opaque argument to pass to callback
62 int evaluate(uint64_t &result,
63 EDRegisterReaderCallback callback,
64 void *arg);
65
66 /// isRegister - Returns 1 if the operand is a register or 0 otherwise
67 int isRegister();
68 /// regVal - Returns the register value.
69 unsigned regVal();
70
71 /// isImmediate - Returns 1 if the operand is an immediate or 0 otherwise
72 int isImmediate();
73 /// immediateVal - Returns the immediate value.
74 uint64_t immediateVal();
75
76 /// isMemory - Returns 1 if the operand is a memory location or 0 otherwise
77 int isMemory();
78
79 #ifdef __BLOCKS__
80 typedef int (^EDRegisterBlock_t)(uint64_t *value, unsigned regID);
81
82 /// evaluate - Like evaluate for a callback, but uses a block instead
83 int evaluate(uint64_t &result,
84 EDRegisterBlock_t regBlock);
85 #endif
86 };
87
88 } // end namespace llvm
89
90 #endif
+0
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lib/MC/MCDisassembler/EDToken.cpp less more
None //===-- EDToken.cpp - LLVM Enhanced Disassembler --------------------------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the Enhanced Disassembler library's token class. The
10 // token is responsible for vending information about the token, such as its
11 // type and logical value.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #include "EDToken.h"
16 #include "EDDisassembler.h"
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/MC/MCParser/MCAsmLexer.h"
19 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
20 using namespace llvm;
21
22 EDToken::EDToken(StringRef str,
23 enum tokenType type,
24 uint64_t localType,
25 EDDisassembler &disassembler) :
26 Disassembler(disassembler),
27 Str(str),
28 Type(type),
29 LocalType(localType),
30 OperandID(-1) {
31 }
32
33 EDToken::~EDToken() {
34 }
35
36 void EDToken::makeLiteral(bool sign, uint64_t absoluteValue) {
37 Type = kTokenLiteral;
38 LiteralSign = sign;
39 LiteralAbsoluteValue = absoluteValue;
40 }
41
42 void EDToken::makeRegister(unsigned registerID) {
43 Type = kTokenRegister;
44 RegisterID = registerID;
45 }
46
47 void EDToken::setOperandID(int operandID) {
48 OperandID = operandID;
49 }
50
51 enum EDToken::tokenType EDToken::type() const {
52 return Type;
53 }
54
55 uint64_t EDToken::localType() const {
56 return LocalType;
57 }
58
59 StringRef EDToken::string() const {
60 return Str;
61 }
62
63 int EDToken::operandID() const {
64 return OperandID;
65 }
66
67 int EDToken::literalSign() const {
68 if (Type != kTokenLiteral)
69 return -1;
70 return (LiteralSign ? 1 : 0);
71 }
72
73 int EDToken::literalAbsoluteValue(uint64_t &value) const {
74 if (Type != kTokenLiteral)
75 return -1;
76 value = LiteralAbsoluteValue;
77 return 0;
78 }
79
80 int EDToken::registerID(unsigned ®isterID) const {
81 if (Type != kTokenRegister)
82 return -1;
83 registerID = RegisterID;
84 return 0;
85 }
86
87 int EDToken::tokenize(std::vector &tokens,
88 std::string &str,
89 const signed char *operandOrder,
90 EDDisassembler &disassembler) {
91 SmallVector parsedOperands;
92 SmallVector asmTokens;
93
94 if (disassembler.parseInst(parsedOperands, asmTokens, str))
95 {
96 for (unsigned i = 0, e = parsedOperands.size(); i != e; ++i)
97 delete parsedOperands[i];
98 return -1;
99 }
100
101 SmallVectorImpl::iterator operandIterator;
102 unsigned int operandIndex;
103 SmallVectorImpl::iterator tokenIterator;
104
105 operandIterator = parsedOperands.begin();
106 operandIndex = 0;
107
108 bool readOpcode = false;
109
110 const char *wsPointer = asmTokens.begin()->getLoc().getPointer();
111
112 for (tokenIterator = asmTokens.begin();
113 tokenIterator != asmTokens.end();
114 ++tokenIterator) {
115 SMLoc tokenLoc = tokenIterator->getLoc();
116
117 const char *tokenPointer = tokenLoc.getPointer();
118
119 if (tokenPointer > wsPointer) {
120 unsigned long wsLength = tokenPointer - wsPointer;
121
122 EDToken *whitespaceToken = new EDToken(StringRef(wsPointer, wsLength),
123 EDToken::kTokenWhitespace,
124 0,
125 disassembler);
126
127 tokens.push_back(whitespaceToken);
128 }
129
130 wsPointer = tokenPointer + tokenIterator->getString().size();
131
132 while (operandIterator != parsedOperands.end() &&
133 tokenLoc.getPointer() >
134 (*operandIterator)->getEndLoc().getPointer()) {
135 ++operandIterator;
136 ++operandIndex;
137 }
138
139 EDToken *token;
140
141 switch (tokenIterator->getKind()) {
142 case AsmToken::Identifier:
143 if (!readOpcode) {
144 token = new EDToken(tokenIterator->getString(),
145 EDToken::kTokenOpcode,
146 (uint64_t)tokenIterator->getKind(),
147 disassembler);
148 readOpcode = true;
149 break;
150 }
151 // any identifier that isn't an opcode is mere punctuation; so we fall
152 // through
153 default:
154 token = new EDToken(tokenIterator->getString(),
155 EDToken::kTokenPunctuation,
156 (uint64_t)tokenIterator->getKind(),
157 disassembler);
158 break;
159 case AsmToken::Integer:
160 {
161 token = new EDToken(tokenIterator->getString(),
162 EDToken::kTokenLiteral,
163 (uint64_t)tokenIterator->getKind(),
164 disassembler);
165
166 int64_t intVal = tokenIterator->getIntVal();
167
168 if (intVal < 0)
169 token->makeLiteral(true, -intVal);
170 else
171 token->makeLiteral(false, intVal);
172 break;
173 }
174 case AsmToken::Register:
175 {
176 token = new EDToken(tokenIterator->getString(),
177 EDToken::kTokenLiteral,
178 (uint64_t)tokenIterator->getKind(),
179 disassembler);
180
181 token->makeRegister((unsigned)tokenIterator->getRegVal());
182 break;
183 }
184 }
185
186 if (operandIterator != parsedOperands.end() &&
187 tokenLoc.getPointer() >=
188 (*operandIterator)->getStartLoc().getPointer()) {
189 /// operandIndex == 0 means the operand is the instruction (which the
190 /// AsmParser treats as an operand but edis does not). We therefore skip
191 /// operandIndex == 0 and subtract 1 from all other operand indices.
192
193 if (operandIndex > 0)
194 token->setOperandID(operandOrder[operandIndex - 1]);
195 }
196
197 tokens.push_back(token);
198 }
199
200 // Free any parsed operands.
201 for (unsigned i = 0, e = parsedOperands.size(); i != e; ++i)
202 delete parsedOperands[i];
203
204 return 0;
205 }
206
207 int EDToken::getString(const char*& buf) {
208 if (PermStr.length() == 0) {
209 PermStr = Str.str();
210 }
211 buf = PermStr.c_str();
212 return 0;
213 }
+0
-139
lib/MC/MCDisassembler/EDToken.h less more
None //===-EDToken.h - LLVM Enhanced Disassembler --------------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the interface for the Enhanced Disassembly library's token
10 // class. The token is responsible for vending information about the token,
11 // such as its type and logical value.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #ifndef LLVM_EDTOKEN_H
16 #define LLVM_EDTOKEN_H
17
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/Support/DataTypes.h"
20 #include
21 #include
22
23 namespace llvm {
24
25 struct EDDisassembler;
26
27 /// EDToken - Encapsulates a single token, which can provide a string
28 /// representation of itself or interpret itself in various ways, depending
29 /// on the token type.
30 struct EDToken {
31 enum tokenType {
32 kTokenWhitespace,
33 kTokenOpcode,
34 kTokenLiteral,
35 kTokenRegister,
36 kTokenPunctuation
37 };
38
39 /// The parent disassembler
40 EDDisassembler &Disassembler;
41
42 /// The token's string representation
43 llvm::StringRef Str;
44 /// The token's string representation, but in a form suitable for export
45 std::string PermStr;
46 /// The type of the token, as exposed through the external API
47 enum tokenType Type;
48 /// The type of the token, as recorded by the syntax-specific tokenizer
49 uint64_t LocalType;
50 /// The operand corresponding to the token, or (unsigned int)-1 if not
51 /// part of an operand.
52 int OperandID;
53
54 /// The sign if the token is a literal (1 if negative, 0 otherwise)
55 bool LiteralSign;
56 /// The absolute value if the token is a literal
57 uint64_t LiteralAbsoluteValue;
58 /// The LLVM register ID if the token is a register name
59 unsigned RegisterID;
60
61 /// Constructor - Initializes an EDToken with the information common to all
62 /// tokens
63 ///
64 /// @arg str - The string corresponding to the token
65 /// @arg type - The token's type as exposed through the public API
66 /// @arg localType - The token's type as recorded by the tokenizer
67 /// @arg disassembler - The disassembler responsible for the token
68 EDToken(llvm::StringRef str,
69 enum tokenType type,
70 uint64_t localType,
71 EDDisassembler &disassembler);
72
73 /// makeLiteral - Adds the information specific to a literal
74 /// @arg sign - The sign of the literal (1 if negative, 0
75 /// otherwise)
76 ///
77 /// @arg absoluteValue - The absolute value of the literal
78 void makeLiteral(bool sign, uint64_t absoluteValue);
79 /// makeRegister - Adds the information specific to a register
80 ///
81 /// @arg registerID - The LLVM register ID
82 void makeRegister(unsigned registerID);
83
84 /// setOperandID - Links the token to a numbered operand
85 ///
86 /// @arg operandID - The operand ID to link to
87 void setOperandID(int operandID);
88
89 ~EDToken();
90
91 /// type - Returns the public type of the token
92 enum tokenType type() const;
93 /// localType - Returns the tokenizer-specific type of the token
94 uint64_t localType() const;
95 /// string - Returns the string representation of the token
96 llvm::StringRef string() const;
97 /// operandID - Returns the operand ID of the token
98 int operandID() const;
99
100 /// literalSign - Returns the sign of the token
101 /// (1 if negative, 0 if positive or unsigned, -1 if it is not a literal)
102 int literalSign() const;
103 /// literalAbsoluteValue - Retrieves the absolute value of the token, and
104 /// returns -1 if the token is not a literal
105 /// @arg value - A reference to a value that is filled in with the absolute
106 /// value, if it is valid
107 int literalAbsoluteValue(uint64_t &value) const;
108 /// registerID - Retrieves the register ID of the token, and returns -1 if the
109 /// token is not a register
110 ///
111 /// @arg registerID - A reference to a value that is filled in with the
112 /// register ID, if it is valid
113 int registerID(unsigned ®isterID) const;
114
115 /// tokenize - Tokenizes a string using the platform- and syntax-specific
116 /// tokenizer, and returns 0 on success (-1 on failure)
117 ///
118 /// @arg tokens - A vector that will be filled in with pointers to
119 /// allocated tokens
120 /// @arg str - The string, as outputted by the AsmPrinter
121 /// @arg operandOrder - The order of the operands from the operandFlags array
122 /// as they appear in str
123 /// @arg disassembler - The disassembler for the desired target and
124 // assembly syntax
125 static int tokenize(std::vector &tokens,
126 std::string &str,
127 const signed char *operandOrder,
128 EDDisassembler &disassembler);
129
130 /// getString - Directs a character pointer to the string, returning 0 on
131 /// success (-1 on failure)
132 /// @arg buf - A reference to a pointer that is set to point to the string.
133 /// The string is still owned by the token.
134 int getString(const char*& buf);
135 };
136
137 } // end namespace llvm
138 #endif
1010 tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
1111 tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
1212 tablegen(LLVM ARMGenSubtargetInfo.inc -gen-subtarget)
13 tablegen(LLVM ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
1413 tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
1514 add_public_tablegen_target(ARMCommonTableGen)
1615
1212 #include "MCTargetDesc/ARMAddressingModes.h"
1313 #include "MCTargetDesc/ARMBaseInfo.h"
1414 #include "MCTargetDesc/ARMMCExpr.h"
15 #include "llvm/MC/EDInstInfo.h"
1615 #include "llvm/MC/MCContext.h"
1716 #include "llvm/MC/MCExpr.h"
1817 #include "llvm/MC/MCFixedLenDisassembler.h"
104103 uint64_t address,
105104 raw_ostream &vStream,
106105 raw_ostream &cStream) const;
107
108 /// getEDInfo - See MCDisassembler.
109 const EDInstInfo *getEDInfo() const;
110 private:
111106 };
112107
113108 /// ThumbDisassembler - Thumb disassembler for all Thumb platforms.
130125 raw_ostream &vStream,
131126 raw_ostream &cStream) const;
132127
133 /// getEDInfo - See MCDisassembler.
134 const EDInstInfo *getEDInfo() const;
135128 private:
136129 mutable ITStatus ITBlock;
137130 DecodeStatus AddThumbPredicate(MCInst&) const;
384377 static DecodeStatus DecodeMRRC2(llvm::MCInst &Inst, unsigned Val,
385378 uint64_t Address, const void *Decoder);
386379 #include "ARMGenDisassemblerTables.inc"
387 #include "ARMGenEDInfo.inc"
388380
389381 static MCDisassembler *createARMDisassembler(const Target &T, const MCSubtargetInfo &STI) {
390382 return new ARMDisassembler(STI);
392384
393385 static MCDisassembler *createThumbDisassembler(const Target &T, const MCSubtargetInfo &STI) {
394386 return new ThumbDisassembler(STI);
395 }
396
397 const EDInstInfo *ARMDisassembler::getEDInfo() const {
398 return instInfoARM;
399 }
400
401 const EDInstInfo *ThumbDisassembler::getEDInfo() const {
402 return instInfoARM;
403387 }
404388
405389 DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
1515 ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \
1616 ARMGenDAGISel.inc ARMGenSubtargetInfo.inc \
1717 ARMGenCodeEmitter.inc ARMGenCallingConv.inc \
18 ARMGenEDInfo.inc ARMGenFastISel.inc ARMGenMCCodeEmitter.inc \
18 ARMGenFastISel.inc ARMGenMCCodeEmitter.inc \
1919 ARMGenMCPseudoLowering.inc ARMGenDisassemblerTables.inc
2020
2121 DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc
88 tablegen(LLVM MBlazeGenCallingConv.inc -gen-callingconv)
99 tablegen(LLVM MBlazeGenSubtargetInfo.inc -gen-subtarget)
1010 tablegen(LLVM MBlazeGenIntrinsics.inc -gen-tgt-intrinsic)
11 tablegen(LLVM MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info)
1211 add_public_tablegen_target(MBlazeCommonTableGen)
1312
1413 add_llvm_target(MBlazeCodeGen
1313
1414 #include "MBlazeDisassembler.h"
1515 #include "MBlaze.h"
16 #include "llvm/MC/EDInstInfo.h"
1716 #include "llvm/MC/MCDisassembler.h"
1817 #include "llvm/MC/MCInst.h"
1918 #include "llvm/MC/MCInstrDesc.h"
2423
2524 // #include "MBlazeGenDecoderTables.inc"
2625 // #include "MBlazeGenRegisterNames.inc"
27 #include "MBlazeGenEDInfo.inc"
2826
2927 namespace llvm {
3028 extern const MCInstrDesc MBlazeInsts[];
490488 }
491489 }
492490
493 const EDInstInfo *MBlazeDisassembler::getEDInfo() const {
494 return instInfoMBlaze;
495 }
496
497491 //
498492 // Public interface for the disassembler
499493 //
2222 class MemoryObject;
2323 class raw_ostream;
2424
25 struct EDInstInfo;
26
2725 /// MBlazeDisassembler - Disassembler for all MBlaze platforms.
2826 class MBlazeDisassembler : public MCDisassembler {
2927 public:
4341 uint64_t address,
4442 raw_ostream &vStream,
4543 raw_ostream &cStream) const;
46
47 /// getEDInfo - See MCDisassembler.
48 const EDInstInfo *getEDInfo() const;
4944 };
5045
5146 } // namespace llvm
1414 MBlazeGenAsmWriter.inc \
1515 MBlazeGenDAGISel.inc MBlazeGenAsmMatcher.inc \
1616 MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \
17 MBlazeGenSubtargetInfo.inc MBlazeGenIntrinsics.inc \
18 MBlazeGenEDInfo.inc
17 MBlazeGenSubtargetInfo.inc MBlazeGenIntrinsics.inc
1918
2019 DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc
2120
88 tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
99 tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
1010 tablegen(LLVM MipsGenSubtargetInfo.inc -gen-subtarget)
11 tablegen(LLVM MipsGenEDInfo.inc -gen-enhanced-disassembly-info)
1211 tablegen(LLVM MipsGenAsmMatcher.inc -gen-asm-matcher)
1312 tablegen(LLVM MipsGenMCPseudoLowering.inc -gen-pseudo-lowering)
1413 add_public_tablegen_target(MipsCommonTableGen)
1313 #include "Mips.h"
1414 #include "MipsRegisterInfo.h"
1515 #include "MipsSubtarget.h"
16 #include "llvm/MC/EDInstInfo.h"
1716 #include "llvm/MC/MCDisassembler.h"
1817 #include "llvm/MC/MCFixedLenDisassembler.h"
1918 #include "llvm/MC/MCInst.h"
2120 #include "llvm/Support/MathExtras.h"
2221 #include "llvm/Support/MemoryObject.h"
2322 #include "llvm/Support/TargetRegistry.h"
24
25 // Not a normal header, this must come last.
26 #include "MipsGenEDInfo.inc"
2723
2824 using namespace llvm;
2925
4238
4339 virtual ~MipsDisassemblerBase() {}
4440
45 /// getEDInfo - See MCDisassembler.
46 const EDInstInfo *getEDInfo() const;
47
4841 const MCRegisterInfo *getRegInfo() const { return RegInfo; }
4942
5043 private:
9184 };
9285
9386 } // end anonymous namespace
94
95 const EDInstInfo *MipsDisassemblerBase::getEDInfo() const {
96 return instInfoMips;
97 }
9887
9988 // Forward declare these because the autogenerated code will reference them.
10089 // Definitions are further down.
1515 MipsGenAsmWriter.inc MipsGenCodeEmitter.inc \
1616 MipsGenDAGISel.inc MipsGenCallingConv.inc \
1717 MipsGenSubtargetInfo.inc MipsGenMCCodeEmitter.inc \
18 MipsGenEDInfo.inc MipsGenDisassemblerTables.inc \
18 MipsGenDisassemblerTables.inc \
1919 MipsGenMCPseudoLowering.inc MipsGenAsmMatcher.inc
2020
2121 DIRS = InstPrinter Disassembler AsmParser TargetInfo MCTargetDesc
99 tablegen(LLVM X86GenFastISel.inc -gen-fast-isel)
1010 tablegen(LLVM X86GenCallingConv.inc -gen-callingconv)
1111 tablegen(LLVM X86GenSubtargetInfo.inc -gen-subtarget)
12 tablegen(LLVM X86GenEDInfo.inc -gen-enhanced-disassembly-info)
1312 add_public_tablegen_target(X86CommonTableGen)
1413
1514 set(sources
1515
1616 #include "X86Disassembler.h"
1717 #include "X86DisassemblerDecoder.h"
18 #include "llvm/MC/EDInstInfo.h"
1918 #include "llvm/MC/MCContext.h"
2019 #include "llvm/MC/MCDisassembler.h"
2120 #include "llvm/MC/MCExpr.h"
3130 #include "X86GenRegisterInfo.inc"
3231 #define GET_INSTRINFO_ENUM
3332 #include "X86GenInstrInfo.inc"
34 #include "X86GenEDInfo.inc"
3533
3634 using namespace llvm;
3735 using namespace llvm::X86Disassembler;
8078
8179 X86GenericDisassembler::~X86GenericDisassembler() {
8280 delete MII;
83 }
84
85 const EDInstInfo *X86GenericDisassembler::getEDInfo() const {
86 return instInfoX86;
8781 }
8882
8983 /// regionReader - a callback function that wraps the readByte method from
9494 class MemoryObject;
9595 class raw_ostream;
9696
97 struct EDInstInfo;
98
9997 namespace X86Disassembler {
10098
10199 /// X86GenericDisassembler - Generic disassembler for all X86 platforms.
121119 raw_ostream &vStream,
122120 raw_ostream &cStream) const;
123121
124 /// getEDInfo - See MCDisassembler.
125 const EDInstInfo *getEDInfo() const;
126122 private:
127123 DisassemblerMode fMode;
128124 };
1515 X86GenAsmWriter.inc X86GenAsmMatcher.inc \
1616 X86GenAsmWriter1.inc X86GenDAGISel.inc \
1717 X86GenDisassemblerTables.inc X86GenFastISel.inc \
18 X86GenCallingConv.inc X86GenSubtargetInfo.inc \
19 X86GenEDInfo.inc
18 X86GenCallingConv.inc X86GenSubtargetInfo.inc
2019
2120 DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc Utils
2221
+0
-10
test/MC/Disassembler/X86/enhanced.txt less more
None # RUN: llvm-mc --edis %s -triple=x86_64-apple-darwin9 2>&1 | FileCheck %s
1
2 # CHECK: [o:jne][w: ][0-p:-][0-l:10=10]
0:[RIP/{{[0-9]+}}](pc)=18446744073709551606
3 0x0f 0x85 0xf6 0xff 0xff 0xff
4 # CHECK: [o:movq][w: ][1-r:%gs=r{{[0-9]+}}][1-p::][1-l:8=8][p:,][w: ][0-r:%rcx=r{{[0-9]+}}] 0:[RCX/{{[0-9]+}}]=0 1:[GS/{{[0-9]+}}]=8
5 0x65 0x48 0x8b 0x0c 0x25 0x08 0x00 0x00 0x00
6 # CHECK: [o:xorps][w: ][2-r:%xmm1=r{{[0-9]+}}][p:,][w: ][0-r:%xmm2=r{{[0-9]+}}] 0:[XMM2/{{[0-9]+}}]=0 1:[XMM2/{{[0-9]+}}]=0 2:[XMM1/{{[0-9]+}}]=0
7 0x0f 0x57 0xd1
8 # CHECK: [o:andps][w: ][2-r:%xmm1=r{{[0-9]+}}][p:,][w: ][0-r:%xmm2=r{{[0-9]+}}] 0:[XMM2/{{[0-9]+}}]=0 1:[XMM2/{{[0-9]+}}]=0 2:[XMM1/{{[0-9]+}}]=0
9 0x0f 0x54 0xd1
1212 //===----------------------------------------------------------------------===//
1313
1414 #include "Disassembler.h"
15 #include "../../lib/MC/MCDisassembler/EDDisassembler.h"
16 #include "../../lib/MC/MCDisassembler/EDInst.h"
17 #include "../../lib/MC/MCDisassembler/EDOperand.h"
18 #include "../../lib/MC/MCDisassembler/EDToken.h"
1915 #include "llvm/ADT/OwningPtr.h"
2016 #include "llvm/ADT/Triple.h"
2117 #include "llvm/MC/MCDisassembler.h"
168164
169165 return ErrorOccurred;
170166 }
171
172 static int byteArrayReader(uint8_t *B, uint64_t A, void *Arg) {
173 ByteArrayTy &ByteArray = *((ByteArrayTy*)Arg);
174
175 if (A >= ByteArray.size())
176 return -1;
177
178 *B = ByteArray[A].first;
179
180 return 0;
181 }
182
183 static int verboseEvaluator(uint64_t *V, unsigned R, void *Arg) {
184 EDDisassembler &disassembler = *(EDDisassembler *)((void **)Arg)[0];
185 raw_ostream &Out = *(raw_ostream *)((void **)Arg)[1];
186
187 if (const char *regName = disassembler.nameWithRegisterID(R))
188 Out << "[" << regName << "/" << R << "]";
189
190 if (disassembler.registerIsStackPointer(R))
191 Out << "(sp)";
192 if (disassembler.registerIsProgramCounter(R))
193 Out << "(pc)";
194
195 *V = 0;
196 return 0;
197 }
198
199 int Disassembler::disassembleEnhanced(const std::string &TS,
200 MemoryBuffer &Buffer,
201 SourceMgr &SM,
202 raw_ostream &Out) {
203 ByteArrayTy ByteArray;
204 StringRef Str = Buffer.getBuffer();
205
206 if (ByteArrayFromString(ByteArray, Str, SM)) {
207 return -1;
208 }
209
210 Triple T(TS);
211 EDDisassembler::AssemblySyntax AS;
212
213 switch (T.getArch()) {
214 default:
215 errs() << "error: no default assembly syntax for " << TS.c_str() << "\n";
216 return -1;
217 case Triple::arm:
218 case Triple::thumb:
219 AS = EDDisassembler::kEDAssemblySyntaxARMUAL;
220 break;
221 case Triple::x86:
222 case Triple::x86_64:
223 AS = EDDisassembler::kEDAssemblySyntaxX86ATT;
224 break;
225 }
226
227 OwningPtr
228 disassembler(EDDisassembler::getDisassembler(TS.c_str(), AS));
229
230 if (disassembler == 0) {
231 errs() << "error: couldn't get disassembler for " << TS << '\n';
232 return -1;
233 }
234
235 while (ByteArray.size()) {
236 OwningPtr
237 inst(disassembler->createInst(byteArrayReader, 0, &ByteArray));
238
239 if (inst == 0) {
240 errs() << "error: Didn't get an instruction\n";
241 return -1;
242 }
243
244 ByteArray.erase (ByteArray.begin(), ByteArray.begin() + inst->byteSize());
245
246 unsigned numTokens = inst->numTokens();
247 if ((int)numTokens < 0) {
248 errs() << "error: couldn't count the instruction's tokens\n";
249 return -1;
250 }
251
252 for (unsigned tokenIndex = 0; tokenIndex != numTokens; ++tokenIndex) {
253 EDToken *token;
254
255 if (inst->getToken(token, tokenIndex)) {
256 errs() << "error: Couldn't get token\n";
257 return -1;
258 }
259
260 const char *buf;
261 if (token->getString(buf)) {
262 errs() << "error: Couldn't get string for token\n";
263 return -1;
264 }
265
266 Out << '[';
267 int operandIndex = token->operandID();
268
269 if (operandIndex >= 0)
270 Out << operandIndex << "-";
271
272 switch (token->type()) {
273 case EDToken::kTokenWhitespace: Out << "w"; break;
274 case EDToken::kTokenPunctuation: Out << "p"; break;
275 case EDToken::kTokenOpcode: Out << "o"; break;
276 case EDToken::kTokenLiteral: Out << "l"; break;
277 case EDToken::kTokenRegister: Out << "r"; break;
278 }
279
280 Out << ":" << buf;
281
282 if (token->type() == EDToken::kTokenLiteral) {
283 Out << "=";
284 if (token->literalSign())
285 Out << "-";
286 uint64_t absoluteValue;
287 if (token->literalAbsoluteValue(absoluteValue)) {
288 errs() << "error: Couldn't get the value of a literal token\n";
289 return -1;
290 }
291 Out << absoluteValue;
292 } else if (token->type() == EDToken::kTokenRegister) {
293 Out << "=";
294 unsigned regID;
295 if (token->registerID(regID)) {
296 errs() << "error: Couldn't get the ID of a register token\n";
297 return -1;
298 }
299 Out << "r" << regID;
300 }
301
302 Out << "]";
303 }
304
305 Out << " ";
306
307 if (inst->isBranch())
308 Out << "
";
309 if (inst->isMove())
310 Out << " ";
311
312 unsigned numOperands = inst->numOperands();
313
314 if ((int)numOperands < 0) {
315 errs() << "error: Couldn't count operands\n";
316 return -1;
317 }
318
319 for (unsigned operandIndex = 0; operandIndex != numOperands;
320 ++operandIndex) {
321 Out << operandIndex << ":";
322
323 EDOperand *operand;
324 if (inst->getOperand(operand, operandIndex)) {
325 errs() << "error: couldn't get operand\n";
326 return -1;
327 }
328
329 uint64_t evaluatedResult;
330 void *Arg[] = { disassembler.get(), &Out };
331 if (operand->evaluate(evaluatedResult, verboseEvaluator, Arg)) {
332 errs() << "error: Couldn't evaluate an operand\n";
333 return -1;
334 }
335 Out << "=" << evaluatedResult << " ";
336 }
337
338 Out << '\n';
339 }
340
341 return 0;
342 }
3434 MemoryBuffer &Buffer,
3535 SourceMgr &SM,
3636 raw_ostream &Out);
37
38 static int disassembleEnhanced(const std::string &tripleString,
39 MemoryBuffer &buffer,
40 SourceMgr &SM,
41 raw_ostream &Out);
4237 };
4338
4439 } // namespace llvm
168168 AC_AsLex,
169169 AC_Assemble,
170170 AC_Disassemble,
171 AC_EDisassemble,
172171 AC_MDisassemble,
173172 AC_HDisassemble
174173 };
182181 "Assemble a .s file (default)"),
183182 clEnumValN(AC_Disassemble, "disassemble",
184183 "Disassemble strings of hex bytes"),
185 clEnumValN(AC_EDisassemble, "edis",
186 "Enhanced disassembly of strings of hex bytes"),
187184 clEnumValN(AC_MDisassemble, "mdis",
188185 "Marked up disassembly of strings of hex bytes"),
189186 clEnumValN(AC_HDisassemble, "hdis",
471468 case AC_Disassemble:
472469 disassemble = true;
473470 break;
474 case AC_EDisassemble:
475 Res = Disassembler::disassembleEnhanced(TripleName, *Buffer, SrcMgr, Out->os());
476 break;
477471 }
478472 if (disassemble)
479473 Res = Disassembler::disassemble(*TheTarget, TripleName, *STI, *Str,
1818 DAGISelMatcher.cpp
1919 DFAPacketizerEmitter.cpp
2020 DisassemblerEmitter.cpp
21 EDEmitter.cpp
2221 FastISelEmitter.cpp
2322 FixedLenDecoderEmitter.cpp
2423 InstrInfoEmitter.cpp
+0
-1012
utils/TableGen/EDEmitter.cpp less more
None //===- EDEmitter.cpp - Generate instruction descriptions for ED -*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend is responsible for emitting a description of each
10 // instruction in a format that the enhanced disassembler can use to tokenize
11 // and parse instructions.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #include "AsmWriterInst.h"
16 #include "CodeGenTarget.h"
17 #include "llvm/MC/EDInstInfo.h"
18 #include "llvm/Support/ErrorHandling.h"
19 #include "llvm/Support/Format.h"
20 #include "llvm/Support/raw_ostream.h"
21 #include "llvm/TableGen/Error.h"
22 #include "llvm/TableGen/Record.h"
23 #include "llvm/TableGen/TableGenBackend.h"
24 #include
25 #include
26
27 using namespace llvm;
28
29 // TODO: There's a suspiciously large amount of "table" data in this
30 // backend which should probably be in the TableGen file itself.
31
32 ///////////////////////////////////////////////////////////
33 // Support classes for emitting nested C data structures //
34 ///////////////////////////////////////////////////////////
35
36 // TODO: These classes are probably generally useful to other backends;
37 // add them to TableGen's "helper" API's.
38
39 namespace {
40 class EnumEmitter {
41 private:
42 std::string Name;
43 std::vector Entries;
44 public:
45 EnumEmitter(const char *N) : Name(N) {
46 }
47 int addEntry(const char *e) {
48 Entries.push_back(std::string(e));
49 return Entries.size() - 1;
50 }
51 void emit(raw_ostream &o, unsigned int &i) {
52 o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
53 i += 2;
54
55 unsigned int index = 0;
56 unsigned int numEntries = Entries.size();
57 for (index = 0; index < numEntries; ++index) {
58 o.indent(i) << Entries[index];
59 if (index < (numEntries - 1))
60 o << ",";
61 o << "\n";
62 }
63
64 i -= 2;
65 o.indent(i) << "};" << "\n";
66 }
67
68 void emitAsFlags(raw_ostream &o, unsigned int &i) {
69 o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
70 i += 2;
71
72 unsigned int index = 0;
73 unsigned int numEntries = Entries.size();
74 unsigned int flag = 1;
75 for (index = 0; index < numEntries; ++index) {
76 o.indent(i) << Entries[index] << " = " << format("0x%x", flag);
77 if (index < (numEntries - 1))
78 o << ",";
79 o << "\n";
80 flag <<= 1;
81 }
82
83 i -= 2;
84 o.indent(i) << "};" << "\n";
85 }
86 };
87 } // End anonymous namespace
88
89 namespace {
90 class ConstantEmitter {
91 public:
92 virtual ~ConstantEmitter() { }
93 virtual void emit(raw_ostream &o, unsigned int &i) = 0;
94 };
95 } // End anonymous namespace
96
97 namespace {
98 class LiteralConstantEmitter : public ConstantEmitter {
99 private:
100 bool IsNumber;
101 union {
102 int Number;
103 const char* String;
104 };
105 public:
106 LiteralConstantEmitter(int number = 0) :
107 IsNumber(true),
108 Number(number) {
109 }
110 void set(const char *string) {
111 IsNumber = false;
112 Number = 0;
113 String = string;
114 }
115 bool is(const char *string) {
116 return !strcmp(String, string);
117 }
118 void emit(raw_ostream &o, unsigned int &i) {
119 if (IsNumber)
120 o << Number;
121 else
122 o << String;
123 }
124 };
125 } // End anonymous namespace
126
127 namespace {
128 class CompoundConstantEmitter : public ConstantEmitter {
129 private:
130 unsigned int Padding;
131 std::vector Entries;
132 public:
133 CompoundConstantEmitter(unsigned int padding = 0) : Padding(padding) {
134 }
135 CompoundConstantEmitter &addEntry(ConstantEmitter *e) {
136 Entries.push_back(e);
137
138 return *this;
139 }
140 ~CompoundConstantEmitter() {
141 while (Entries.size()) {
142 ConstantEmitter *entry = Entries.back();
143 Entries.pop_back();
144 delete entry;
145 }
146 }
147 void emit(raw_ostream &o, unsigned int &i) {
148 o << "{" << "\n";
149 i += 2;
150
151 unsigned int index;
152 unsigned int numEntries = Entries.size();
153
154 unsigned int numToPrint;
155
156 if (Padding) {
157 if (numEntries > Padding) {
158 fprintf(stderr, "%u entries but %u padding\n", numEntries, Padding);
159 llvm_unreachable("More entries than padding");
160 }
161 numToPrint = Padding;
162 } else {
163 numToPrint = numEntries;
164 }
165
166 for (index = 0; index < numToPrint; ++index) {
167 o.indent(i);
168 if (index < numEntries)
169 Entries[index]->emit(o, i);
170 else
171 o << "-1";
172
173 if (index < (numToPrint - 1))
174 o << ",";
175 o << "\n";
176 }
177
178 i -= 2;
179 o.indent(i) << "}";
180 }
181 };
182 } // End anonymous namespace
183
184 namespace {
185 class FlagsConstantEmitter : public ConstantEmitter {
186 private:
187 std::vector Flags;
188 public:
189 FlagsConstantEmitter() {
190 }
191 FlagsConstantEmitter &addEntry(const char *f) {
192 Flags.push_back(std::string(f));
193 return *this;
194 }
195 void emit(raw_ostream &o, unsigned int &i) {
196 unsigned int index;
197 unsigned int numFlags = Flags.size();
198 if (numFlags == 0)
199 o << "0";
200
201 for (index = 0; index < numFlags; ++index) {
202 o << Flags[index].c_str();
203 if (index < (numFlags - 1))
204 o << " | ";
205 }
206 }
207 };
208 } // End anonymous namespace
209
210 /// populateOperandOrder - Accepts a CodeGenInstruction and generates its
211 /// AsmWriterInst for the desired assembly syntax, giving an ordered list of
212 /// operands in the order they appear in the printed instruction. Then, for
213 /// each entry in that list, determines the index of the same operand in the
214 /// CodeGenInstruction, and emits the resulting mapping into an array, filling
215 /// in unused slots with -1.
216 ///
217 /// @arg operandOrder - The array that will be populated with the operand
218 /// mapping. Each entry will contain -1 (invalid index
219 /// into the operands present in the AsmString) or a number
220 /// representing an index in the operand descriptor array.
221 /// @arg inst - The instruction to use when looking up the operands
222 /// @arg syntax - The syntax to use, according to LLVM's enumeration
223 static void populateOperandOrder(CompoundConstantEmitter *operandOrder,
224 const CodeGenInstruction &inst,
225 unsigned syntax) {
226 unsigned int numArgs = 0;
227
228 AsmWriterInst awInst(inst, syntax, -1, -1);
229
230 std::vector::iterator operandIterator;
231
232 for (operandIterator = awInst.Operands.begin();
233 operandIterator != awInst.Operands.end();
234 ++operandIterator) {
235 if (operandIterator->OperandType ==
236 AsmWriterOperand::isMachineInstrOperand) {
237 operandOrder->addEntry(
238 new LiteralConstantEmitter(operandIterator->CGIOpNo));
239 numArgs++;
240 }
241 }
242 }
243
244 /////////////////////////////////////////////////////
245 // Support functions for handling X86 instructions //
246 /////////////////////////////////////////////////////
247
248 #define SET(flag) { type->set(flag); return 0; }
249
250 #define REG(str) if (name == str) SET("kOperandTypeRegister");
251 #define MEM(str) if (name == str) SET("kOperandTypeX86Memory");
252 #define LEA(str) if (name == str) SET("kOperandTypeX86EffectiveAddress");
253 #define IMM(str) if (name == str) SET("kOperandTypeImmediate");
254 #define PCR(str) if (name == str) SET("kOperandTypeX86PCRelative");
255
256 /// X86TypeFromOpName - Processes the name of a single X86 operand (which is
257 /// actually its type) and translates it into an operand type
258 ///
259 /// @arg flags - The type object to set
260 /// @arg name - The name of the operand
261 static int X86TypeFromOpName(LiteralConstantEmitter *type,
262 const std::string &name) {
263 REG("GR8");
264 REG("GR8_NOREX");
265 REG("GR16");
266 REG("GR16_NOAX");
267 REG("GR32");
268 REG("GR32_NOAX");
269 REG("GR32_NOREX");
270 REG("GR32_TC");
271 REG("FR32");
272 REG("RFP32");
273 REG("GR64");
274 REG("GR64_NOAX");
275 REG("GR64_TC");
276 REG("FR64");
277 REG("VR64");
278 REG("RFP64");
279 REG("RFP80");
280 REG("VR128");
281 REG("VR256");
282 REG("RST");
283 REG("SEGMENT_REG");
284 REG("DEBUG_REG");
285 REG("CONTROL_REG");
286
287 IMM("i8imm");
288 IMM("i16imm");
289 IMM("i16i8imm");
290 IMM("i32imm");
291 IMM("i32i8imm");
292 IMM("u32u8imm");
293 IMM("i64imm");
294 IMM("i64i8imm");
295 IMM("i64i32imm");
296 IMM("SSECC");
297 IMM("AVXCC");
298
299 // all R, I, R, I, R
300 MEM("i8mem");
301 MEM("i8mem_NOREX");
302 MEM("i16mem");
303 MEM("i32mem");
304 MEM("i32mem_TC");
305 MEM("f32mem");
306 MEM("ssmem");
307 MEM("opaque32mem");
308 MEM("opaque48mem");
309 MEM("i64mem");
310 MEM("i64mem_TC");
311 MEM("f64mem");
312 MEM("sdmem");
313 MEM("f80mem");
314 MEM("opaque80mem");
315 MEM("i128mem");
316 MEM("i256mem");
317 MEM("f128mem");
318 MEM("f256mem");
319 MEM("opaque512mem");
320 // Gather
321 MEM("vx32mem")
322 MEM("vy32mem")
323 MEM("vx64mem")
324 MEM("vy64mem")
325
326 // all R, I, R, I
327 LEA("lea32mem");
328 LEA("lea64_32mem");
329 LEA("lea64mem");
330
331 // all I
332 PCR("i16imm_pcrel");
333 PCR("i32imm_pcrel");
334 PCR("i64i32imm_pcrel");
335 PCR("brtarget8");
336 PCR("offset8");
337 PCR("offset16");
338 PCR("offset32");
339 PCR("offset64");
340 PCR("brtarget");
341 PCR("uncondbrtarget");
342 PCR("bltarget");
343
344 // all I, ARM mode only, conditional/unconditional
345 PCR("br_target");
346 PCR("bl_target");
347 return 1;
348 }
349
350 #undef REG
351 #undef MEM
352 #undef LEA
353 #undef IMM
354 #undef PCR
355
356 #undef SET
357
358 /// X86PopulateOperands - Handles all the operands in an X86 instruction, adding
359 /// the appropriate flags to their descriptors
360 ///
361 /// \param operandTypes A reference the array of operand type objects
362 /// \param inst The instruction to use as a source of information
363 static void X86PopulateOperands(
364 LiteralConstantEmitter *(&operandTypes)[EDIS_MAX_OPERANDS],
365 const CodeGenInstruction &inst) {
366 if (!inst.TheDef->isSubClassOf("X86Inst"))
367 return;
368
369 unsigned int index;
370 unsigned int numOperands = inst.Operands.size();
371
372 for (index = 0; index < numOperands; ++index) {
373 const CGIOperandList::OperandInfo &operandInfo = inst.Operands[index];
374 Record &rec = *operandInfo.Rec;
375
376 if (X86TypeFromOpName(operandTypes[index], rec.getName()) &&
377 !rec.isSubClassOf("PointerLikeRegClass")) {
378 errs() << "Operand type: " << rec.getName().c_str() << "\n";
379 errs() << "Operand name: " << operandInfo.Name.c_str() << "\n";
380 errs() << "Instruction name: " << inst.TheDef->getName().c_str() << "\n";
381 llvm_unreachable("Unhandled type");
382 }
383 }
384 }
385
386 /// decorate1 - Decorates a named operand with a new flag
387 ///
388 /// \param operandFlags The array of operand flag objects, which don't have
389 /// names
390 /// \param inst The CodeGenInstruction, which provides a way to
391 // translate between names and operand indices
392 /// \param opName The name of the operand
393 /// \param opFlag The name of the flag to add
394 static inline void decorate1(
395 FlagsConstantEmitter *(&operandFlags)[EDIS_MAX_OPERANDS],
396 const CodeGenInstruction &inst,
397 const char *opName,
398 const char *opFlag) {
399 unsigned opIndex;
400
401 opIndex = inst.Operands.getOperandNamed(std::string(opName));
402
403 operandFlags[opIndex]->addEntry(opFlag);
404 }
405
406 #define DECORATE1(opName, opFlag) decorate1(operandFlags, inst, opName, opFlag)
407
408 #define MOV(source, target) { \
409 instType.set("kInstructionTypeMove"); \
410 DECORATE1(source, "kOperandFlagSource"); \
411 DECORATE1(target, "kOperandFlagTarget"); \
412 }
413
414 #define BRANCH(target) { \
415 instType.set("kInstructionTypeBranch"); \
416 DECORATE1(target, "kOperandFlagTarget"); \
417 }
418
419 #define PUSH(source) { \
420 instType.set("kInstructionTypePush"); \
421 DECORATE1(source, "kOperandFlagSource"); \
422 }
423
424 #define POP(target) { \
425 instType.set("kInstructionTypePop"); \
426 DECORATE1(target, "kOperandFlagTarget"); \
427 }
428
429 #define CALL(target) { \
430 instType.set("kInstructionTypeCall"); \
431 DECORATE1(target, "kOperandFlagTarget"); \
432 }
433
434 #define RETURN() { \
435 instType.set("kInstructionTypeReturn"); \
436 }
437
438 /// X86ExtractSemantics - Performs various checks on the name of an X86
439 /// instruction to determine what sort of an instruction it is and then adds
440 /// the appropriate flags to the instruction and its operands
441 ///
442 /// \param instType A reference to the type for the instruction as a whole
443 /// \param operandFlags A reference to the array of operand flag object pointers
444 /// \param inst A reference to the original instruction
445 static void X86ExtractSemantics(
446 LiteralConstantEmitter &instType,
447