llvm.org GIT mirror llvm / 7580df3
Revert r201237+r201238: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call It introduced multiple test failures in the buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201241 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Sanders 6 years ago
82 changed file(s) with 85 addition(s) and 175 deletion(s). Raw diff Collapse all Expand all
298298
299299 std::vector InitialFrameState;
300300
301 //===--- Integrated Assembler State ----------------------------------===//
302 /// Should we use the integrated assembler?
303 /// The integrated assembler should be enabled by default (by the
304 /// constructors) when failing to parse a valid piece of assembly (inline
305 /// or otherwise) is considered a bug. It may then be overridden after
306 /// construction (see LLVMTargetMachine::initAsmInfo()).
307 bool UseIntegratedAssembler;
308
309301 public:
310302 explicit MCAsmInfo();
311303 virtual ~MCAsmInfo();
533525 const std::vector &getInitialFrameState() const {
534526 return InitialFrameState;
535527 }
536
537 /// Return true if assembly (inline or otherwise) should be parsed.
538 bool useIntegratedAssembler() const { return UseIntegratedAssembler; }
539
540 /// Set whether assembly (inline or otherwise) should be parsed.
541 void setUseIntegratedAssembler(bool Value) {
542 UseIntegratedAssembler = Value;
543 }
544528 };
545529 }
546530
7878 if (isNullTerminated)
7979 Str = Str.substr(0, Str.size()-1);
8080
81 // If the output streamer does not have mature MC support or the integrated
82 // assembler has been disabled, just emit the blob textually.
83 // Otherwise parse the asm and emit it via MC support.
81 // If the output streamer is actually a .s file, just emit the blob textually.
8482 // This is useful in case the asm parser doesn't handle something but the
8583 // system assembler does.
86 const MCAsmInfo *MCAI = TM.getMCAsmInfo();
87 assert(MCAI && "No MCAsmInfo");
88 if (!MCAI->useIntegratedAssembler()) {
84 if (OutStreamer.hasRawTextSupport()) {
8985 OutStreamer.EmitRawText(Str);
9086 emitInlineAsmEnd(TM.getSubtarget(), 0);
9187 return;
5252 AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
5353 cl::init(cl::BOU_UNSET));
5454
55 static cl::opt
56 NoIntegratedAssembler("no-integrated-as", cl::Hidden,
57 cl::desc("Disable integrated assembler"));
58
5955 static bool getVerboseAsm() {
6056 switch (AsmVerbose) {
6157 case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
6662 }
6763
6864 void LLVMTargetMachine::initAsmInfo() {
69 MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(),
70 TargetTriple);
65 AsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(), TargetTriple);
7166 // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
7267 // and if the old one gets included then MCAsmInfo will be NULL and
7368 // we'll crash later.
7469 // Provide the user with a useful error message about what's wrong.
75 assert(TmpAsmInfo && "MCAsmInfo not initialized. "
70 assert(AsmInfo && "MCAsmInfo not initialized. "
7671 "Make sure you include the correct TargetSelect.h"
7772 "and that InitializeAllTargetMCs() is being invoked!");
78
79 if (NoIntegratedAssembler)
80 TmpAsmInfo->setUseIntegratedAssembler(false);
81
82 AsmInfo = TmpAsmInfo;
8373 }
8474
8575 LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
8585 DwarfRegNumForCFI = false;
8686 NeedsDwarfSectionOffsetDirective = false;
8787 UseParensForSymbolVariant = false;
88
89 // FIXME: Clang's logic should be synced with the logic used to initialize
90 // this member and the two implementations should be merged.
91 // For reference:
92 // - Solaris always enables the integrated assembler by default
93 // - SparcELFMCAsmInfo and X86ELFMCAsmInfo are handling this case
94 // - Windows always enables the integrated assembler by default
95 // - MCAsmInfoCOFF is handling this case, should it be MCAsmInfoMicrosoft?
96 // - MachO targets always enables the integrated assembler by default
97 // - MCAsmInfoDarwin is handling this case
98 // - Generic_GCC toolchains enable the integrated assembler on a per
99 // architecture basis.
100 // - The target subclasses for AArch64, ARM, and X86 handle these cases
101 UseIntegratedAssembler = false;
10288 }
10389
10490 MCAsmInfo::~MCAsmInfo() {
3434 HasLEB128 = true; // Target asm supports leb128 directives (little-endian)
3535 SupportsDebugInformation = true;
3636 NeedsDwarfSectionOffsetDirective = true;
37
38 UseIntegratedAssembler = true;
3937 }
4038
4139 void MCAsmInfoMicrosoft::anchor() { }
5656 HasNoDeadStrip = true;
5757
5858 DwarfUsesRelocationsAcrossSections = false;
59
60 UseIntegratedAssembler = true;
6159 }
3434
3535 // Exceptions handling
3636 ExceptionsType = ExceptionHandling::DwarfCFI;
37
38 UseIntegratedAssembler = true;
3937 }
4038
4139 // Pin the vtable to this file.
2828
2929 // Exceptions handling
3030 ExceptionsType = ExceptionHandling::SjLj;
31
32 UseIntegratedAssembler = true;
3331 }
3432
3533 void ARMELFMCAsmInfo::anchor() { }
5149
5250 // foo(plt) instead of foo@plt
5351 UseParensForSymbolVariant = true;
54
55 UseIntegratedAssembler = true;
5652 }
3737 // rather than OS version
3838 if (T.isMacOSX() && T.isMacOSXVersionLT(10, 6))
3939 HasWeakDefCanBeHiddenDirective = false;
40
41 UseIntegratedAssembler = true;
4240 }
4341
4442 void PPCLinuxMCAsmInfo::anchor() { }
4543
46 PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(bool is64Bit, const Triple& T) {
44 PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(bool is64Bit) {
4745 if (is64Bit) {
4846 PointerSize = CalleeSaveStackSlotSize = 8;
4947 }
7270 ZeroDirective = "\t.space\t";
7371 Data64bitsDirective = is64Bit ? "\t.quad\t" : 0;
7472 AssemblerDialect = 1; // New-Style mnemonics.
75
76 if (T.getOS() == llvm::Triple::FreeBSD ||
77 (T.getOS() == llvm::Triple::NetBSD && !is64Bit))
78 UseIntegratedAssembler = true;
7973 }
8074
2828 class PPCLinuxMCAsmInfo : public MCAsmInfoELF {
2929 virtual void anchor();
3030 public:
31 explicit PPCLinuxMCAsmInfo(bool is64Bit, const Triple&);
31 explicit PPCLinuxMCAsmInfo(bool is64Bit);
3232 };
3333
3434 } // namespace llvm
7474 if (TheTriple.isOSDarwin())
7575 MAI = new PPCMCAsmInfoDarwin(isPPC64, TheTriple);
7676 else
77 MAI = new PPCLinuxMCAsmInfo(isPPC64, TheTriple);
77 MAI = new PPCLinuxMCAsmInfo(isPPC64);
7878
7979 // Initial state of the frame pointer is R1.
8080 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
4141
4242 SunStyleELFSectionSwitchSyntax = true;
4343 UsesELFSectionDirectiveForBSS = true;
44
45 if (TheTriple.getOS() == llvm::Triple::Solaris)
46 UseIntegratedAssembler = true;
4744 }
4845
4946 const MCExpr*
7575 // version in use. From at least >= ld64-97.17 (Xcode 3.2.6) the abs-ified
7676 // FDE relocs may be used.
7777 DwarfFDESymbolsUseAbsDiff = T.isMacOSX() && !T.isMacOSXVersionLT(10, 6);
78
79 UseIntegratedAssembler = true;
8078 }
8179
8280 X86_64MCAsmInfoDarwin::X86_64MCAsmInfoDarwin(const Triple &Triple)
115113 if ((T.getOS() == Triple::OpenBSD || T.getOS() == Triple::Bitrig) &&
116114 T.getArch() == Triple::x86)
117115 Data64bitsDirective = 0;
118
119 // Always enable the integrated assembler by default.
120 // Clang also enabled it when the OS is Solaris but that is redundant here.
121 UseIntegratedAssembler = true;
122116 }
123117
124118 const MCExpr *
149143 TextAlignFillValue = 0x90;
150144
151145 AllowAtInName = true;
152
153 UseIntegratedAssembler = true;
154146 }
155147
156148 void X86MCAsmInfoGNUCOFF::anchor() { }
165157
166158 // Exceptions handling
167159 ExceptionsType = ExceptionHandling::DwarfCFI;
168
169 UseIntegratedAssembler = true;
170160 }
None ;RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon -no-integrated-as < %s | FileCheck %s
0 ;RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s
11
22 define i64 @test_inline_constraint_r(i64 %base, i32 %offset) {
33 ; CHECK-LABEL: test_inline_constraint_r:
None ; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic < %s | FileCheck %s
11
22 @var_simple = hidden global i32 0
33 @var_got = global i32 0
None ; RUN: llc < %s -march=arm -no-integrated-as | grep "swi 107"
0 ; RUN: llc < %s -march=arm | grep "swi 107"
11
22 define i32 @_swilseek(i32) nounwind {
33 entry:
None ; RUN: llc < %s -march=arm -mattr=+vfp2 -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
11
22 define i32 @foo(float %scale, float %scale2) nounwind {
33 entry:
None ; RUN: llc < %s -O0 -relocation-model=pic -disable-fp-elim -no-integrated-as
0 ; RUN: llc < %s -O0 -relocation-model=pic -disable-fp-elim
11 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64-n32"
22 target triple = "armv6-apple-darwin10"
33
None ; RUN: llc < %s -O3 -mtriple=arm-linux-gnueabi -no-integrated-as | FileCheck %s
1 ; RUN: llc -mtriple=thumbv7-none-linux-gnueabi -verify-machineinstrs -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc < %s -O3 -mtriple=arm-linux-gnueabi | FileCheck %s
1 ; RUN: llc -mtriple=thumbv7-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s
22 ; check if regs are passing correctly
33 define void @i64_write(i64* %p, i64 %val) nounwind {
44 ; CHECK-LABEL: i64_write:
None ; RUN: llc < %s -march=arm -no-integrated-as
0 ; RUN: llc < %s -march=arm
11
22 ; Test ARM-mode "I" constraint, for any Data Processing immediate.
33 define i32 @testI(i32 %x) {
None ; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon,+v6t2 -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon,+v6t2 | FileCheck %s
11
22 ; Radar 7449043
33 %struct.int32x4_t = type { <4 x i32> }
None ; RUN: llc < %s -march=arm -no-integrated-as
0 ; RUN: llc < %s -march=arm
11 ; ModuleID = 'mult-alt-generic.c'
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
33 target triple = "arm"
None ; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 -pre-RA-sched=source -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 -pre-RA-sched=source | FileCheck %s
11 target triple = "thumbv7-apple-ios"
22 ;
33 ;
None ; RUN: llc -no-integrated-as < %s
0 ; RUN: llc < %s
11 ; XFAIL: sparc-sun-solaris2
22 ; PR1308
33 ; PR1557
None ; RUN: llc -no-integrated-as < %s
0 ; RUN: llc < %s
11
22 ; Test that we can have an "X" output constraint.
33
None ; RUN: llc -no-integrated-as < %s
0 ; RUN: llc < %s
11
22 %struct..0anon = type { [100 x i32] }
33
None ; RUN: llc -no-integrated-as < %s
0 ; RUN: llc < %s
11 ; PR1133
22 ; XFAIL: hexagon
33 define void @test(i32* %X) nounwind {
None ; RUN: llc -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc < %s | FileCheck %s
11
22 define void @test() {
33 entry:
None ; RUN: llc -O2 -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc -O2 < %s | FileCheck %s
11
22 @G = common global i32 0, align 4
33
None ; RUN: llc -no-integrated-as < %s | grep "foo 0 0"
0 ; RUN: llc < %s | grep "foo 0 0"
11
22 define void @bar() nounwind {
33 tail call void asm sideeffect "foo ${:uid} ${:uid}", ""() nounwind
+0
-17
test/CodeGen/Generic/mature-mc-support.ll less more
None ; Test that inline assembly is parsed by the MC layer when MC support is mature
1 ; (even when the output is assembly).
2
3 ; RUN: not llc -march=aarch64 < %s 2>&1 | FileCheck %s
4 ; RUN: not llc -march=aarch64 -filetype=obj < %s 2>&1 | FileCheck %s
5 ; RUN: not llc -march=arm < %s 2>&1 | FileCheck %s
6 ; RUN: not llc -march=arm -filetype=obj < %s 2>&1 | FileCheck %s
7 ; RUN: not llc -march=thumb < %s 2>&1 | FileCheck %s
8 ; RUN: not llc -march=thumb -filetype=obj < %s 2>&1 | FileCheck %s
9 ; RUN: not llc -march=x86 < %s 2>&1 | FileCheck %s
10 ; RUN: not llc -march=x86 -filetype=obj < %s 2>&1 | FileCheck %s
11 ; RUN: not llc -march=x86-64 < %s 2>&1 | FileCheck %s
12 ; RUN: not llc -march=x86-64 -filetype=obj < %s 2>&1 | FileCheck %s
13
14 module asm " .this_directive_is_very_unlikely_to_exist"
15
16 ; CHECK: LLVM ERROR: Error parsing inline asm
None ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 -no-integrated-as | grep "foo r3, r4"
1 ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 -no-integrated-as | grep "bari r3, 47"
0 ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep "foo r3, r4"
1 ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep "bari r3, 47"
22
33 ; PR1351
44
None ; RUN: llc -no-integrated-as < %s
0 ; RUN: llc < %s
11 ; PR1382
22
33 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
None ; RUN: llc < %s -march=thumb -no-integrated-as
0 ; RUN: llc < %s -march=thumb
11
22 ; Test Thumb-mode "I" constraint, for ADD immediate.
33 define i32 @testI(i32 %x) {
None ; RUN: llc < %s -march=x86 -no-integrated-as
0 ; RUN: llc < %s -march=x86
11 ; PR833
22
33 @G = weak global i32 0 ; [#uses=3]
0 ; PR850
1 ; RUN: llc < %s -march=x86 -x86-asm-syntax=att -no-integrated-as | FileCheck %s
1 ; RUN: llc < %s -march=x86 -x86-asm-syntax=att | FileCheck %s
22
33 ; CHECK: {{movl 4[(]%eax[)],%ebp}}
44 ; CHECK: {{movl 0[(]%eax[)], %ebx}}
None ; RUN: llc < %s -march=x86 -no-integrated-as | grep "mov %gs:72, %eax"
0 ; RUN: llc < %s -march=x86 | grep "mov %gs:72, %eax"
11 target datalayout = "e-p:32:32"
22 target triple = "i686-apple-darwin9"
33
None ; RUN: llc < %s -mcpu=yonah -march=x86 -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -mcpu=yonah -march=x86 | FileCheck %s
11
22 target datalayout = "e-p:32:32"
33 target triple = "i686-apple-darwin9"
None ; RUN: llc -no-integrated-as < %s
0 ; RUN: llc < %s
11 ; PR1748
22 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
33 target triple = "x86_64-unknown-linux-gnu"
None ; RUN: llc -no-integrated-as < %s -mtriple=x86_64-unknown-linux-gnu
0 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
11 ; PR1767
22
33 define void @xor_sse_2(i64 %bytes, i64* %p1, i64* %p2) {
None ; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -relocation-model=static | FileCheck %s
11 ; PR1761
22 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
33 target triple = "x86_64-pc-linux"
None ; RUN: llc -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc < %s | FileCheck %s
11 ; PR2078
22 ; The clobber list says that "ax" is clobbered. Make sure that eax isn't
33 ; allocated to the input/output register.
None ; RUN: llc < %s -march=x86 -no-integrated-as
0 ; RUN: llc < %s -march=x86
11
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
33 target triple = "i386-pc-linux-gnu"
None ; RUN: llc -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc < %s | FileCheck %s
11 ; rdar://5720231
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
33 target triple = "i386-apple-darwin8"
None ; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s
1 ; RUN: llc < %s -march=x86 -regalloc=basic -no-integrated-as | FileCheck %s
2 ; RUN: llc < %s -march=x86 -regalloc=greedy -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 | FileCheck %s
1 ; RUN: llc < %s -march=x86 -regalloc=basic | FileCheck %s
2 ; RUN: llc < %s -march=x86 -regalloc=greedy | FileCheck %s
33
44 ; The 1st, 2nd, 3rd and 5th registers must all be different. The registers
55 ; referenced in the 4th and 6th operands must not be the same as the 1st or 5th
None ; RUN: llc < %s -march=x86 -no-integrated-as
1 ; RUN: llc < %s -march=x86-64 -no-integrated-as
0 ; RUN: llc < %s -march=x86
1 ; RUN: llc < %s -march=x86-64
22
33 define void @test(i64 %x) nounwind {
44 entry:
None ; RUN: llc < %s -march=x86 -no-integrated-as
1 ; RUN: llc < %s -march=x86-64 -no-integrated-as
0 ; RUN: llc < %s -march=x86
1 ; RUN: llc < %s -march=x86-64
22
33 ; from gcc.c-torture/compile/920520-1.c
44
None ; RUN: llc < %s -march=x86 -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -march=x86 | FileCheck %s
11
22 ; ModuleID = 'shant.c'
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
None ; RUN: llc < %s -mtriple=i386-apple-darwin -no-integrated-as
0 ; RUN: llc < %s -mtriple=i386-apple-darwin
11 ; rdar://6781755
22 ; PR3934
33
None ; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -relocation-model=static | FileCheck %s
11 ; PR4152
22
33 ; CHECK: {{1: ._pv_cpu_ops[+]8}}
None ; RUN: llc -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc < %s | FileCheck %s
11 ; ModuleID = '4964.c'
22 ; PR 4964
33 ; Registers other than RAX, RCX are OK, but they must be different.
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
11 ; pr5391
22
33 define void @t() nounwind ssp {
None ; RUN: llc < %s -O0 -regalloc=fast -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -O0 -regalloc=fast | FileCheck %s
11 ; PR6520
22
33 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
None ; RUN: llc -regalloc=fast -optimize-regalloc=0 -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc -regalloc=fast -optimize-regalloc=0 < %s | FileCheck %s
11 ; PR7382
22 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
33 target triple = "x86_64-unknown-linux-gnu"
None ; RUN: llc < %s -disable-fp-elim -mtriple=i686-pc-mingw32 -no-integrated-as
0 ; RUN: llc < %s -disable-fp-elim -mtriple=i686-pc-mingw32
11
22 %struct.__SEH2Frame = type {}
33
None ; RUN: llc < %s -march=x86 -O0 -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -march=x86 -O0 | FileCheck %s
11 ; PR7509
22 target triple = "i386-apple-darwin10"
33 %asmtype = type { i32, i8*, i32, i32 }
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin11 | FileCheck %s
11 ; Any register is OK for %0, but it must be a register, not memory.
22
33 define i32 @foo() nounwind ssp {
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
11
22 define void @foo() nounwind ssp {
33 entry:
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
11 ; PR 4752
22
33 @n = global i32 0 ; [#uses=2]
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
11 ; PR 7528
22 ; formerly crashed
33
None ; RUN: llc < %s -verify-regalloc -no-integrated-as
0 ; RUN: llc < %s -verify-regalloc
11 ; PR11125
22 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
33 target triple = "x86_64-apple-macosx10.7"
None ; RUN: opt < %s -std-compile-opts | llc -no-integrated-as
0 ; RUN: opt < %s -std-compile-opts | llc
11 ; ModuleID = 'block12.c'
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
33 target triple = "i686-apple-darwin8"
None ; RUN: llc < %s -march=x86 -relocation-model=static -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s
11 ; PR882
22
33 target datalayout = "e-p:32:32"
None ; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - -no-integrated-as | FileCheck %s
0 ; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - | FileCheck %s
11
22 ; C code this came from
33 ;bool cas(float volatile *p, float *expected, float desired) {
None ; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -march=x86 -mattr=sse2 -no-integrated-as
1 ; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -no-integrated-as
0 ; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -march=x86 -mattr=sse2
1 ; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=x86_64-apple-darwin10
22
33 ; This tests very minimal fast-isel functionality.
44
None ; RUN: llc < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+sse2 -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+sse2 | FileCheck %s
11
22 ; Simple test to make sure folding for special constants (like float zero)
33 ; isn't completely broken.
None ; RUN: llc -march=x86-64 -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc -march=x86-64 < %s | FileCheck %s
11 ; PR3701
22
33 define i64 @t(i64* %arg) nounwind {
None ; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin | FileCheck %s
11
22 ; There should be no stack manipulations between the inline asm and ret.
33 ; CHECK: test1
88 }
99
1010 ; CHECK: zed
11 ; CHECK: movq %mm2, foobar+8(%rip)
11 ; CHECK: movq %mm2,foobar+8(%rip)
None ; RUN: llc < %s -march=x86 -no-integrated-as | grep " 37"
0 ; RUN: llc < %s -march=x86 | grep " 37"
11 ; rdar://7008959
22
33 define void @bork() nounwind {
0 ; PR2094
1 ; RUN: llc < %s -march=x86-64 -no-integrated-as | grep movslq
2 ; RUN: llc < %s -march=x86-64 -no-integrated-as | grep addps
3 ; RUN: llc < %s -march=x86-64 -no-integrated-as | grep paddd
4 ; RUN: llc < %s -march=x86-64 -no-integrated-as | not grep movq
1 ; RUN: llc < %s -march=x86-64 | grep movslq
2 ; RUN: llc < %s -march=x86-64 | grep addps
3 ; RUN: llc < %s -march=x86-64 | grep paddd
4 ; RUN: llc < %s -march=x86-64 | not grep movq
55
66 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
77 target triple = "x86_64-apple-darwin8"
None ; RUN: llc < %s -march=x86-64 -mattr=+avx -no-integrated-as
0 ; RUN: llc < %s -march=x86-64 -mattr=+avx
11 ; rdar://7066579
22
33 %0 = type { i64, i64, i64, i64, i64 } ; type %0
None ; RUN: llc -march=x86 -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc -march=x86 < %s | FileCheck %s
11
22 declare void @bar(i32* %junk)
33
None ; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic | FileCheck %s
11 ; rdar://6992609
22
33 ; CHECK: movl [[EDX:%e..]], 4(%esp)
None ; RUN: llc < %s -march=x86 -mcpu=yonah -no-integrated-as
0 ; RUN: llc < %s -march=x86 -mcpu=yonah
11
22 define void @test1() {
33 tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000)
None ; RUN: llc < %s -march=x86 -no-integrated-as
0 ; RUN: llc < %s -march=x86
11
22 define i32 @test1() nounwind {
33 ; Dest is AX, dest type = i32.
None ; RUN: llc < %s -march=x86 -mcpu=core2 -no-integrated-as | FileCheck %s
0 ; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s
11
22 define i32 @t1() nounwind {
33 entry:
None ; RUN: llc < %s -march=x86 -no-integrated-as
0 ; RUN: llc < %s -march=x86
11 ; ModuleID = 'mult-alt-generic.c'
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
33 target triple = "i686"
None ; RUN: llc < %s -march=x86-64 -no-integrated-as
0 ; RUN: llc < %s -march=x86-64
11 ; ModuleID = 'mult-alt-generic.c'
22 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
33 target triple = "x86_64"
None ; RUN: llc < %s -march=x86 -mattr=+sse2 -no-integrated-as
0 ; RUN: llc < %s -march=x86 -mattr=+sse2
11 ; ModuleID = 'mult-alt-x86.c'
22 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
33 target triple = "i686-pc-win32"
None ; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem -no-integrated-as < %s | FileCheck %s
0 ; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s
11 ; rdar://7236213
22 ;
33 ; The scheduler's 2-address hack has been disabled, so there is
None ; RUN: opt < %s -std-compile-opts -o - | llc -no-integrated-as -o - | grep bork_directive | wc -l | grep 2
0 ; RUN: opt < %s -std-compile-opts -o - | llc -o - | grep bork_directive | wc -l | grep 2
11
22 ;; We don't want branch folding to fold asm directives.
33