llvm.org GIT mirror llvm / 74e3c34
[InstCombine] foldICmpWithLowBitMaskedVal(): handle ~(-1 << y) mask Summary: Two folds are happening here: 1. https://rise4fun.com/Alive/oaFX 2. And then `foldICmpWithHighBitMask()` (D52001): https://rise4fun.com/Alive/wsP4 This change doesn't just add the handling for eq/ne predicates, it actually builds upon the previous `foldICmpWithLowBitMaskedVal()` work, so **all** the 16 fold variants* are immediately supported. I'm indeed only testing these two predicates. I do not feel like re-proving all 16 folds*, because they were already proven for the general case of constant with all-ones in low bits. So as long as the mask produces all-ones in low bits, i'm pretty sure the fold is valid. But required, i can re-prove, let me know. * eq/ne are commutative - 4 folds; ult/ule/ugt/uge - are not commutative (the commuted variant is InstSimplified), 4 folds; slt/sle/sgt/sge are not commutative - 4 folds. 12 folds in total. https://bugs.llvm.org/show_bug.cgi?id=38123 https://bugs.llvm.org/show_bug.cgi?id=38708 Reviewers: spatel, craig.topper, RKSimon Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D52146 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342546 91177308-0d34-0410-b5e6-96231b3b80d8 Roman Lebedev 1 year, 9 months ago
3 changed file(s) with 81 addition(s) and 114 deletion(s). Raw diff Collapse all Expand all
28822882 /// In this case, we are looking for comparisons that look like
28832883 /// a check for a lossy truncation.
28842884 /// Folds:
2885 /// x & (-1 >> y) SrcPred x to x DstPred (-1 >> y)
2885 /// icmp SrcPred (x & Mask), x to icmp DstPred x, Mask
2886 /// Where Mask is some pattern that produces all-ones in low bits:
2887 /// (-1 >> y)
2888 /// ~(-1 << y)
28862889 /// The Mask can be a constant, too.
28872890 /// For some predicates, the operands are commutative.
28882891 /// For others, x can only be on a specific side.
28902893 InstCombiner::BuilderTy &Builder) {
28912894 ICmpInst::Predicate SrcPred;
28922895 Value *X, *M;
2893 auto m_Mask = m_CombineOr(m_LShr(m_AllOnes(), m_Value()), m_LowBitMask());
2896 auto m_VariableMask = m_CombineOr(m_Not(m_Shl(m_AllOnes(), m_Value())),
2897 m_LShr(m_AllOnes(), m_Value()));
2898 auto m_Mask = m_CombineOr(m_VariableMask, m_LowBitMask());
28942899 if (!match(&I, m_c_ICmp(SrcPred,
28952900 m_c_And(m_CombineAnd(m_Mask, m_Value(M)), m_Value(X)),
28962901 m_Deferred(X))))
1515
1616 define i1 @p0(i8 %x, i8 %y) {
1717 ; CHECK-LABEL: @p0(
18 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
19 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
20 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
21 ; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
22 ; CHECK-NEXT: ret i1 [[RET]]
18 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr i8 [[X:%.*]], [[Y:%.*]]
19 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X_HIGHBITS]], 0
20 ; CHECK-NEXT: ret i1 [[TMP1]]
2321 ;
2422 %t0 = shl i8 -1, %y
2523 %t1 = xor i8 %t0, -1
3432
3533 define <2 x i1> @p1_vec(<2 x i8> %x, <2 x i8> %y) {
3634 ; CHECK-LABEL: @p1_vec(
37 ; CHECK-NEXT: [[T0:%.*]] = shl <2 x i8> , [[Y:%.*]]
38 ; CHECK-NEXT: [[T1:%.*]] = xor <2 x i8> [[T0]],
39 ; CHECK-NEXT: [[T2:%.*]] = and <2 x i8> [[T1]], [[X:%.*]]
40 ; CHECK-NEXT: [[RET:%.*]] = icmp eq <2 x i8> [[T2]], [[X]]
41 ; CHECK-NEXT: ret <2 x i1> [[RET]]
35 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr <2 x i8> [[X:%.*]], [[Y:%.*]]
36 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i8> [[X_HIGHBITS]], zeroinitializer
37 ; CHECK-NEXT: ret <2 x i1> [[TMP1]]
4238 ;
4339 %t0 = shl <2 x i8> , %y
4440 %t1 = xor <2 x i8> %t0,
4945
5046 define <3 x i1> @p2_vec_undef0(<3 x i8> %x, <3 x i8> %y) {
5147 ; CHECK-LABEL: @p2_vec_undef0(
52 ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> , [[Y:%.*]]
53 ; CHECK-NEXT: [[T1:%.*]] = xor <3 x i8> [[T0]],
54 ; CHECK-NEXT: [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
55 ; CHECK-NEXT: [[RET:%.*]] = icmp eq <3 x i8> [[T2]], [[X]]
56 ; CHECK-NEXT: ret <3 x i1> [[RET]]
48 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
49 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i8> [[X_HIGHBITS]], zeroinitializer
50 ; CHECK-NEXT: ret <3 x i1> [[TMP1]]
5751 ;
5852 %t0 = shl <3 x i8> , %y
5953 %t1 = xor <3 x i8> %t0,
6458
6559 define <3 x i1> @p3_vec_undef0(<3 x i8> %x, <3 x i8> %y) {
6660 ; CHECK-LABEL: @p3_vec_undef0(
67 ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> , [[Y:%.*]]
68 ; CHECK-NEXT: [[T1:%.*]] = xor <3 x i8> [[T0]],
69 ; CHECK-NEXT: [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
70 ; CHECK-NEXT: [[RET:%.*]] = icmp eq <3 x i8> [[T2]], [[X]]
71 ; CHECK-NEXT: ret <3 x i1> [[RET]]
61 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
62 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i8> [[X_HIGHBITS]], zeroinitializer
63 ; CHECK-NEXT: ret <3 x i1> [[TMP1]]
7264 ;
7365 %t0 = shl <3 x i8> , %y
7466 %t1 = xor <3 x i8> %t0,
7971
8072 define <3 x i1> @p4_vec_undef2(<3 x i8> %x, <3 x i8> %y) {
8173 ; CHECK-LABEL: @p4_vec_undef2(
82 ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> , [[Y:%.*]]
83 ; CHECK-NEXT: [[T1:%.*]] = xor <3 x i8> [[T0]],
84 ; CHECK-NEXT: [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
85 ; CHECK-NEXT: [[RET:%.*]] = icmp eq <3 x i8> [[T2]], [[X]]
86 ; CHECK-NEXT: ret <3 x i1> [[RET]]
74 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
75 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <3 x i8> [[X_HIGHBITS]], zeroinitializer
76 ; CHECK-NEXT: ret <3 x i1> [[TMP1]]
8777 ;
8878 %t0 = shl <3 x i8> , %y
8979 %t1 = xor <3 x i8> %t0,
10090
10191 define i1 @c0(i8 %y) {
10292 ; CHECK-LABEL: @c0(
103 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
104 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
10593 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
106 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[X]], [[T1]]
107 ; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
108 ; CHECK-NEXT: ret i1 [[RET]]
94 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
95 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X_HIGHBITS]], 0
96 ; CHECK-NEXT: ret i1 [[TMP1]]
10997 ;
11098 %t0 = shl i8 -1, %y
11199 %t1 = xor i8 %t0, -1
117105
118106 define i1 @c1(i8 %y) {
119107 ; CHECK-LABEL: @c1(
120 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
121 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
122108 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
123 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[X]], [[T1]]
124 ; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[X]], [[T2]]
125 ; CHECK-NEXT: ret i1 [[RET]]
109 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
110 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X_HIGHBITS]], 0
111 ; CHECK-NEXT: ret i1 [[TMP1]]
126112 ;
127113 %t0 = shl i8 -1, %y
128114 %t1 = xor i8 %t0, -1
134120
135121 define i1 @c2(i8 %y) {
136122 ; CHECK-LABEL: @c2(
137 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
138 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
139123 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
140 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[X]], [[T1]]
141 ; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[X]], [[T2]]
142 ; CHECK-NEXT: ret i1 [[RET]]
124 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
125 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X_HIGHBITS]], 0
126 ; CHECK-NEXT: ret i1 [[TMP1]]
143127 ;
144128 %t0 = shl i8 -1, %y
145129 %t1 = xor i8 %t0, -1
159143 ; CHECK-LABEL: @oneuse0(
160144 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
161145 ; CHECK-NEXT: call void @use8(i8 [[T0]])
162 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
163 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
164 ; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
165 ; CHECK-NEXT: ret i1 [[RET]]
146 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr i8 [[X:%.*]], [[Y]]
147 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X_HIGHBITS]], 0
148 ; CHECK-NEXT: ret i1 [[TMP1]]
166149 ;
167150 %t0 = shl i8 -1, %y
168151 call void @use8(i8 %t0)
177160 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
178161 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
179162 ; CHECK-NEXT: call void @use8(i8 [[T1]])
180 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
181 ; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
182 ; CHECK-NEXT: ret i1 [[RET]]
163 ; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i8 [[T1]], [[X:%.*]]
164 ; CHECK-NEXT: ret i1 [[TMP1]]
183165 ;
184166 %t0 = shl i8 -1, %y
185167 %t1 = xor i8 %t0, -1
195177 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
196178 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
197179 ; CHECK-NEXT: call void @use8(i8 [[T2]])
198 ; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
199 ; CHECK-NEXT: ret i1 [[RET]]
180 ; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i8 [[T1]], [[X]]
181 ; CHECK-NEXT: ret i1 [[TMP1]]
200182 ;
201183 %t0 = shl i8 -1, %y
202184 %t1 = xor i8 %t0, -1
212194 ; CHECK-NEXT: call void @use8(i8 [[T0]])
213195 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
214196 ; CHECK-NEXT: call void @use8(i8 [[T1]])
215 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
216 ; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
217 ; CHECK-NEXT: ret i1 [[RET]]
197 ; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i8 [[T1]], [[X:%.*]]
198 ; CHECK-NEXT: ret i1 [[TMP1]]
218199 ;
219200 %t0 = shl i8 -1, %y
220201 call void @use8(i8 %t0)
232213 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
233214 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
234215 ; CHECK-NEXT: call void @use8(i8 [[T2]])
235 ; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
236 ; CHECK-NEXT: ret i1 [[RET]]
216 ; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i8 [[T1]], [[X]]
217 ; CHECK-NEXT: ret i1 [[TMP1]]
237218 ;
238219 %t0 = shl i8 -1, %y
239220 call void @use8(i8 %t0)
252233 ; CHECK-NEXT: call void @use8(i8 [[T1]])
253234 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
254235 ; CHECK-NEXT: call void @use8(i8 [[T2]])
255 ; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
256 ; CHECK-NEXT: ret i1 [[RET]]
236 ; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i8 [[T1]], [[X]]
237 ; CHECK-NEXT: ret i1 [[TMP1]]
257238 ;
258239 %t0 = shl i8 -1, %y
259240 call void @use8(i8 %t0)
1515
1616 define i1 @p0(i8 %x, i8 %y) {
1717 ; CHECK-LABEL: @p0(
18 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
19 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
20 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
21 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
22 ; CHECK-NEXT: ret i1 [[RET]]
18 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr i8 [[X:%.*]], [[Y:%.*]]
19 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X_HIGHBITS]], 0
20 ; CHECK-NEXT: ret i1 [[TMP1]]
2321 ;
2422 %t0 = shl i8 -1, %y
2523 %t1 = xor i8 %t0, -1
3432
3533 define <2 x i1> @p1_vec(<2 x i8> %x, <2 x i8> %y) {
3634 ; CHECK-LABEL: @p1_vec(
37 ; CHECK-NEXT: [[T0:%.*]] = shl <2 x i8> , [[Y:%.*]]
38 ; CHECK-NEXT: [[T1:%.*]] = xor <2 x i8> [[T0]],
39 ; CHECK-NEXT: [[T2:%.*]] = and <2 x i8> [[T1]], [[X:%.*]]
40 ; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i8> [[T2]], [[X]]
41 ; CHECK-NEXT: ret <2 x i1> [[RET]]
35 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr <2 x i8> [[X:%.*]], [[Y:%.*]]
36 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i8> [[X_HIGHBITS]], zeroinitializer
37 ; CHECK-NEXT: ret <2 x i1> [[TMP1]]
4238 ;
4339 %t0 = shl <2 x i8> , %y
4440 %t1 = xor <2 x i8> %t0,
4945
5046 define <3 x i1> @p2_vec_undef0(<3 x i8> %x, <3 x i8> %y) {
5147 ; CHECK-LABEL: @p2_vec_undef0(
52 ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> , [[Y:%.*]]
53 ; CHECK-NEXT: [[T1:%.*]] = xor <3 x i8> [[T0]],
54 ; CHECK-NEXT: [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
55 ; CHECK-NEXT: [[RET:%.*]] = icmp ne <3 x i8> [[T2]], [[X]]
56 ; CHECK-NEXT: ret <3 x i1> [[RET]]
48 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
49 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <3 x i8> [[X_HIGHBITS]], zeroinitializer
50 ; CHECK-NEXT: ret <3 x i1> [[TMP1]]
5751 ;
5852 %t0 = shl <3 x i8> , %y
5953 %t1 = xor <3 x i8> %t0,
6458
6559 define <3 x i1> @p3_vec_undef0(<3 x i8> %x, <3 x i8> %y) {
6660 ; CHECK-LABEL: @p3_vec_undef0(
67 ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> , [[Y:%.*]]
68 ; CHECK-NEXT: [[T1:%.*]] = xor <3 x i8> [[T0]],
69 ; CHECK-NEXT: [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
70 ; CHECK-NEXT: [[RET:%.*]] = icmp ne <3 x i8> [[T2]], [[X]]
71 ; CHECK-NEXT: ret <3 x i1> [[RET]]
61 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
62 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <3 x i8> [[X_HIGHBITS]], zeroinitializer
63 ; CHECK-NEXT: ret <3 x i1> [[TMP1]]
7264 ;
7365 %t0 = shl <3 x i8> , %y
7466 %t1 = xor <3 x i8> %t0,
7971
8072 define <3 x i1> @p4_vec_undef2(<3 x i8> %x, <3 x i8> %y) {
8173 ; CHECK-LABEL: @p4_vec_undef2(
82 ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> , [[Y:%.*]]
83 ; CHECK-NEXT: [[T1:%.*]] = xor <3 x i8> [[T0]],
84 ; CHECK-NEXT: [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
85 ; CHECK-NEXT: [[RET:%.*]] = icmp ne <3 x i8> [[T2]], [[X]]
86 ; CHECK-NEXT: ret <3 x i1> [[RET]]
74 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
75 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <3 x i8> [[X_HIGHBITS]], zeroinitializer
76 ; CHECK-NEXT: ret <3 x i1> [[TMP1]]
8777 ;
8878 %t0 = shl <3 x i8> , %y
8979 %t1 = xor <3 x i8> %t0,
10090
10191 define i1 @c0(i8 %y) {
10292 ; CHECK-LABEL: @c0(
103 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
104 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
10593 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
106 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[X]], [[T1]]
107 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
108 ; CHECK-NEXT: ret i1 [[RET]]
94 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
95 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X_HIGHBITS]], 0
96 ; CHECK-NEXT: ret i1 [[TMP1]]
10997 ;
11098 %t0 = shl i8 -1, %y
11199 %t1 = xor i8 %t0, -1
117105
118106 define i1 @c1(i8 %y) {
119107 ; CHECK-LABEL: @c1(
120 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
121 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
122108 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
123 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[X]], [[T1]]
124 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i8 [[X]], [[T2]]
125 ; CHECK-NEXT: ret i1 [[RET]]
109 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
110 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X_HIGHBITS]], 0
111 ; CHECK-NEXT: ret i1 [[TMP1]]
126112 ;
127113 %t0 = shl i8 -1, %y
128114 %t1 = xor i8 %t0, -1
134120
135121 define i1 @c2(i8 %y) {
136122 ; CHECK-LABEL: @c2(
137 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
138 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
139123 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
140 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[X]], [[T1]]
141 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i8 [[X]], [[T2]]
142 ; CHECK-NEXT: ret i1 [[RET]]
124 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
125 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X_HIGHBITS]], 0
126 ; CHECK-NEXT: ret i1 [[TMP1]]
143127 ;
144128 %t0 = shl i8 -1, %y
145129 %t1 = xor i8 %t0, -1
159143 ; CHECK-LABEL: @oneuse0(
160144 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
161145 ; CHECK-NEXT: call void @use8(i8 [[T0]])
162 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
163 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
164 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
165 ; CHECK-NEXT: ret i1 [[RET]]
146 ; CHECK-NEXT: [[X_HIGHBITS:%.*]] = lshr i8 [[X:%.*]], [[Y]]
147 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X_HIGHBITS]], 0
148 ; CHECK-NEXT: ret i1 [[TMP1]]
166149 ;
167150 %t0 = shl i8 -1, %y
168151 call void @use8(i8 %t0)
177160 ; CHECK-NEXT: [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
178161 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
179162 ; CHECK-NEXT: call void @use8(i8 [[T1]])
180 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
181 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
182 ; CHECK-NEXT: ret i1 [[RET]]
163 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[T1]], [[X:%.*]]
164 ; CHECK-NEXT: ret i1 [[TMP1]]
183165 ;
184166 %t0 = shl i8 -1, %y
185167 %t1 = xor i8 %t0, -1
195177 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
196178 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
197179 ; CHECK-NEXT: call void @use8(i8 [[T2]])
198 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
199 ; CHECK-NEXT: ret i1 [[RET]]
180 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[T1]], [[X]]
181 ; CHECK-NEXT: ret i1 [[TMP1]]
200182 ;
201183 %t0 = shl i8 -1, %y
202184 %t1 = xor i8 %t0, -1
212194 ; CHECK-NEXT: call void @use8(i8 [[T0]])
213195 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
214196 ; CHECK-NEXT: call void @use8(i8 [[T1]])
215 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
216 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
217 ; CHECK-NEXT: ret i1 [[RET]]
197 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[T1]], [[X:%.*]]
198 ; CHECK-NEXT: ret i1 [[TMP1]]
218199 ;
219200 %t0 = shl i8 -1, %y
220201 call void @use8(i8 %t0)
232213 ; CHECK-NEXT: [[T1:%.*]] = xor i8 [[T0]], -1
233214 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
234215 ; CHECK-NEXT: call void @use8(i8 [[T2]])
235 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
236 ; CHECK-NEXT: ret i1 [[RET]]
216 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[T1]], [[X]]
217 ; CHECK-NEXT: ret i1 [[TMP1]]
237218 ;
238219 %t0 = shl i8 -1, %y
239220 call void @use8(i8 %t0)
252233 ; CHECK-NEXT: call void @use8(i8 [[T1]])
253234 ; CHECK-NEXT: [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
254235 ; CHECK-NEXT: call void @use8(i8 [[T2]])
255 ; CHECK-NEXT: [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
256 ; CHECK-NEXT: ret i1 [[RET]]
236 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[T1]], [[X]]
237 ; CHECK-NEXT: ret i1 [[TMP1]]
257238 ;
258239 %t0 = shl i8 -1, %y
259240 call void @use8(i8 %t0)