llvm.org GIT mirror llvm / 7486d92
Change how we iterate over relocations on ELF. For COFF and MachO, sections semantically have relocations that apply to them. That is not the case on ELF. In relocatable objects (.o), a section with relocations in ELF has offsets to another section where the relocations should be applied. In dynamic objects and executables, relocations don't have an offset, they have a virtual address. The section sh_info may or may not point to another section, but that is not actually used for resolving the relocations. This patch exposes that in the ObjectFile API. It has the following advantages: * Most (all?) clients can handle this more efficiently. They will normally walk all relocations, so doing an effort to iterate in a particular order doesn't save time. * llvm-readobj now prints relocations in the same way the native readelf does. * probably most important, relocations that don't point to any section are now visible. This is the case of relocations in the rela.dyn section. See the updated relocation-executable.test for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182908 91177308-0d34-0410-b5e6-96231b3b80d8 Rafael Espindola 7 years ago
83 changed file(s) with 424 addition(s) and 340 deletion(s). Raw diff Collapse all Expand all
581581 private:
582582 typedef SmallVector Sections_t;
583583 typedef DenseMap IndexMap_t;
584 typedef DenseMap > RelocMap_t;
585584
586585 const Elf_Ehdr *Header;
587586 const Elf_Shdr *SectionHeaderTable;
633632 void LoadVersionNeeds(const Elf_Shdr *ec) const;
634633 void LoadVersionMap() const;
635634
636 /// @brief Map sections to an array of relocation sections that reference
637 /// them sorted by section index.
638 RelocMap_t SectionRelocMap;
639
640635 /// @brief Get the relocation section that contains \a Rel.
641636 const Elf_Shdr *getRelSection(DataRefImpl Rel) const {
642 return getSection(Rel.w.b);
637 return getSection(Rel.d.a);
643638 }
644639
645640 public:
711706 bool &Result) const;
712707 virtual relocation_iterator getSectionRelBegin(DataRefImpl Sec) const;
713708 virtual relocation_iterator getSectionRelEnd(DataRefImpl Sec) const;
709 virtual section_iterator getRelocatedSection(DataRefImpl Sec) const;
714710
715711 virtual error_code getRelocationNext(DataRefImpl Rel,
716712 RelocationRef &Res) const;
14571453 relocation_iterator
14581454 ELFObjectFile::getSectionRelBegin(DataRefImpl Sec) const {
14591455 DataRefImpl RelData;
1460 const Elf_Shdr *sec = reinterpret_cast(Sec.p);
1461 typename RelocMap_t::const_iterator ittr = SectionRelocMap.find(sec);
1462 if (sec != 0 && ittr != SectionRelocMap.end()) {
1463 RelData.w.a = getSection(ittr->second[0])->sh_info;
1464 RelData.w.b = ittr->second[0];
1465 RelData.w.c = 0;
1466 }
1456 uintptr_t SHT = reinterpret_cast(SectionHeaderTable);
1457 RelData.d.a = (Sec.p - SHT) / Header->e_shentsize;
1458 RelData.d.b = 0;
14671459 return relocation_iterator(RelocationRef(RelData, this));
14681460 }
14691461
14711463 relocation_iterator
14721464 ELFObjectFile::getSectionRelEnd(DataRefImpl Sec) const {
14731465 DataRefImpl RelData;
1474 const Elf_Shdr *sec = reinterpret_cast(Sec.p);
1475 typename RelocMap_t::const_iterator ittr = SectionRelocMap.find(sec);
1476 if (sec != 0 && ittr != SectionRelocMap.end()) {
1477 // Get the index of the last relocation section for this section.
1478 std::size_t relocsecindex = ittr->second[ittr->second.size() - 1];
1479 const Elf_Shdr *relocsec = getSection(relocsecindex);
1480 RelData.w.a = relocsec->sh_info;
1481 RelData.w.b = relocsecindex;
1482 RelData.w.c = relocsec->sh_size / relocsec->sh_entsize;
1483 }
1466 uintptr_t SHT = reinterpret_cast(SectionHeaderTable);
1467 const Elf_Shdr *S = reinterpret_cast(Sec.p);
1468 RelData.d.a = (Sec.p - SHT) / Header->e_shentsize;
1469 if (S->sh_type != ELF::SHT_RELA && S->sh_type != ELF::SHT_REL)
1470 RelData.d.b = 0;
1471 else
1472 RelData.d.b = S->sh_size / S->sh_entsize;
1473
14841474 return relocation_iterator(RelocationRef(RelData, this));
1475 }
1476
1477 template
1478 section_iterator
1479 ELFObjectFile::getRelocatedSection(DataRefImpl Sec) const {
1480 if (Header->e_type != ELF::ET_REL)
1481 return end_sections();
1482
1483 const Elf_Shdr *S = reinterpret_cast(Sec.p);
1484 unsigned sh_type = S->sh_type;
1485 if (sh_type != ELF::SHT_RELA && sh_type != ELF::SHT_REL)
1486 return end_sections();
1487
1488 unsigned SecIndex = S->sh_info;
1489 assert(SecIndex != 0);
1490 const Elf_Shdr *R = getSection(S->sh_info);
1491 DataRefImpl D;
1492 D.p = reinterpret_cast(R);
1493 return section_iterator(SectionRef(D, this));
14851494 }
14861495
14871496 // Relocations
14881497 template
14891498 error_code ELFObjectFile::getRelocationNext(DataRefImpl Rel,
14901499 RelocationRef &Result) const {
1491 ++Rel.w.c;
1492 const Elf_Shdr *relocsec = getSection(Rel.w.b);
1493 if (Rel.w.c >= (relocsec->sh_size / relocsec->sh_entsize)) {
1494 // We have reached the end of the relocations for this section. See if there
1495 // is another relocation section.
1496 typename RelocMap_t::mapped_type relocseclist =
1497 SectionRelocMap.lookup(getSection(Rel.w.a));
1498
1499 // Do a binary search for the current reloc section index (which must be
1500 // present). Then get the next one.
1501 typename RelocMap_t::mapped_type::const_iterator loc =
1502 std::lower_bound(relocseclist.begin(), relocseclist.end(), Rel.w.b);
1503 ++loc;
1504
1505 // If there is no next one, don't do anything. The ++Rel.w.c above sets Rel
1506 // to the end iterator.
1507 if (loc != relocseclist.end()) {
1508 Rel.w.b = *loc;
1509 Rel.w.a = 0;
1510 }
1511 }
1500 ++Rel.d.b;
15121501 Result = RelocationRef(Rel, this);
15131502 return object_error::success;
15141503 }
15171506 error_code ELFObjectFile::getRelocationSymbol(DataRefImpl Rel,
15181507 SymbolRef &Result) const {
15191508 uint32_t symbolIdx;
1520 const Elf_Shdr *sec = getSection(Rel.w.b);
1509 const Elf_Shdr *sec = getRelSection(Rel);
15211510 switch (sec->sh_type) {
15221511 default :
15231512 report_fatal_error("Invalid section type in Rel!");
15601549
15611550 template
15621551 uint64_t ELFObjectFile::getROffset(DataRefImpl Rel) const {
1563 const Elf_Shdr *sec = getSection(Rel.w.b);
1552 const Elf_Shdr *sec = getRelSection(Rel);
15641553 switch (sec->sh_type) {
15651554 default:
15661555 report_fatal_error("Invalid section type in Rel!");
15741563 template
15751564 error_code ELFObjectFile::getRelocationType(DataRefImpl Rel,
15761565 uint64_t &Result) const {
1577 const Elf_Shdr *sec = getSection(Rel.w.b);
1566 const Elf_Shdr *sec = getRelSection(Rel);
15781567 switch (sec->sh_type) {
15791568 default :
15801569 report_fatal_error("Invalid section type in Rel!");
21912180 template
21922181 error_code ELFObjectFile::getRelocationTypeName(
21932182 DataRefImpl Rel, SmallVectorImpl &Result) const {
2194 const Elf_Shdr *sec = getSection(Rel.w.b);
2183 const Elf_Shdr *sec = getRelSection(Rel);
21952184 uint32_t type;
21962185 switch (sec->sh_type) {
21972186 default :
22332222 template
22342223 error_code ELFObjectFile::getRelocationAddend(
22352224 DataRefImpl Rel, int64_t &Result) const {
2236 const Elf_Shdr *sec = getSection(Rel.w.b);
2225 const Elf_Shdr *sec = getRelSection(Rel);
22372226 switch (sec->sh_type) {
22382227 default :
22392228 report_fatal_error("Invalid section type in Rel!");
22512240 template
22522241 error_code ELFObjectFile::getRelocationValueString(
22532242 DataRefImpl Rel, SmallVectorImpl &Result) const {
2254 const Elf_Shdr *sec = getSection(Rel.w.b);
2243 const Elf_Shdr *sec = getRelSection(Rel);
22552244 uint8_t type;
22562245 StringRef res;
22572246 int64_t addend = 0;
24012390 break;
24022391 }
24032392 case ELF::SHT_REL:
2404 case ELF::SHT_RELA: {
2405 SectionRelocMap[getSection(sh->sh_info)].push_back(i);
2393 case ELF::SHT_RELA:
24062394 break;
2407 }
24082395 case ELF::SHT_DYNAMIC: {
24092396 if (dot_dynamic_sec != NULL)
24102397 // FIXME: Proper error handling.
24352422 }
24362423 }
24372424 ++sh;
2438 }
2439
2440 // Sort section relocation lists by index.
2441 for (typename RelocMap_t::iterator i = SectionRelocMap.begin(),
2442 e = SectionRelocMap.end(); i != e; ++i) {
2443 std::sort(i->second.begin(), i->second.end());
24442425 }
24452426
24462427 // Get string table sections.
27942775 template
27952776 const typename ELFObjectFile::Elf_Rel *
27962777 ELFObjectFile::getRel(DataRefImpl Rel) const {
2797 return getEntry(Rel.w.b, Rel.w.c);
2778 return getEntry(Rel.d.a, Rel.d.b);
27982779 }
27992780
28002781 template
28012782 const typename ELFObjectFile::Elf_Rela *
28022783 ELFObjectFile::getRela(DataRefImpl Rela) const {
2803 return getEntry(Rela.w.b, Rela.w.c);
2784 return getEntry(Rela.d.a, Rela.d.b);
28042785 }
28052786
28062787 template
2727 class ObjectFile;
2828
2929 union DataRefImpl {
30 struct {
31 // ELF needs this for relocations. This entire union should probably be a
32 // char[max(8, sizeof(uintptr_t))] and require the impl to cast.
33 uint16_t a, b;
34 uint32_t c;
35 } w;
30 // This entire union should probably be a
31 // char[max(8, sizeof(uintptr_t))] and require the impl to cast.
3632 struct {
3733 uint32_t a, b;
3834 } d;
132128
133129 /// SectionRef - This is a value type class that represents a single section in
134130 /// the list of sections in the object file.
131 class SectionRef;
132 typedef content_iterator section_iterator;
135133 class SectionRef {
136134 friend class SymbolRef;
137135 DataRefImpl SectionPimpl;
168166
169167 relocation_iterator begin_relocations() const;
170168 relocation_iterator end_relocations() const;
169 section_iterator getRelocatedSection() const;
171170
172171 DataRefImpl getRawDataRefImpl() const;
173172 };
174 typedef content_iterator section_iterator;
175173
176174 /// SymbolRef - This is a value type class that represents a single symbol in
177175 /// the list of symbols in the object file.
325323 bool &Result) const = 0;
326324 virtual relocation_iterator getSectionRelBegin(DataRefImpl Sec) const = 0;
327325 virtual relocation_iterator getSectionRelEnd(DataRefImpl Sec) const = 0;
328
326 virtual section_iterator getRelocatedSection(DataRefImpl Sec) const;
329327
330328 // Same as above for RelocationRef.
331329 friend class RelocationRef;
537535 return OwningObject->getSectionRelEnd(SectionPimpl);
538536 }
539537
538 inline section_iterator SectionRef::getRelocatedSection() const {
539 return OwningObject->getRelocatedSection(SectionPimpl);
540 }
541
540542 inline DataRefImpl SectionRef::getRawDataRefImpl() const {
541543 return SectionPimpl;
542544 }
1818 #include
1919 using namespace llvm;
2020 using namespace dwarf;
21 using namespace object;
2122
2223 typedef DWARFDebugLine::LineTable DWARFLineTable;
2324
553554 .Case("debug_addr", &AddrSection)
554555 // Any more debug info sections go here.
555556 .Default(0);
556 if (!Section)
557 if (Section) {
558 *Section = data;
559 if (name == "debug_ranges") {
560 // FIXME: Use the other dwo range section when we emit it.
561 RangeDWOSection = data;
562 }
563 }
564
565 section_iterator RelocatedSection = i->getRelocatedSection();
566 if (RelocatedSection == Obj->end_sections())
557567 continue;
558 *Section = data;
559 if (name == "debug_ranges") {
560 // FIXME: Use the other dwo range section when we emit it.
561 RangeDWOSection = data;
562 }
568
569 StringRef RelSecName;
570 RelocatedSection->getName(RelSecName);
571 RelSecName = RelSecName.substr(
572 RelSecName.find_first_not_of("._")); // Skip . and _ prefixes.
563573
564574 // TODO: Add support for relocations in other sections as needed.
565575 // Record relocations for the debug_info and debug_line sections.
566 RelocAddrMap *Map = StringSwitch(name)
576 RelocAddrMap *Map = StringSwitch(RelSecName)
567577 .Case("debug_info", &InfoRelocMap)
568578 .Case("debug_info.dwo", &InfoDWORelocMap)
569579 .Case("debug_line", &LineRelocMap)
573583
574584 if (i->begin_relocations() != i->end_relocations()) {
575585 uint64_t SectionSize;
576 i->getSize(SectionSize);
586 RelocatedSection->getSize(SectionSize);
577587 for (object::relocation_iterator reloc_i = i->begin_relocations(),
578588 reloc_e = i->end_relocations();
579589 reloc_i != reloc_e; reloc_i.increment(ec)) {
1818 #include "RuntimeDyldMachO.h"
1919 #include "llvm/Support/MathExtras.h"
2020 #include "llvm/Support/Path.h"
21 #include "llvm/Object/ELF.h"
2122
2223 using namespace llvm;
2324 using namespace llvm::object;
145146 bool isFirstRelocation = true;
146147 unsigned SectionID = 0;
147148 StubMap Stubs;
149 section_iterator RelocatedSection = si->getRelocatedSection();
148150
149151 for (relocation_iterator i = si->begin_relocations(),
150152 e = si->end_relocations(); i != e; i.increment(err)) {
152154
153155 // If it's the first relocation in this section, find its SectionID
154156 if (isFirstRelocation) {
155 SectionID = findOrEmitSection(*obj, *si, true, LocalSections);
157 SectionID =
158 findOrEmitSection(*obj, *RelocatedSection, true, LocalSections);
156159 DEBUG(dbgs() << "\tSectionID: " << SectionID << "\n");
157160 isFirstRelocation = false;
158161 }
213216 unsigned StubBufSize = 0,
214217 StubSize = getMaxStubSize();
215218 error_code err;
219 const ObjectFile *ObjFile = Obj.getObjectFile();
220 // FIXME: this is an inefficient way to handle this. We should computed the
221 // necessary section allocation size in loadObject by walking all the sections
222 // once.
216223 if (StubSize > 0) {
217 for (relocation_iterator i = Section.begin_relocations(),
218 e = Section.end_relocations(); i != e; i.increment(err), Check(err))
219 StubBufSize += StubSize;
220 }
224 for (section_iterator SI = ObjFile->begin_sections(),
225 SE = ObjFile->end_sections();
226 SI != SE; SI.increment(err), Check(err)) {
227 section_iterator RelSecI = SI->getRelocatedSection();
228 if (!(RelSecI == Section))
229 continue;
230
231 for (relocation_iterator I = SI->begin_relocations(),
232 E = SI->end_relocations(); I != E; I.increment(err), Check(err)) {
233 StubBufSize += StubSize;
234 }
235 }
236 }
237
221238 StringRef data;
222239 uint64_t Alignment64;
223240 Check(Section.getContents(data));
7070 SI != SE;
7171 SI.increment(ec)) {
7272 if (ec) break;
73 uint64_t StartAddr; SI->getAddress(StartAddr);
74 uint64_t Size; SI->getSize(Size);
75 StringRef SecName; SI->getName(SecName);
76 bool RequiredForExec; SI->isRequiredForExecution(RequiredForExec);
73
74 section_iterator RelSecI = SI->getRelocatedSection();
75 if (RelSecI == Obj->end_sections())
76 continue;
77
78 uint64_t StartAddr; RelSecI->getAddress(StartAddr);
79 uint64_t Size; RelSecI->getSize(Size);
80 bool RequiredForExec; RelSecI->isRequiredForExecution(RequiredForExec);
7781 if (RequiredForExec == false || Size == 0)
7882 continue;
7983 AddrToSection.insert(StartAddr, StartAddr + Size - 1,
3030 uint32_t &Result) const {
3131 Result = 0;
3232 return object_error::success;
33 }
34
35 section_iterator ObjectFile::getRelocatedSection(DataRefImpl Sec) const {
36 return section_iterator(SectionRef(Sec, this));
3337 }
3438
3539 ObjectFile *ObjectFile::createObjectFile(MemoryBuffer *Object) {
1919 ; object file's .text section gets relocated in memory.
2020
2121 ; CHECK: Relocations [
22 ; CHECK-NEXT: Section (1) .text {
22 ; CHECK-NEXT: Section (2) .rela.text {
2323 ; CHECK-NEXT: 0x10 R_AARCH64_ADR_PREL_PG_HI21 testfn 0x0
2424 ; CHECK-NEXT: 0x14 R_AARCH64_ADD_ABS_LO12_NC testfn 0x0
2525 ; CHECK-NEXT: }
22
33 @var = global i32 0
44
5 ; CHECK-ELF: RELOCATION RECORDS FOR [.text]
5 ; CHECK-ELF: RELOCATION RECORDS FOR [.rela.text]
66
77 define i32 @get_globalvar() {
88 ; CHECK: get_globalvar:
1010 }
1111
1212 ; CHECK: Relocations [
13 ; CHECK: Section (1) .text {
13 ; CHECK: Section (2) .rela.text {
1414 ; CHECK: 0x{{[0-9,A-F]+}} R_AARCH64_CALL26 memcpy
1515 ; CHECK: }
1616 ; CHECK: ]
5353 ; First make sure we get a page/lo12 pair in .text to pick up the jump-table
5454
5555 ; CHECK-ELF: Relocations [
56 ; CHECK-ELF: Section ({{[0-9]+}}) .text {
56 ; CHECK-ELF: Section ({{[0-9]+}}) .rela.text {
5757 ; CHECK-ELF-NEXT: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 .rodata
5858 ; CHECK-ELF-NEXT: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC .rodata
5959 ; CHECK-ELF: }
6060
6161 ; Also check the targets in .rodata are relocated
62 ; CHECK-ELF: Section ({{[0-9]+}}) .rodata {
62 ; CHECK-ELF: Section ({{[0-9]+}}) .rela.rodata {
6363 ; CHECK-ELF-NEXT: 0x{{[0-9,A-F]+}} R_AARCH64_ABS64 .text
6464 ; CHECK-ELF: }
6565 ; CHECK-ELF: ]
1010 ret i32 %0
1111 ; OBJ: Section {
1212 ; OBJ: Name: .text
13 ; OBJ: SectionData (
14 ; OBJ-NEXT: 0000: 00482DE9 000000E3 000040E3 FEFFFFEB
15 ; OBJ-NEXT: 0010: 0088BDE8
16 ; OBJ-NEXT: )
1317 ; OBJ: Relocations [
1418 ; OBJ-NEXT: 0x4 R_ARM_MOVW_ABS_NC a
1519 ; OBJ-NEXT: 0x8 R_ARM_MOVT_ABS
1620 ; OBJ-NEXT: 0xC R_ARM_CALL foo
1721 ; OBJ-NEXT: ]
18 ; OBJ-NEXT: SectionData (
19 ; OBJ-NEXT: 0000: 00482DE9 000000E3 000040E3 FEFFFFEB
20 ; OBJ-NEXT: 0010: 0088BDE8
21 ; OBJ-NEXT: )
2222
2323 }
2424
4343 ; CHECK-FP-ELIM-NEXT: 0000 00000000 b0808480
4444 ; CHECK-FP-ELIM-NOT: section .ARM.extab
4545
46 ; CHECK-RELOC: RELOCATION RECORDS FOR [.ARM.exidx]
46 ; CHECK-RELOC: RELOCATION RECORDS FOR [.rel.ARM.exidx]
4747 ; CHECK-RELOC-NEXT: 0 R_ARM_PREL31 .text
4848 ; CHECK-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr0
5252 ; CHECK-FP-ELIM-NEXT: 0000 00000000 b0838480
5353 ; CHECK-FP-ELIM-NOT: section .ARM.extab
5454
55 ; CHECK-RELOC: RELOCATION RECORDS FOR [.ARM.exidx]
55 ; CHECK-RELOC: RELOCATION RECORDS FOR [.rel.ARM.exidx]
5656 ; CHECK-RELOC-NEXT: 0 R_ARM_PREL31 .text
5757 ; CHECK-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr1
5858
59 ; CHECK-FP-ELIM-RELOC: RELOCATION RECORDS FOR [.ARM.exidx]
59 ; CHECK-FP-ELIM-RELOC: RELOCATION RECORDS FOR [.rel.ARM.exidx]
6060 ; CHECK-FP-ELIM-RELOC-NEXT: 0 R_ARM_PREL31 .text
6161 ; CHECK-FP-ELIM-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr0
1919 ; accessing function-scoped variable si.
2020 ;
2121 ; CHECK: Relocations [
22 ; CHECK: Section (1) .text {
22 ; CHECK: Section (2) .rela.text {
2323 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]]
2424 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]]
2525 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]]
2121 ; accessing external variable ei.
2222 ;
2323 ; MEDIUM: Relocations [
24 ; MEDIUM: Section (1) .text {
24 ; MEDIUM: Section (2) .rela.text {
2525 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]]
2626 ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
2727 ;
2828 ; LARGE: Relocations [
29 ; LARGE: Section (1) .text {
29 ; LARGE: Section (2) .rela.text {
3030 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]]
3131 ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]]
3232
2121 ; for the call to __tls_get_addr.
2222 ;
2323 ; CHECK: Relocations [
24 ; CHECK: Section (1) .text {
24 ; CHECK: Section (2) .rela.text {
2525 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_HA a
2626 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_LO a
2727 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLSGD a
2020 ; accessing external variable a.
2121 ;
2222 ; CHECK: Relocations [
23 ; CHECK: Section (1) .text {
23 ; CHECK: Section (2) .rela.text {
2424 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_HA a
2525 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_LO_DS a
2626 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLS a
2222 ; __tls_get_addr.
2323 ;
2424 ; CHECK: Relocations [
25 ; CHECK: Section (1) .text {
25 ; CHECK: Section (2) .rela.text {
2626 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_HA a
2727 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_LO a
2828 ; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLSLD a
3939 ; OBJ: }
4040
4141 ; OBJ: Relocations [
42 ; OBJ: Section (1) .text {
42 ; OBJ: Section (2) .rela.text {
4343 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var8
4444 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST8_ABS_LO12_NC var8
4545 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var16
33 add x2, x3, #:lo12:some_label
44
55 // OBJ: Relocations [
6 // OBJ-NEXT: Section (1) .text {
6 // OBJ-NEXT: Section (2) .rela.text {
77 // OBJ-NEXT: 0x0 R_AARCH64_ADD_ABS_LO12_NC some_label 0x0
88 // OBJ-NEXT: }
99 // OBJ-NEXT: ]
33 b.eq somewhere
44
55 // OBJ: Relocations [
6 // OBJ-NEXT: Section (1) .text {
6 // OBJ-NEXT: Section (2) .rela.text {
77 // OBJ-NEXT: 0x0 R_AARCH64_CONDBR19 somewhere 0x0
88 // OBJ-NEXT: }
99 // OBJ-NEXT: ]
66 prfm pldl3keep, some_label
77
88 // OBJ: Relocations [
9 // OBJ-NEXT: Section (1) .text {
9 // OBJ-NEXT: Section (2) .rela.text {
1010 // OBJ-NEXT: 0x0 R_AARCH64_LD_PREL_LO19 some_label 0x0
1111 // OBJ-NEXT: 0x4 R_AARCH64_LD_PREL_LO19 some_label 0x0
1212 // OBJ-NEXT: 0x8 R_AARCH64_LD_PREL_LO19 some_label 0x0
77 str q0, [sp, #:lo12:some_label]
88
99 // OBJ: Relocations [
10 // OBJ-NEXT: Section (1) .text {
10 // OBJ-NEXT: Section (2) .rela.text {
1111 // OBJ-NEXT: 0x0 R_AARCH64_LDST8_ABS_LO12_NC some_label 0x0
1212 // OBJ-NEXT: 0x4 R_AARCH64_LDST16_ABS_LO12_NC some_label 0x0
1313 // OBJ-NEXT: 0x8 R_AARCH64_LDST32_ABS_LO12_NC some_label 0x0
2222 movn x19, #:abs_g2_s:some_label
2323
2424 // OBJ: Relocations [
25 // OBJ-NEXT: Section (1) .text {
25 // OBJ-NEXT: Section (2) .rela.text {
2626 // OBJ-NEXT: 0x0 R_AARCH64_MOVW_UABS_G0 some_label 0x0
2727 // OBJ-NEXT: 0x4 R_AARCH64_MOVW_UABS_G0_NC some_label 0x0
2828 // OBJ-NEXT: 0x8 R_AARCH64_MOVW_UABS_G1 some_label 0x0
77 ldr x0, [x5, #:got_lo12:some_label]
88
99 // OBJ: Relocations [
10 // OBJ-NEXT: Section (1) .text {
10 // OBJ-NEXT: Section (2) .rela.text {
1111 // OBJ-NEXT: 0x0 R_AARCH64_ADR_PREL_LO21 some_label 0x0
1212 // OBJ-NEXT: 0x4 R_AARCH64_ADR_PREL_PG_HI21 some_label 0x0
1313 // OBJ-NEXT: 0x8 R_AARCH64_ADR_GOT_PAGE some_label 0x0
44 tbnz w3, #15, somewhere
55
66 // OBJ: Relocations [
7 // OBJ-NEXT: Section (1) .text {
7 // OBJ-NEXT: Section (2) .rela.text {
88 // OBJ-NEXT: 0x0 R_AARCH64_TSTBR14 somewhere 0x0
99 // OBJ-NEXT: 0x4 R_AARCH64_TSTBR14 somewhere 0x0
1010 // OBJ-NEXT: }
44 bl somewhere
55
66 // OBJ: Relocations [
7 // OBJ-NEXT: Section (1) .text {
7 // OBJ-NEXT: Section (2) .rela.text {
88 // OBJ-NEXT: 0x0 R_AARCH64_JUMP26 somewhere 0x0
99 // OBJ-NEXT: 0x4 R_AARCH64_CALL26 somewhere 0x0
1010 // OBJ-NEXT: }
1616 // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_a64_movw_dtprel_g2
1717
1818 // CHECK-ELF: Relocations [
19 // CHECK-ELF-NEXT: Section (1) .text {
19 // CHECK-ELF-NEXT: Section (2) .rela.text {
2020 // CHECK-ELF-NEXT: 0x0 R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM:[^ ]+]]
2121 // CHECK-ELF-NEXT: 0x4 R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]]
2222 // CHECK-ELF-NEXT: 0x8 R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]]
4949 @ CHECK: Section {
5050 @ CHECK: Name: .ARM.exidx.TEST1
5151 @-------------------------------------------------------------------------------
52 @ 0x80 = Compact model 0, personality routine: __aeabi_unwind_cpp_pr0
53 @ 0x9B = $sp can be found in $r11
54 @ 0x8480 = pop {r11, r14}
55 @-------------------------------------------------------------------------------
56 @ CHECK: SectionData (
57 @ CHECK: 0000: 00000000 80849B80 |........|
58 @ CHECK: )
59 @ CHECK: }
60 @-------------------------------------------------------------------------------
5261 @ The first word should be relocated to .TEST1 section. Besides, there is
5362 @ another relocation entry for __aeabi_unwind_cpp_pr0, so that the linker
5463 @ will keep __aeabi_unwind_cpp_pr0.
5766 @ CHECK: 0x0 R_ARM_PREL31 .TEST1 0x0
5867 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
5968 @ CHECK: ]
60 @-------------------------------------------------------------------------------
61 @ 0x80 = Compact model 0, personality routine: __aeabi_unwind_cpp_pr0
62 @ 0x9B = $sp can be found in $r11
63 @ 0x8480 = pop {r11, r14}
64 @-------------------------------------------------------------------------------
65 @ CHECK: SectionData (
66 @ CHECK: 0000: 00000000 80849B80 |........|
67 @ CHECK: )
68 @ CHECK: }
6969
7070
7171 @-------------------------------------------------------------------------------
8383 @ CHECK: Section {
8484 @ CHECK: Name: .ARM.exidx.TEST2
8585 @-------------------------------------------------------------------------------
86 @ The first word should be relocated to .TEST2 section. Besides, there is
87 @ another relocation entry for __aeabi_unwind_cpp_pr0, so that the linker
88 @ will keep __aeabi_unwind_cpp_pr0.
89 @-------------------------------------------------------------------------------
90 @ CHECK: Relocations [
91 @ CHECK: 0x0 R_ARM_PREL31 .TEST2 0x0
92 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
93 @ CHECK: ]
94 @-------------------------------------------------------------------------------
9586 @ 0x80 = Compact model 0, personality routine: __aeabi_unwind_cpp_pr0
9687 @ 0x8480 = pop {r11, r14}
9788 @ 0xB0 = finish
10192 @ CHECK: )
10293 @ CHECK: }
10394 @ CHECK: ]
95 @-------------------------------------------------------------------------------
96 @ The first word should be relocated to .TEST2 section. Besides, there is
97 @ another relocation entry for __aeabi_unwind_cpp_pr0, so that the linker
98 @ will keep __aeabi_unwind_cpp_pr0.
99 @-------------------------------------------------------------------------------
100 @ CHECK: Relocations [
101 @ CHECK: 0x0 R_ARM_PREL31 .TEST2 0x0
102 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
103 @ CHECK: ]
5555 @-------------------------------------------------------------------------------
5656 @ CHECK: Section {
5757 @ CHECK: Name: .ARM.exidx.TEST1
58 @ CHECK: SectionData (
59 @ CHECK: 0000: 00000000 00000000 |........|
60 @ CHECK: )
61 @ CHECK: }
62 @ CHECK: ]
5863 @-------------------------------------------------------------------------------
5964 @ The first word should be relocated to .TEST1 section, and the second word
6065 @ should be relocated to .ARM.extab.TEST1 section. Besides, there is
6671 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0
6772 @ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0
6873 @ CHECK: ]
69 @ CHECK: SectionData (
70 @ CHECK: 0000: 00000000 00000000 |........|
71 @ CHECK: )
72 @ CHECK: }
73 @ CHECK: ]
3636 @-------------------------------------------------------------------------------
3737 @ CHECK: Section {
3838 @ CHECK: Name: .ARM.exidx
39 @ CHECK: Relocations [
40 @ CHECK: 0x0 R_ARM_PREL31 .text 0x0
41 @ CHECK: ]
4239 @-------------------------------------------------------------------------------
4340 @ The first word should be the offset to .text.
4441 @ The second word should be EXIDX_CANTUNWIND (01000000).
4845 @ CHECK: )
4946 @ CHECK: }
5047 @ CHECK: ]
48 @ CHECK: Relocations [
49 @ CHECK: 0x0 R_ARM_PREL31 .text 0x0
50 @ CHECK: ]
3434
3535 @ CHECK:Section {
3636 @ CHECK: Name: .ARM.exidx.TEST1
37 @ CHECK: SectionData (
38 @ CHECK: 0000: 00000000 00000000 |........|
39 @ CHECK: )
40 @ CHECK:}
3741 @-------------------------------------------------------------------------------
3842 @ We should see a relocation entry to __aeabi_unwind_cpp_pr0, so that the
3943 @ linker can keep __aeabi_unwind_cpp_pr0.
4347 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
4448 @ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0
4549 @ CHECK: ]
46 @ CHECK: SectionData (
47 @ CHECK: 0000: 00000000 00000000 |........|
48 @ CHECK: )
49 @ CHECK:}
50
5150
5251
5352
9291
9392 @ CHECK:Section {
9493 @ CHECK: Name: .ARM.exidx.TEST2
94 @ CHECK: SectionData (
95 @ CHECK: 0000: 00000000 00000000 |........|
96 @ CHECK: )
97 @ CHECK:}
9598 @-------------------------------------------------------------------------------
9699 @ We should see a relocation entry to __aeabi_unwind_cpp_pr0, so that the
97100 @ linker can keep __aeabi_unwind_cpp_pr0.
101104 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0
102105 @ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.TEST2 0x0
103106 @ CHECK: ]
104 @ CHECK: SectionData (
105 @ CHECK: 0000: 00000000 00000000 |........|
106 @ CHECK: )
107 @ CHECK:}
2727 @ CHECK: }
2828 @ CHECK: Section {
2929 @ CHECK: Name: .ARM.extab.TEST1
30 @ CHECK: Relocations [
31 @ CHECK: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0
32 @ CHECK: ]
3330 @ CHECK: SectionData (
3431 @ CHECK: 0000: 00000000 B0B0B000 |........|
3532 @ CHECK: )
3633 @ CHECK: }
34 @ CHECK: Relocations [
35 @ CHECK: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0
36 @ CHECK: ]
3737 @ CHECK: Section {
3838 @ CHECK: Name: .ARM.exidx.TEST1
39 @ CHECK: SectionData (
40 @ CHECK: 0000: 00000000 00000000 |........|
41 @ CHECK: )
42 @ CHECK: }
3943 @ CHECK: Relocations [
4044 @ CHECK: 0x0 R_ARM_PREL31 .TEST1 0x0
4145 @ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0
4246 @ CHECK: ]
43 @ CHECK: SectionData (
44 @ CHECK: 0000: 00000000 00000000 |........|
45 @ CHECK: )
46 @ CHECK: }
47
4847
4948
5049 @-------------------------------------------------------------------------------
7069 @ CHECK: }
7170 @ CHECK: Section {
7271 @ CHECK: Name: .ARM.extab.TEST2
73 @ CHECK: Relocations [
74 @ CHECK: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0
75 @ CHECK: ]
7672 @ CHECK: SectionData (
7773 @ CHECK: 0000: 00000000 B0B0B000 |........|
7874 @ CHECK: )
7975 @ CHECK: }
76 @ CHECK: Relocations [
77 @ CHECK: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0
78 @ CHECK: ]
8079 @ CHECK: Section {
8180 @ CHECK: Name: .ARM.exidx.TEST2
81 @ CHECK: SectionData (
82 @ CHECK: 0000: 00000000 00000000 |........|
83 @ CHECK: )
84 @ CHECK: }
8285 @ CHECK: Relocations [
8386 @ CHECK: 0x0 R_ARM_PREL31 .TEST2 0x0
8487 @ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.TEST2 0x0
8588 @ CHECK: ]
86 @ CHECK: SectionData (
87 @ CHECK: 0000: 00000000 00000000 |........|
88 @ CHECK: )
89 @ CHECK: }
6464 @-------------------------------------------------------------------------------
6565 @ CHECK: Section {
6666 @ CHECK: Name: .ARM.extab.TEST1
67 @ CHECK: SectionData (
68 @ CHECK: 0000: 00000000 B0B0B000 00000000 B0B0B000 |................|
69 @ CHECK: )
70 @ CHECK: }
6771 @ CHECK: Relocations [
6872 @ CHECK: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0
6973 @ CHECK: 0x8 R_ARM_PREL31 __gxx_personality_v0 0x0
7074 @ CHECK: ]
71 @ CHECK: SectionData (
72 @ CHECK: 0000: 00000000 B0B0B000 00000000 B0B0B000 |................|
73 @ CHECK: )
74 @ CHECK: }
7575
7676
7777 @-------------------------------------------------------------------------------
8080 @ CHECK: Section {
8181 @ CHECK: Name: .ARM.exidx.TEST1
8282 @ CHECK: Link: 4
83 @-------------------------------------------------------------------------------
84 @ The first word should be the offset to .TEST1.
85 @ The second word should be the offset to .ARM.extab.TEST1
86 @-------------------------------------------------------------------------------
87 @ CHECK: SectionData (
88 @ CHECK: 0000: 00000000 00000000 04000000 08000000 |................|
89 @ CHECK: )
90 @ CHECK: }
91 @ CHECK: ]
8392 @-------------------------------------------------------------------------------
8493 @ The first word of each entry should be relocated to .TEST1 section.
8594 @ The second word of each entry should be relocated to
91100 @ CHECK: 0x8 R_ARM_PREL31 .TEST1 0x0
92101 @ CHECK: 0xC R_ARM_PREL31 .ARM.extab.TEST1 0x0
93102 @ CHECK: ]
94 @-------------------------------------------------------------------------------
95 @ The first word should be the offset to .TEST1.
96 @ The second word should be the offset to .ARM.extab.TEST1
97 @-------------------------------------------------------------------------------
98 @ CHECK: SectionData (
99 @ CHECK: 0000: 00000000 00000000 04000000 08000000 |................|
100 @ CHECK: )
101 @ CHECK: }
102 @ CHECK: ]
103
104103
105104
106105 @-------------------------------------------------------------------------------
5959 @-------------------------------------------------------------------------------
6060 @ CHECK: Section {
6161 @ CHECK: Name: .ARM.extab.TEST1
62 @ CHECK: Relocations [
63 @ CHECK: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0
64 @ CHECK: ]
6562 @ CHECK: SectionData (
6663 @ CHECK: 0000: 00000000 B0B0B000 |........|
6764 @ CHECK: )
6865 @ CHECK: }
66 @ CHECK: Relocations [
67 @ CHECK: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0
68 @ CHECK: ]
6969
7070
7171 @-------------------------------------------------------------------------------
8484 @ The second word should be relocated to the EHTAB entry in .ARM.extab.TEST1
8585 @ section.
8686 @-------------------------------------------------------------------------------
87 @ CHECK: SectionData (
88 @ CHECK: 0000: 00000000 00000000 |........|
89 @ CHECK: )
90 @ CHECK: }
8791 @ CHECK: Relocations [
8892 @ CHECK: 0x0 R_ARM_PREL31 .TEST1 0x0
8993 @ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0
9094 @ CHECK: ]
91 @ CHECK: SectionData (
92 @ CHECK: 0000: 00000000 00000000 |........|
93 @ CHECK: )
94 @ CHECK: }
95
9695
9796
9897 @-------------------------------------------------------------------------------
111110 @-------------------------------------------------------------------------------
112111 @ CHECK: Section {
113112 @ CHECK: Name: .ARM.extabTEST2
114 @ CHECK: Relocations [
115 @ CHECK: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0
116 @ CHECK: ]
117113 @ CHECK: SectionData (
118114 @ CHECK: 0000: 00000000 B0B0B000 |........|
119115 @ CHECK: )
120116 @ CHECK: }
117 @ CHECK: Relocations [
118 @ CHECK: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0
119 @ CHECK: ]
121120
122121
123122 @-------------------------------------------------------------------------------
136135 @ The second word should be relocated to the EHTAB entry in .ARM.extabTEST2
137136 @ section.
138137 @-------------------------------------------------------------------------------
139 @ CHECK: Relocations [
140 @ CHECK: 0x0 R_ARM_PREL31 TEST2 0x0
141 @ CHECK: 0x4 R_ARM_PREL31 .ARM.extabTEST2 0x0
142 @ CHECK: ]
143138 @ CHECK: SectionData (
144139 @ CHECK: 0000: 00000000 00000000 |........|
145140 @ CHECK: )
146141 @ CHECK: }
147142 @ CHECK: ]
143 @ CHECK: Relocations [
144 @ CHECK: 0x0 R_ARM_PREL31 TEST2 0x0
145 @ CHECK: 0x4 R_ARM_PREL31 .ARM.extabTEST2 0x0
146 @ CHECK: ]
148147
149148
150149
4444 @-------------------------------------------------------------------------------
4545 @ CHECK: Section {
4646 @ CHECK: Name: .ARM.exidx
47 @-------------------------------------------------------------------------------
48 @ The first word of each entry should be relocated to .text section.
49 @-------------------------------------------------------------------------------
50 @ CHECK: Relocations [
51 @ CHECK: 0x0 R_ARM_PREL31 .text 0x0
52 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
53 @ CHECK: 0x8 R_ARM_PREL31 .text 0x0
54 @ CHECK: ]
5547 @ CHECK: SectionData (
5648 @-------------------------------------------------------------------------------
5749 @ The first word should be the offset to .text. The second word should be
6355 @ CHECK: }
6456 @ CHECK: ]
6557
58 @-------------------------------------------------------------------------------
59 @ The first word of each entry should be relocated to .text section.
60 @-------------------------------------------------------------------------------
61 @ CHECK: Relocations [
62 @ CHECK: 0x0 R_ARM_PREL31 .text 0x0
63 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
64 @ CHECK: 0x8 R_ARM_PREL31 .text 0x0
65 @ CHECK: ]
6666
6767
6868 @-------------------------------------------------------------------------------
6060 @ CHECK: Link: 1
6161
6262 @-------------------------------------------------------------------------------
63 @ The first word should be relocated to the code address in .text section.
64 @ Besides, since this function is using compact model 0, thus we have to
65 @ add an relocation to __aeabi_unwind_cpp_pr0.
66 @-------------------------------------------------------------------------------
67 @ CHECK: Relocations [
68 @ CHECK: 0x0 R_ARM_PREL31 .text 0x0
69 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
70 @ CHECK: ]
71
72 @-------------------------------------------------------------------------------
7363 @ The first word should be the offset to .text. The second word should be
7464 @ 0xB0B0B080, which means compact model 0 is used (0x80) and the rest of the
7565 @ word is filled with FINISH opcode (0xB0).
7969 @ CHECK: )
8070 @ CHECK: }
8171 @ CHECK: ]
72
73 @-------------------------------------------------------------------------------
74 @ The first word should be relocated to the code address in .text section.
75 @ Besides, since this function is using compact model 0, thus we have to
76 @ add an relocation to __aeabi_unwind_cpp_pr0.
77 @-------------------------------------------------------------------------------
78 @ CHECK: Relocations [
79 @ CHECK: 0x0 R_ARM_PREL31 .text 0x0
80 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
81 @ CHECK: ]
2929 @ OBJ-NEXT: AddressAlignment: 4
3030 @ OBJ-NEXT: EntrySize: 0
3131 @ OBJ-NEXT: Relocations [
32 @ OBJ-NEXT: 0x0 R_ARM_MOVW_PREL_NC
33 @ OBJ-NEXT: 0x4 R_ARM_MOVT_PREL
3432 @ OBJ-NEXT: ]
3533 @ OBJ-NEXT: SectionData (
3634 @ OBJ-NEXT: 0000: F00F0FE3 F40F4FE3
3735 @ OBJ-NEXT: )
36 @ OBJ-NEXT: }
37 @ OBJ-NEXT: Section {
38 @ OBJ-NEXT: Index: 2
39 @ OBJ-NEXT: Name: .rel.text (1)
40 @ OBJ-NEXT: Type: SHT_REL (0x9)
41 @ OBJ-NEXT: Flags [ (0x0)
42 @ OBJ-NEXT: ]
43 @ OBJ-NEXT: Address: 0x0
44 @ OBJ-NEXT: Offset: 0x22C
45 @ OBJ-NEXT: Size: 16
46 @ OBJ-NEXT: Link: 6
47 @ OBJ-NEXT: Info: 1
48 @ OBJ-NEXT: AddressAlignment: 4
49 @ OBJ-NEXT: EntrySize: 8
50 @ OBJ-NEXT: Relocations [
51 @ OBJ-NEXT: 0x0 R_ARM_MOVW_PREL_NC
52 @ OBJ-NEXT: 0x4 R_ARM_MOVT_PREL
53 @ OBJ-NEXT: ]
54 @ OBJ-NEXT: SectionData (
55 @ OBJ-NEXT: 0000: 00000000 2D060000 04000000 2E060000 |....-...........|
56 @ OBJ-NEXT: )
57 @ OBJ-NEXT: }
6060 declare void @exit(i32) noreturn nounwind
6161
6262 ; OBJ: Relocations [
63 ; OBJ: Section (1) .text {
63 ; OBJ: Section (2) .rel.text {
6464 ; OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC _MergedGlobals
6565 ; OBJ: }
6666 ; OBJ: ]
4141 declare void @exit(i32) noreturn nounwind
4242
4343 ;; OBJ: Relocations [
44 ;; OBJ: Section (1) .text {
44 ;; OBJ: Section (2) .rel.text {
4545 ;; OBJ-NEXT: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC .L.str
4646 ;; OBJ: }
4747 ;; OBJ: ]
8888 declare void @exit(i32) noreturn nounwind
8989
9090 ;; OBJ: Relocations [
91 ;; OBJ: Section (1) .text {
91 ;; OBJ: Section (2) .rel.text {
9292 ;; OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC vtable
9393 ;; OBJ: }
9494 ;; OBJ: ]
77 b some_label
88
99 // OBJ: Relocations [
10 // OBJ-NEXT: Section (1) .text {
10 // OBJ-NEXT: Section (2) .rel.text {
1111 // OBJ-NEXT: 0x0 R_ARM_JUMP24 some_label 0x0
1212 // OBJ-NEXT: 0x4 R_ARM_CALL some_label 0x0
1313 // OBJ-NEXT: 0x8 R_ARM_CALL some_label 0x0
2828 ; CHECK: ]
2929
3030 ; CHECK: Relocations [
31 ; CHECK-NEXT: Section (1) .text {
31 ; CHECK-NEXT: Section (2) .rel.text {
3232 ; CHECK-NEXT: 0x8 R_ARM_THM_CALL foo 0x0
3333 ; CHECK-NEXT: }
3434 ; CHECK-NEXT: ]
1717
1818 @@ make sure an R_ARM_THM_CALL relocation is generated for the call to g
1919 @CHECK: Relocations [
20 @CHECK-NEXT: Section (1) .text {
20 @CHECK-NEXT: Section (2) .rel.text {
2121 @CHECK-NEXT: 0x4 R_ARM_THM_CALL g 0x0
2222 @CHECK-NEXT: }
2323 @CHECK-NEXT: ]
1717 .quad bar2
1818
1919 // CHECK: Relocations [
20 // CHECK-NEXT: Section ({{[0-9]+}}) zed {
20 // CHECK-NEXT: Section ({{[0-9]+}}) .relazed {
2121 // CHECK-NEXT: 0x1 R_X86_64_PLT32 bar 0xFFFFFFFFFFFFFFFC
2222 // CHECK-NEXT: 0x5 R_X86_64_64 bar2 0x0
2323 // CHECK-NEXT: }
4444 // CHECK: Name: .rel.text
4545
4646 // CHECK: Relocations [
47 // CHECK: Section (1) .text {
47 // CHECK: Section (2) .rel.text {
4848 // CHECK: 0x6 R_386_32 .rodata.str1.1
4949 // CHECK: 0xB R_386_PC32 puts
5050 // CHECK: 0x12 R_386_32 .rodata.str1.1
4444 // CHECK: Name: .rela.text
4545
4646 // CHECK: Relocations [
47 // CHECK: Section (1) .text {
47 // CHECK: Section (2) .rela.text {
4848 // CHECK: 0x5 R_X86_64_32 .rodata.str1.1 0x0
4949 // CHECK: 0xA R_X86_64_PC32 puts 0xFFFFFFFFFFFFFFFC
5050 // CHECK: 0xF R_X86_64_32 .rodata.str1.1 0x6
2525 // CHECK-NEXT: AddressAlignment: 8
2626 // CHECK-NEXT: EntrySize: 0
2727 // CHECK-NEXT: Relocations [
28 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2928 // CHECK-NEXT: ]
3029 // CHECK-NEXT: SectionData (
3130 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4847 // CHECK-NEXT: AddressAlignment: 8
4948 // CHECK-NEXT: EntrySize: 24
5049 // CHECK-NEXT: Relocations [
50 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
5151 // CHECK-NEXT: ]
5252 // CHECK: }
2323 // CHECK-NEXT: AddressAlignment: 8
2424 // CHECK-NEXT: EntrySize: 0
2525 // CHECK-NEXT: Relocations [
26 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2726 // CHECK-NEXT: ]
2827 // CHECK-NEXT: SectionData (
2928 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4544 // CHECK-NEXT: AddressAlignment: 8
4645 // CHECK-NEXT: EntrySize: 24
4746 // CHECK-NEXT: Relocations [
47 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4848 // CHECK-NEXT: ]
4949 // CHECK: }
2424 // CHECK-NEXT: AddressAlignment: 8
2525 // CHECK-NEXT: EntrySize: 0
2626 // CHECK-NEXT: Relocations [
27 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2827 // CHECK-NEXT: ]
2928 // CHECK-NEXT: SectionData (
3029 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4746 // CHECK-NEXT: AddressAlignment: 8
4847 // CHECK-NEXT: EntrySize: 24
4948 // CHECK-NEXT: Relocations [
49 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
5050 // CHECK-NEXT: ]
5151 // CHECK: }
2020 // CHECK-NEXT: AddressAlignment: 8
2121 // CHECK-NEXT: EntrySize: 0
2222 // CHECK-NEXT: Relocations [
23 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2423 // CHECK-NEXT: ]
2524 // CHECK-NEXT: SectionData (
2625 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4241 // CHECK-NEXT: AddressAlignment: 8
4342 // CHECK-NEXT: EntrySize: 24
4443 // CHECK-NEXT: Relocations [
44 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4545 // CHECK-NEXT: ]
4646 // CHECK: }
2020 // CHECK-NEXT: AddressAlignment: 8
2121 // CHECK-NEXT: EntrySize: 0
2222 // CHECK-NEXT: Relocations [
23 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2423 // CHECK-NEXT: ]
2524 // CHECK-NEXT: SectionData (
2625 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4241 // CHECK-NEXT: AddressAlignment: 8
4342 // CHECK-NEXT: EntrySize: 24
4443 // CHECK-NEXT: Relocations [
44 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4545 // CHECK-NEXT: ]
4646 // CHECK: }
2121 // CHECK-NEXT: AddressAlignment: 8
2222 // CHECK-NEXT: EntrySize: 0
2323 // CHECK-NEXT: Relocations [
24 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2524 // CHECK-NEXT: ]
2625 // CHECK-NEXT: SectionData (
2726 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4342 // CHECK-NEXT: AddressAlignment: 8
4443 // CHECK-NEXT: EntrySize: 24
4544 // CHECK-NEXT: Relocations [
45 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4646 // CHECK-NEXT: ]
4747 // CHECK: }
2020 // CHECK-NEXT: AddressAlignment: 8
2121 // CHECK-NEXT: EntrySize: 0
2222 // CHECK-NEXT: Relocations [
23 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2423 // CHECK-NEXT: ]
2524 // CHECK-NEXT: SectionData (
2625 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4241 // CHECK-NEXT: AddressAlignment: 8
4342 // CHECK-NEXT: EntrySize: 24
4443 // CHECK-NEXT: Relocations [
44 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4545 // CHECK-NEXT: ]
4646 // CHECK: }
2121 // CHECK-NEXT: AddressAlignment: 8
2222 // CHECK-NEXT: EntrySize: 0
2323 // CHECK-NEXT: Relocations [
24 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2524 // CHECK-NEXT: ]
2625 // CHECK-NEXT: SectionData (
2726 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4342 // CHECK-NEXT: AddressAlignment: 8
4443 // CHECK-NEXT: EntrySize: 24
4544 // CHECK-NEXT: Relocations [
45 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4646 // CHECK-NEXT: ]
4747 // CHECK: }
2828 // CHECK-NEXT: AddressAlignment: 8
2929 // CHECK-NEXT: EntrySize: 0
3030 // CHECK-NEXT: Relocations [
31 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
3231 // CHECK-NEXT: ]
3332 // CHECK-NEXT: SectionData (
3433 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
5150 // CHECK-NEXT: AddressAlignment: 8
5251 // CHECK-NEXT: EntrySize: 24
5352 // CHECK-NEXT: Relocations [
53 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
5454 // CHECK-NEXT: ]
5555 // CHECK: }
2020 // CHECK-NEXT: AddressAlignment: 8
2121 // CHECK-NEXT: EntrySize: 0
2222 // CHECK-NEXT: Relocations [
23 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2423 // CHECK-NEXT: ]
2524 // CHECK-NEXT: SectionData (
2625 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4241 // CHECK-NEXT: AddressAlignment: 8
4342 // CHECK-NEXT: EntrySize: 24
4443 // CHECK-NEXT: Relocations [
44 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4545 // CHECK-NEXT: ]
4646 // CHECK: }
2323 // CHECK-NEXT: AddressAlignment: 8
2424 // CHECK-NEXT: EntrySize: 0
2525 // CHECK-NEXT: Relocations [
26 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2726 // CHECK-NEXT: ]
2827 // CHECK-NEXT: SectionData (
2928 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4544 // CHECK-NEXT: AddressAlignment: 8
4645 // CHECK-NEXT: EntrySize: 24
4746 // CHECK-NEXT: Relocations [
47 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4848 // CHECK-NEXT: ]
4949 // CHECK: }
2121 // CHECK-NEXT: AddressAlignment: 8
2222 // CHECK-NEXT: EntrySize: 0
2323 // CHECK-NEXT: Relocations [
24 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2524 // CHECK-NEXT: ]
2625 // CHECK-NEXT: SectionData (
2726 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4342 // CHECK-NEXT: AddressAlignment: 8
4443 // CHECK-NEXT: EntrySize: 24
4544 // CHECK-NEXT: Relocations [
45 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4646 // CHECK-NEXT: ]
4747 // CHECK: }
2121 // CHECK-NEXT: AddressAlignment: 8
2222 // CHECK-NEXT: EntrySize: 0
2323 // CHECK-NEXT: Relocations [
24 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2524 // CHECK-NEXT: ]
2625 // CHECK-NEXT: SectionData (
2726 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4342 // CHECK-NEXT: AddressAlignment: 8
4443 // CHECK-NEXT: EntrySize: 24
4544 // CHECK-NEXT: Relocations [
45 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4646 // CHECK-NEXT: ]
4747 // CHECK: }
2121 // CHECK-NEXT: AddressAlignment: 8
2222 // CHECK-NEXT: EntrySize: 0
2323 // CHECK-NEXT: Relocations [
24 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
2524 // CHECK-NEXT: ]
2625 // CHECK-NEXT: SectionData (
2726 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
4342 // CHECK-NEXT: AddressAlignment: 8
4443 // CHECK-NEXT: EntrySize: 24
4544 // CHECK-NEXT: Relocations [
45 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
4646 // CHECK-NEXT: ]
4747 // CHECK: }
2727 // CHECK-NEXT: AddressAlignment: 8
2828 // CHECK-NEXT: EntrySize: 0
2929 // CHECK-NEXT: Relocations [
30 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
3130 // CHECK-NEXT: ]
3231 // CHECK-NEXT: SectionData (
3332 // CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001
5049 // CHECK-NEXT: AddressAlignment: 8
5150 // CHECK-NEXT: EntrySize: 24
5251 // CHECK-NEXT: Relocations [
52 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
5353 // CHECK-NEXT: ]
226226 // CHECK-NEXT: AddressAlignment: 8
227227 // CHECK-NEXT: EntrySize: 0
228228 // CHECK-NEXT: Relocations [
229 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
230 // CHECK-NEXT: 0x29 R_X86_64_32 bar 0x0
231 // CHECK-NEXT: 0x43 R_X86_64_64 foo 0x0
232 // CHECK-NEXT: 0x5C R_X86_64_PC32 .text 0x1
233 // CHECK-NEXT: 0x65 R_X86_64_32 bar 0x0
234 // CHECK-NEXT: 0x74 R_X86_64_PC32 .text 0x2
235 // CHECK-NEXT: 0x7D R_X86_64_32 bar 0x0
236 // CHECK-NEXT: 0x97 R_X86_64_64 foo 0x0
237 // CHECK-NEXT: 0xB0 R_X86_64_PC32 .text 0x3
238 // CHECK-NEXT: 0xB9 R_X86_64_16 bar 0x0
239 // CHECK-NEXT: 0xCE R_X86_64_16 foo 0x0
240 // CHECK-NEXT: 0xE0 R_X86_64_PC32 .text 0x4
241 // CHECK-NEXT: 0xFE R_X86_64_32 foo 0x0
242 // CHECK-NEXT: 0x110 R_X86_64_PC32 .text 0x5
243 // CHECK-NEXT: 0x12E R_X86_64_64 foo 0x0
244 // CHECK-NEXT: 0x144 R_X86_64_PC32 .text 0x6
245 // CHECK-NEXT: 0x162 R_X86_64_16 foo 0x0
246 // CHECK-NEXT: 0x174 R_X86_64_PC32 .text 0x7
247 // CHECK-NEXT: 0x192 R_X86_64_32 foo 0x0
248 // CHECK-NEXT: 0x1A4 R_X86_64_PC32 .text 0x8
249 // CHECK-NEXT: 0x1C2 R_X86_64_64 foo 0x0
250 // CHECK-NEXT: 0x1D8 R_X86_64_PC32 .text 0x9
251 // CHECK-NEXT: 0x1F6 R_X86_64_64 foo 0x0
252 // CHECK-NEXT: 0x20C R_X86_64_PC32 .text 0xA
253 // CHECK-NEXT: 0x22A R_X86_64_PC64 foo 0x0
254 // CHECK-NEXT: 0x240 R_X86_64_PC32 .text 0xB
255 // CHECK-NEXT: 0x25E R_X86_64_PC16 foo 0x0
256 // CHECK-NEXT: 0x270 R_X86_64_PC32 .text 0xC
257 // CHECK-NEXT: 0x28E R_X86_64_PC32 foo 0x0
258 // CHECK-NEXT: 0x2A0 R_X86_64_PC32 .text 0xD
259 // CHECK-NEXT: 0x2BE R_X86_64_PC64 foo 0x0
260 // CHECK-NEXT: 0x2D4 R_X86_64_PC32 .text 0xE
261 // CHECK-NEXT: 0x2F2 R_X86_64_PC16 foo 0x0
262 // CHECK-NEXT: 0x304 R_X86_64_PC32 .text 0xF
263 // CHECK-NEXT: 0x322 R_X86_64_PC32 foo 0x0
264 // CHECK-NEXT: 0x334 R_X86_64_PC32 .text 0x10
265 // CHECK-NEXT: 0x352 R_X86_64_PC64 foo 0x0
266 // CHECK-NEXT: 0x368 R_X86_64_PC32 .text 0x11
267 // CHECK-NEXT: 0x386 R_X86_64_PC64 foo 0x0
268 // CHECK-NEXT: 0x39C R_X86_64_PC32 .text 0x12
269 // CHECK-NEXT: 0x3BA R_X86_64_64 foo 0x0
270 // CHECK-NEXT: 0x3D0 R_X86_64_PC32 .text 0x13
271 // CHECK-NEXT: 0x3EE R_X86_64_16 foo 0x0
272 // CHECK-NEXT: 0x400 R_X86_64_PC32 .text 0x14
273 // CHECK-NEXT: 0x41E R_X86_64_32 foo 0x0
274 // CHECK-NEXT: 0x430 R_X86_64_PC32 .text 0x15
275 // CHECK-NEXT: 0x44E R_X86_64_64 foo 0x0
276 // CHECK-NEXT: 0x464 R_X86_64_PC32 .text 0x16
277 // CHECK-NEXT: 0x482 R_X86_64_16 foo 0x0
278 // CHECK-NEXT: 0x494 R_X86_64_PC32 .text 0x17
279 // CHECK-NEXT: 0x4B2 R_X86_64_32 foo 0x0
280 // CHECK-NEXT: 0x4C4 R_X86_64_PC32 .text 0x18
281 // CHECK-NEXT: 0x4E2 R_X86_64_64 foo 0x0
282 // CHECK-NEXT: 0x4F8 R_X86_64_PC32 .text 0x19
283 // CHECK-NEXT: 0x516 R_X86_64_64 foo 0x0
284 // CHECK-NEXT: 0x52C R_X86_64_PC32 .text 0x1A
285 // CHECK-NEXT: 0x54A R_X86_64_PC64 foo 0x0
286 // CHECK-NEXT: 0x560 R_X86_64_PC32 .text 0x1B
287 // CHECK-NEXT: 0x57E R_X86_64_PC16 foo 0x0
288 // CHECK-NEXT: 0x590 R_X86_64_PC32 .text 0x1C
289 // CHECK-NEXT: 0x5AE R_X86_64_PC32 foo 0x0
290 // CHECK-NEXT: 0x5C0 R_X86_64_PC32 .text 0x1D
291 // CHECK-NEXT: 0x5DE R_X86_64_PC64 foo 0x0
292 // CHECK-NEXT: 0x5F4 R_X86_64_PC32 .text 0x1E
293 // CHECK-NEXT: 0x612 R_X86_64_PC16 foo 0x0
294 // CHECK-NEXT: 0x624 R_X86_64_PC32 .text 0x1F
295 // CHECK-NEXT: 0x642 R_X86_64_PC32 foo 0x0
296 // CHECK-NEXT: 0x654 R_X86_64_PC32 .text 0x20
297 // CHECK-NEXT: 0x672 R_X86_64_PC64 foo 0x0
298 // CHECK-NEXT: 0x688 R_X86_64_PC32 .text 0x21
299 // CHECK-NEXT: 0x6A6 R_X86_64_PC64 foo 0x0
300 // CHECK-NEXT: 0x6BC R_X86_64_PC32 .text 0x22
301229 // CHECK-NEXT: ]
302230 // CHECK-NEXT: SectionData (
303231 // CHECK-NEXT: 0000: 14000000 00000000 017A4C52 00017810
426354 // CHECK-NEXT: AddressAlignment: 8
427355 // CHECK-NEXT: EntrySize: 24
428356 // CHECK-NEXT: Relocations [
357 // CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0
358 // CHECK-NEXT: 0x29 R_X86_64_32 bar 0x0
359 // CHECK-NEXT: 0x43 R_X86_64_64 foo 0x0
360 // CHECK-NEXT: 0x5C R_X86_64_PC32 .text 0x1
361 // CHECK-NEXT: 0x65 R_X86_64_32 bar 0x0
362 // CHECK-NEXT: 0x74 R_X86_64_PC32 .text 0x2
363 // CHECK-NEXT: 0x7D R_X86_64_32 bar 0x0
364 // CHECK-NEXT: 0x97 R_X86_64_64 foo 0x0
365 // CHECK-NEXT: 0xB0 R_X86_64_PC32 .text 0x3
366 // CHECK-NEXT: 0xB9 R_X86_64_16 bar 0x0
367 // CHECK-NEXT: 0xCE R_X86_64_16 foo 0x0
368 // CHECK-NEXT: 0xE0 R_X86_64_PC32 .text 0x4
369 // CHECK-NEXT: 0xFE R_X86_64_32 foo 0x0
370 // CHECK-NEXT: 0x110 R_X86_64_PC32 .text 0x5
371 // CHECK-NEXT: 0x12E R_X86_64_64 foo 0x0
372 // CHECK-NEXT: 0x144 R_X86_64_PC32 .text 0x6
373 // CHECK-NEXT: 0x162 R_X86_64_16 foo 0x0
374 // CHECK-NEXT: 0x174 R_X86_64_PC32 .text 0x7
375 // CHECK-NEXT: 0x192 R_X86_64_32 foo 0x0
376 // CHECK-NEXT: 0x1A4 R_X86_64_PC32 .text 0x8
377 // CHECK-NEXT: 0x1C2 R_X86_64_64 foo 0x0
378 // CHECK-NEXT: 0x1D8 R_X86_64_PC32 .text 0x9
379 // CHECK-NEXT: 0x1F6 R_X86_64_64 foo 0x0
380 // CHECK-NEXT: 0x20C R_X86_64_PC32 .text 0xA
381 // CHECK-NEXT: 0x22A R_X86_64_PC64 foo 0x0
382 // CHECK-NEXT: 0x240 R_X86_64_PC32 .text 0xB
383 // CHECK-NEXT: 0x25E R_X86_64_PC16 foo 0x0
384 // CHECK-NEXT: 0x270 R_X86_64_PC32 .text 0xC
385 // CHECK-NEXT: 0x28E R_X86_64_PC32 foo 0x0
386 // CHECK-NEXT: 0x2A0 R_X86_64_PC32 .text 0xD
387 // CHECK-NEXT: 0x2BE R_X86_64_PC64 foo 0x0
388 // CHECK-NEXT: 0x2D4 R_X86_64_PC32 .text 0xE
389 // CHECK-NEXT: 0x2F2 R_X86_64_PC16 foo 0x0
390 // CHECK-NEXT: 0x304 R_X86_64_PC32 .text 0xF
391 // CHECK-NEXT: 0x322 R_X86_64_PC32 foo 0x0
392 // CHECK-NEXT: 0x334 R_X86_64_PC32 .text 0x10
393 // CHECK-NEXT: 0x352 R_X86_64_PC64 foo 0x0
394 // CHECK-NEXT: 0x368 R_X86_64_PC32 .text 0x11
395 // CHECK-NEXT: 0x386 R_X86_64_PC64 foo 0x0
396 // CHECK-NEXT: 0x39C R_X86_64_PC32 .text 0x12
397 // CHECK-NEXT: 0x3BA R_X86_64_64 foo 0x0
398 // CHECK-NEXT: 0x3D0 R_X86_64_PC32 .text 0x13
399 // CHECK-NEXT: 0x3EE R_X86_64_16 foo 0x0
400 // CHECK-NEXT: 0x400 R_X86_64_PC32 .text 0x14
401 // CHECK-NEXT: 0x41E R_X86_64_32 foo 0x0
402 // CHECK-NEXT: 0x430 R_X86_64_PC32 .text 0x15
403 // CHECK-NEXT: 0x44E R_X86_64_64 foo 0x0
404 // CHECK-NEXT: 0x464 R_X86_64_PC32 .text 0x16
405 // CHECK-NEXT: 0x482 R_X86_64_16 foo 0x0
406 // CHECK-NEXT: 0x494 R_X86_64_PC32 .text 0x17
407 // CHECK-NEXT: 0x4B2 R_X86_64_32 foo 0x0
408 // CHECK-NEXT: 0x4C4 R_X86_64_PC32 .text 0x18
409 // CHECK-NEXT: 0x4E2 R_X86_64_64 foo 0x0
410 // CHECK-NEXT: 0x4F8 R_X86_64_PC32 .text 0x19
411 // CHECK-NEXT: 0x516 R_X86_64_64 foo 0x0
412 // CHECK-NEXT: 0x52C R_X86_64_PC32 .text 0x1A
413 // CHECK-NEXT: 0x54A R_X86_64_PC64 foo 0x0
414 // CHECK-NEXT: 0x560 R_X86_64_PC32 .text 0x1B
415 // CHECK-NEXT: 0x57E R_X86_64_PC16 foo 0x0
416 // CHECK-NEXT: 0x590 R_X86_64_PC32 .text 0x1C
417 // CHECK-NEXT: 0x5AE R_X86_64_PC32 foo 0x0
418 // CHECK-NEXT: 0x5C0 R_X86_64_PC32 .text 0x1D
419 // CHECK-NEXT: 0x5DE R_X86_64_PC64 foo 0x0
420 // CHECK-NEXT: 0x5F4 R_X86_64_PC32 .text 0x1E
421 // CHECK-NEXT: 0x612 R_X86_64_PC16 foo 0x0
422 // CHECK-NEXT: 0x624 R_X86_64_PC32 .text 0x1F
423 // CHECK-NEXT: 0x642 R_X86_64_PC32 foo 0x0
424 // CHECK-NEXT: 0x654 R_X86_64_PC32 .text 0x20
425 // CHECK-NEXT: 0x672 R_X86_64_PC64 foo 0x0
426 // CHECK-NEXT: 0x688 R_X86_64_PC32 .text 0x21
427 // CHECK-NEXT: 0x6A6 R_X86_64_PC64 foo 0x0
428 // CHECK-NEXT: 0x6BC R_X86_64_PC32 .text 0x22
429429 // CHECK-NEXT: ]
430430 // CHECK: }
1414 .size foo, .-foo
1515
1616 // CHECK: Relocations [
17 // CHECK: Section ({{[^ ]+}}) .debug_info {
17 // CHECK: Section ({{[^ ]+}}) .rel.debug_info {
1818 // CHECK-NEXT: 0x6 R_386_32 .debug_abbrev 0x0
1919 // CHECK-NEXT: 0xC R_386_32 .debug_line 0x0
2020 // CHECK: }
21 // CHECK-NEXT: Section ({{[^ ]+}}) .debug_aranges {
21 // CHECK-NEXT: Section ({{[^ ]+}}) .rel.debug_aranges {
2222 // CHECK-NEXT: 0x6 R_386_32 .debug_info 0x0
2323 // CHECK-NEXT: 0x10 R_386_32 .text 0x0
2424 // CHECK-NEXT: }
66 movl foo@GOTPCREL(%rip), %eax
77
88 // CHECK: Relocations [
9 // CHECK: Section ({{[^ ]+}}) .text {
9 // CHECK: Section ({{[^ ]+}}) .rela.text {
1010 // CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_GOT32 foo 0x{{[^ ]+}}
1111 // CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_GOTPCREL foo 0x{{[^ ]+}}
1212 // CHECK-NEXT: }
66 foo:
77
88 // CHECKT: Relocations [
9 // CHECK: Section (1) .text {
9 // CHECK: Section (2) .rela.text {
1010 // CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_32S .text 0x{{[^ ]+}}
1111 // CHECK-NEXT: }
1212 // CHECK-NEXT: ]
2222 foo:
2323
2424 // CHECK: Relocations [
25 // CHECK-NEXT: Section (1) .text {
25 // CHECK-NEXT: Section (2) .rela.text {
2626 // CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_PC32 .Lfoo 0x{{[^ ]+}}
2727 // CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_32 .sec1 0x{{[^ ]+}}
2828 // CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_32 .Lfoo 0x{{[^ ]+}}
33 // correctly point to the section or the symbol.
44
55 // CHECK: Relocations [
6 // CHECK-NEXT: Section (1) .text {
6 // CHECK-NEXT: Section (2) .rel.text {
77 // CHECK-NEXT: 0x2 R_386_GOTOFF .Lfoo 0x0
88 // CHECK-NEXT: 0x{{[^ ]+}} R_386_PLT32 bar2 0x0
99 // CHECK-NEXT: 0x{{[^ ]+}} R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0
88 // CHECK: Index: 1
99 // CHECK-NEXT: Name: .text
1010 // CHECK: Relocations [
11 // CHECK-NEXT: 0x1 R_X86_64_PC8 - 0x0
12 // CHECK-NEXT: 0x3 R_X86_64_PC32 - 0x0
1311 // CHECK-NEXT: ]
1412 // CHECK-NEXT: }
1513
2725 // CHECK-NEXT: AddressAlignment: 8
2826 // CHECK-NEXT: EntrySize: 24
2927 // CHECK-NEXT: Relocations [
28 // CHECK-NEXT: 0x1 R_X86_64_PC8 - 0x0
29 // CHECK-NEXT: 0x3 R_X86_64_PC32 - 0x0
3030 // CHECK-NEXT: ]
3131 // CHECK-NEXT: }
2020
2121
2222 // CHECK: Section {
23 // CHECK: Name: .text
23 // CHECK: Name: .rela.text
2424 // CHECK: Relocations [
2525 // CHECK-NEXT: 0x1 R_X86_64_32 .text
2626 // CHECK-NEXT: 0x8 R_X86_64_32S .text
3131 // CHECK-NEXT: AddressAlignment: 4
3232 // CHECK-NEXT: EntrySize: 0
3333 // CHECK-NEXT: Relocations [
34 // CHECK-NEXT: ]
35 // CHECK-NEXT: }
36 // CHECK-NEXT: Section {
37 // CHECK-NEXT: Index: 2
38 // CHECK-NEXT: Name: .rela.text (1)
39 // CHECK-NEXT: Type: SHT_RELA (0x4)
40 // CHECK-NEXT: Flags [ (0x0)
41 // CHECK-NEXT: ]
42 // CHECK-NEXT: Address: 0x0
43 // CHECK-NEXT: Offset: 0x320
44 // CHECK-NEXT: Size: 24
45 // CHECK-NEXT: Link: 6
46 // CHECK-NEXT: Info: 1
47 // CHECK-NEXT: AddressAlignment: 8
48 // CHECK-NEXT: EntrySize: 24
49 // CHECK-NEXT: Relocations [
3450 // CHECK-NEXT: 0x0 R_X86_64_32 .text 0x0
3551 // CHECK-NEXT: ]
3652 // CHECK-NEXT: }
53
3754
3855 // Symbol 2 is section 1
3956 // CHECK: Symbol {
2121 global1:
2222
2323 // CHECK: Relocations [
24 // CHECK-NEXT: Section (1) .text {
24 // CHECK-NEXT: Section (2) .rela.text {
2525 // CHECK-NEXT: 0x0 R_X86_64_32 .text 0x0
2626 // CHECK-NEXT: 0x4 R_X86_64_32 bar2@zed 0x0
2727 // CHECK-NEXT: 0x8 R_X86_64_32 .text 0x0
77 call foo
88
99 // CHECK: Relocations [
10 // CHECK-NEXT: Section ({{[0-9]+}}) .text {
10 // CHECK-NEXT: Section ({{[0-9]+}}) .rela.text {
1111 // CHECK-NEXT: 0x1 R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFC
1212 // CHECK-NEXT: }
1313 // CHECK-NEXT: ]
66
77
88 // CHECK: Relocations [
9 // CHECK-NEXT: Section ({{[0-9]+}}) .text {
9 // CHECK-NEXT: Section ({{[0-9]+}}) .rela.text {
1010 // CHECK-NEXT: 0x3 R_X86_64_32S {{[^ ]+}} 0x80000000
1111 // CHECK-NEXT: }
1212 // CHECK-NEXT: ]
1818 .cfi_startproc
1919 .cfi_endproc
2020
21 // MIPS32: RELOCATION RECORDS FOR [.eh_frame]:
21 // MIPS32: RELOCATION RECORDS FOR [.rel.eh_frame]:
2222 // MIPS32-NEXT: R_MIPS_32
2323 // MIPS32: Contents of section .eh_frame:
2424 // MIPS32-NEXT: 0000
5454 // MIPS32: 0b
5555 // FIXME: The instructions are different from the ones produces by gas.
5656
57 // MIPS32EL: RELOCATION RECORDS FOR [.eh_frame]:
57 // MIPS32EL: RELOCATION RECORDS FOR [.rel.eh_frame]:
5858 // MIPS32EL-NEXT: R_MIPS_32
5959 // MIPS32EL: Contents of section .eh_frame:
6060 // MIPS32EL-NEXT: 0000
9090 // MIPS32EL: 0b
9191 // FIXME: The instructions are different from the ones produces by gas.
9292
93 // MIPS64: RELOCATION RECORDS FOR [.eh_frame]:
93 // MIPS64: RELOCATION RECORDS FOR [.rela.eh_frame]:
9494 // MIPS64-NEXT: R_MIPS_64
9595 // MIPS64: Contents of section .eh_frame:
9696 // MIPS64-NEXT: 0000
128128 // FIXME: The instructions are different from the ones produces by gas.
129129
130130
131 // MIPS64EL: RELOCATION RECORDS FOR [.eh_frame]:
131 // MIPS64EL: RELOCATION RECORDS FOR [.rela.eh_frame]:
132132 // MIPS64EL-NEXT: R_MIPS_64
133133 // MIPS64EL: Contents of section .eh_frame:
134134 // MIPS64EL-NEXT: 0000
3030
3131 ; R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
3232 ; CHECK: Relocations [
33 ; CHECK: Section ({{[a-z0-9]+}}) .rodata {
33 ; CHECK: Section ({{[a-z0-9]+}}) .rela.rodata {
3434 ; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
3535 ; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
3636 ; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
22 ; Check that the appropriate relocations were created.
33
44 ; CHECK: Relocations [
5 ; CHECK: Section (1) .text {
5 ; CHECK: Section (2) .rel.text {
66 ; CHECK: R_MIPS_TLS_LDM
77 ; CHECK: R_MIPS_TLS_DTPREL_HI16
88 ; CHECK: R_MIPS_TLS_DTPREL_LO16
2323 ; STATIC-NEXT: AddressAlignment: 8
2424 ; STATIC-NEXT: EntrySize:
2525 ; STATIC-NEXT: Relocations [
26 ; STATIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
2726 ; STATIC-NEXT: ]
2827 ; STATIC-NEXT: SectionData (
2928 ; STATIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
4443 ; STATIC-NEXT: Info:
4544 ; STATIC-NEXT: AddressAlignment: 8
4645 ; STATIC-NEXT: EntrySize: 24
47
46 ; STATIC-NEXT: Relocations [
47 ; STATIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
48 ; STATIC-NEXT: ]
4849
4950 ; PIC: Section {
5051 ; PIC: Name: .eh_frame
6061 ; PIC-NEXT: AddressAlignment: 8
6162 ; PIC-NEXT: EntrySize: 0
6263 ; PIC-NEXT: Relocations [
63 ; PIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
6464 ; PIC-NEXT: ]
6565 ; PIC-NEXT: SectionData (
6666 ; PIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
8181 ; PIC-NEXT: Info:
8282 ; PIC-NEXT: AddressAlignment: 8
8383 ; PIC-NEXT: EntrySize: 24
84 ; PIC-NEXT: Relocations [
85 ; PIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
86 ; PIC-NEXT: ]
2626 ;; The relocations in .rela.text are the 'number64' load using a
2727 ;; R_PPC64_TOC16_DS against the .toc and the 'sin' external function
2828 ;; address using a R_PPC64_REL24
29 ;; CHECK: Section ({{[0-9]+}}) .text {
29 ;; CHECK: Section ({{[0-9]+}}) .rela.text {
3030 ;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_DS .toc
3131 ;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_REL24 sin
3232 ;; CHECK-NEXT: }
3636 ; address itself);
3737 ;; 2. And a R_PPC64_TOC against no symbol (the linker will replace for the
3838 ;; module's TOC base).
39 ;; CHECK: Section ({{[0-9]+}}) .opd {
39 ;; CHECK: Section ({{[0-9]+}}) .rela.opd {
4040 ;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 .text 0x0
4141 ;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC - 0x0
4242
4343 ;; Finally the TOC creates the relocation for the 'number64'.
44 ;; CHECK: Section ({{[0-9]+}}) .toc {
44 ;; CHECK: Section ({{[0-9]+}}) .rela.toc {
4545 ;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 number64 0x0
4646 ;; CHECK-NEXT: }
4747
1212 ;; Check for a pair of R_PPC64_TPREL16_HA / R_PPC64_TPREL16_LO relocs
1313 ;; against the thread-local symbol 't'.
1414 ;; CHECK: Relocations [
15 ;; CHECK: Section ({{[0-9]+}}) .text {
15 ;; CHECK: Section ({{[0-9]+}}) .rela.text {
1616 ;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_HA t
1717 ;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_LO t
1818 ;; CHECK-NEXT: }
11 RUN: | FileCheck %s
22
33 // CHECK: Relocations [
4 // CHECK: Section (11) .plt {
4 // CHECK-NEXT: Section (8) .rela.dyn {
5 // CHECK-NEXT: Relocation {
6 // CHECK-NEXT: Offset: 0x4018D8
7 // CHECK-NEXT: Type: R_X86_64_GLOB_DAT (6)
8 // CHECK-NEXT: Symbol: __gmon_start__
9 // CHECK-NEXT: Addend: 0x0
10 // CHECK-NEXT: }
11 // CHECK-NEXT: }
12 // CHECK-NEXT: Section (9) .rela.plt {
513 // CHECK-NEXT: Relocation {
614 // CHECK-NEXT: Offset: 0x4018F8
715 // CHECK-NEXT: Type: R_X86_64_JUMP_SLOT (7)
2121 COFF-NEXT: ]
2222
2323 ELF: Relocations [
24 ELF-NEXT: Section (1) .text {
24 ELF-NEXT: Section (2) .rel.text {
2525 ELF-NEXT: 0xC R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0
2626 ELF-NEXT: 0x12 R_386_GOTOFF .L.str 0x0
2727 ELF-NEXT: 0x1A R_386_PLT32 puts 0x0
107107 ELF-NEXT: AddressAlignment: 16
108108 ELF-NEXT: EntrySize: 0
109109 ELF-NEXT: Relocations [
110 ELF-NEXT: 0xC R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0
111 ELF-NEXT: 0x12 R_386_GOTOFF .L.str 0x0
112 ELF-NEXT: 0x1A R_386_PLT32 puts 0x0
113 ELF-NEXT: 0x1F R_386_PLT32 SomeOtherFunction 0x0
114110 ELF-NEXT: ]
115111 ELF-NEXT: Symbols [
116112 ELF-NEXT: Symbol {
136132 ELF-NEXT: 0000: 5383EC08 E8000000 005B81C3 03000000 |S........[......|
137133 ELF-NEXT: 0010: 8D830000 00008904 24E8FCFF FFFFE8FC |........$.......|
138134 ELF-NEXT: 0020: FFFFFF31 C083C408 5BC3 |...1....[.|
135 ELF-NEXT: )
136 ELF-NEXT: }
137 ELF-NEXT: Section {
138 ELF-NEXT: Index: 2
139 ELF-NEXT: Name: .rel.text (1)
140 ELF-NEXT: Type: SHT_REL (0x9)
141 ELF-NEXT: Flags [ (0x0)
142 ELF-NEXT: ]
143 ELF-NEXT: Address: 0x0
144 ELF-NEXT: Offset: 0x360
145 ELF-NEXT: Size: 32
146 ELF-NEXT: Link: 8
147 ELF-NEXT: Info: 1
148 ELF-NEXT: AddressAlignment: 4
149 ELF-NEXT: EntrySize: 8
150 ELF-NEXT: Relocations [
151 ELF-NEXT: 0xC R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0
152 ELF-NEXT: 0x12 R_386_GOTOFF .L.str 0x0
153 ELF-NEXT: 0x1A R_386_PLT32 puts 0x0
154 ELF-NEXT: 0x1F R_386_PLT32 SomeOtherFunction 0x0
155 ELF-NEXT: ]
156 ELF-NEXT: Symbols [
157 ELF-NEXT: ]
158 ELF-NEXT: SectionData (
159 ELF-NEXT: 0000: 0C000000 0A0A0000 12000000 09020000 |................|
160 ELF-NEXT: 0010: 1A000000 040B0000 1F000000 04090000 |................|
139161 ELF-NEXT: )
140162 ELF-NEXT: }
141163