llvm.org GIT mirror llvm / 73b7bb7
Build Blackfin target with autoconf and cmake. Note that configure was edited by hand. Will somebody with the correct version of autoconf please regenerate? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77898 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 11 years ago
3 changed file(s) with 45 addition(s) and 40 deletion(s). Raw diff Collapse all Expand all
4848 set(LLVM_ALL_TARGETS
4949 Alpha
5050 ARM
51 Blackfin
5152 CBackend
5253 CellSPU
5354 CppBackend
226226 xcore-*) llvm_cv_target_arch="XCore" ;;
227227 msp430-*) llvm_cv_target_arch="MSP430" ;;
228228 s390x-*) llvm_cv_target_arch="SystemZ" ;;
229 bfin-*) llvm_cv_target_arch="Blackfin" ;;
229230 *) llvm_cv_target_arch="Unknown" ;;
230231 esac])
231232
340341 AC_SUBST(JIT,[[]])
341342 else
342343 case "$llvm_cv_target_arch" in
343 x86) AC_SUBST(TARGET_HAS_JIT,1) ;;
344 Sparc) AC_SUBST(TARGET_HAS_JIT,0) ;;
345 PowerPC) AC_SUBST(TARGET_HAS_JIT,1) ;;
346 x86_64) AC_SUBST(TARGET_HAS_JIT,1) ;;
347 Alpha) AC_SUBST(TARGET_HAS_JIT,1) ;;
348 ARM) AC_SUBST(TARGET_HAS_JIT,0) ;;
349 Mips) AC_SUBST(TARGET_HAS_JIT,0) ;;
350 PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;;
351 XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
352 MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
353 SystemZ) AC_SUBST(TARGET_HAS_JIT,0) ;;
354 *) AC_SUBST(TARGET_HAS_JIT,0) ;;
344 x86) AC_SUBST(TARGET_HAS_JIT,1) ;;
345 Sparc) AC_SUBST(TARGET_HAS_JIT,0) ;;
346 PowerPC) AC_SUBST(TARGET_HAS_JIT,1) ;;
347 x86_64) AC_SUBST(TARGET_HAS_JIT,1) ;;
348 Alpha) AC_SUBST(TARGET_HAS_JIT,1) ;;
349 ARM) AC_SUBST(TARGET_HAS_JIT,0) ;;
350 Mips) AC_SUBST(TARGET_HAS_JIT,0) ;;
351 PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;;
352 XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
353 MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
354 SystemZ) AC_SUBST(TARGET_HAS_JIT,0) ;;
355 Blackfin) AC_SUBST(TARGET_HAS_JIT,0) ;;
356 *) AC_SUBST(TARGET_HAS_JIT,0) ;;
355357 esac
356358 fi
357359
400402 [Build specific host targets: all,host-only,{target-name} (default=all)]),,
401403 enableval=all)
402404 case "$enableval" in
403 all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ CBackend MSIL CppBackend" ;;
405 all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend" ;;
404406 host-only)
405407 case "$llvm_cv_target_arch" in
406 x86) TARGETS_TO_BUILD="X86" ;;
407 x86_64) TARGETS_TO_BUILD="X86" ;;
408 Sparc) TARGETS_TO_BUILD="Sparc" ;;
409 PowerPC) TARGETS_TO_BUILD="PowerPC" ;;
410 Alpha) TARGETS_TO_BUILD="Alpha" ;;
411 ARM) TARGETS_TO_BUILD="ARM" ;;
412 Mips) TARGETS_TO_BUILD="Mips" ;;
408 x86) TARGETS_TO_BUILD="X86" ;;
409 x86_64) TARGETS_TO_BUILD="X86" ;;
410 Sparc) TARGETS_TO_BUILD="Sparc" ;;
411 PowerPC) TARGETS_TO_BUILD="PowerPC" ;;
412 Alpha) TARGETS_TO_BUILD="Alpha" ;;
413 ARM) TARGETS_TO_BUILD="ARM" ;;
414 Mips) TARGETS_TO_BUILD="Mips" ;;
413415 CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;;
414 PIC16) TARGETS_TO_BUILD="PIC16" ;;
415 XCore) TARGETS_TO_BUILD="XCore" ;;
416 MSP430) TARGETS_TO_BUILD="MSP430" ;;
417 SystemZ) TARGETS_TO_BUILD="SystemZ" ;;
416 PIC16) TARGETS_TO_BUILD="PIC16" ;;
417 XCore) TARGETS_TO_BUILD="XCore" ;;
418 MSP430) TARGETS_TO_BUILD="MSP430" ;;
419 SystemZ) TARGETS_TO_BUILD="SystemZ" ;;
420 Blackfin) TARGETS_TO_BUILD="Blackfin" ;;
418421 *) AC_MSG_ERROR([Can not set target to build]) ;;
419422 esac
420423 ;;
421424 *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
422425 case "$a_target" in
423 x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
424 x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
425 sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
426 powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
427 alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;;
428 arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
429 mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
430 spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
431 pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
432 xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
433 msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
434 systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
435 cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
436 msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
437 cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
426 x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
427 x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
428 sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
429 powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
430 alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;;
431 arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
432 mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
433 spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
434 pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
435 xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
436 msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
437 systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
438 blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
439 cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
440 msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
441 cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
438442 *) AC_MSG_ERROR([Unrecognized target $a_target]) ;;
439443 esac
440444 done
49344934 fi
49354935
49364936 case "$enableval" in
4937 all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ CBackend MSIL CppBackend" ;;
4937 all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend" ;;
49384938 host-only)
49394939 case "$llvm_cv_target_arch" in
49404940 x86) TARGETS_TO_BUILD="X86" ;;