llvm.org GIT mirror llvm / 734ab17
Merging r258936: ------------------------------------------------------------------------ r258936 | thomas.stellard | 2016-01-27 07:53:52 -0800 (Wed, 27 Jan 2016) | 14 lines AMDGPU/SI: Fix commuting of 32-bit VOPC instructions Summary: We didn't have entries in the commuting table for the 32-bit instructions. I don't think we hit this problem now, but we will once uniform branching is enabled. Tests will come in a later commit. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D16600 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@271589 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 3 years ago
1 changed file(s) with 4 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
17871787 list sched,
17881788 string revOpName = "", string asm = opName#"_e32 "#op_asm,
17891789 string alias_asm = opName#" "#op_asm> {
1790 def "" : VOPC_Pseudo {
1790 def "" : VOPC_Pseudo ,
1791 VOP2_REV {
17911792 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
17921793 let SchedRW = sched;
17931794 }
18181819 multiclass VOPC_Helper pat32,
18191820 list pat64, bit DefExec, string revOp,
18201821 VOPProfile p, list sched> {
1821 defm _e32 : VOPC_m >;
1822 defm _e32 : VOPC_m ,
1823 revOp>;
18221824
18231825 defm _e64 : VOP3_C_m
18241826 opName, p.HasModifiers, DefExec, revOp, sched>;