llvm.org GIT mirror llvm / 71589ff
[X86] Handle COPYs of physregs better (regalloc hints) Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342578 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 1 year, 4 months ago
223 changed file(s) with 12457 addition(s) and 11948 deletion(s). Raw diff Collapse all Expand all
9494 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
9595 MachineFunction &MF) const override;
9696
97 bool enableMultipleCopyHints() const override { return true; }
98
9799 /// getCalleeSavedRegs - Return a null-terminated list of all of the
98100 /// callee-save registers on this target.
99101 const MCPhysReg *
5353 ret i16 %ret
5454 }
5555
56 define i8 @test_add_i8(i8 %arg1, i8 %arg2) {
57 ; X64-LABEL: test_add_i8:
58 ; X64: # %bb.0:
59 ; X64-NEXT: addb %dil, %sil
60 ; X64-NEXT: movl %esi, %eax
61 ; X64-NEXT: retq
62 ;
63 ; X32-LABEL: test_add_i8:
56 define i8 @test_add_i8(i8 %arg1, i8 %arg2) {
57 ; X64-LABEL: test_add_i8:
58 ; X64: # %bb.0:
59 ; X64-NEXT: movl %esi, %eax
60 ; X64-NEXT: addb %dil, %al
61 ; X64-NEXT: # kill: def $al killed $al killed $eax
62 ; X64-NEXT: retq
63 ;
64 ; X32-LABEL: test_add_i8:
6465 ; X32: # %bb.0:
6566 ; X32-NEXT: movb {{[0-9]+}}(%esp), %al
6667 ; X32-NEXT: addb {{[0-9]+}}(%esp), %al
1515 ret i32 %ret
1616 }
1717
18 define i8 @test_and_i8(i8 %arg1, i8 %arg2) {
19 ; ALL-LABEL: test_and_i8:
20 ; ALL: # %bb.0:
21 ; ALL-NEXT: andb %dil, %sil
22 ; ALL-NEXT: movl %esi, %eax
23 ; ALL-NEXT: retq
24 %ret = and i8 %arg1, %arg2
25 ret i8 %ret
18 define i8 @test_and_i8(i8 %arg1, i8 %arg2) {
19 ; ALL-LABEL: test_and_i8:
20 ; ALL: # %bb.0:
21 ; ALL-NEXT: movl %esi, %eax
22 ; ALL-NEXT: andb %dil, %al
23 ; ALL-NEXT: # kill: def $al killed $al killed $eax
24 ; ALL-NEXT: retq
25 %ret = and i8 %arg1, %arg2
26 ret i8 %ret
27 }
28
29 define i16 @test_and_i16(i16 %arg1, i16 %arg2) {
30 ; ALL-LABEL: test_and_i16:
31 ; ALL: # %bb.0:
32 ; ALL-NEXT: movl %esi, %eax
33 ; ALL-NEXT: andw %di, %ax
34 ; ALL-NEXT: # kill: def $ax killed $ax killed $eax
35 ; ALL-NEXT: retq
36 %ret = and i16 %arg1, %arg2
37 ret i16 %ret
38 }
39
40 define i32 @test_and_i32(i32 %arg1, i32 %arg2) {
41 ; ALL-LABEL: test_and_i32:
42 ; ALL: # %bb.0:
43 ; ALL-NEXT: movl %esi, %eax
44 ; ALL-NEXT: andl %edi, %eax
45 ; ALL-NEXT: retq
46 %ret = and i32 %arg1, %arg2
47 ret i32 %ret
48 }
49
50 define i64 @test_and_i64(i64 %arg1, i64 %arg2) {
51 ; ALL-LABEL: test_and_i64:
52 ; ALL: # %bb.0:
53 ; ALL-NEXT: movq %rsi, %rax
54 ; ALL-NEXT: andq %rdi, %rax
55 ; ALL-NEXT: retq
56 %ret = and i64 %arg1, %arg2
57 ret i64 %ret
2658 }
2759
28 define i16 @test_and_i16(i16 %arg1, i16 %arg2) {
29 ; ALL-LABEL: test_and_i16:
30 ; ALL: # %bb.0:
31 ; ALL-NEXT: andw %di, %si
32 ; ALL-NEXT: movl %esi, %eax
33 ; ALL-NEXT: retq
34 %ret = and i16 %arg1, %arg2
35 ret i16 %ret
36 }
37
38 define i32 @test_and_i32(i32 %arg1, i32 %arg2) {
39 ; ALL-LABEL: test_and_i32:
40 ; ALL: # %bb.0:
41 ; ALL-NEXT: andl %edi, %esi
42 ; ALL-NEXT: movl %esi, %eax
43 ; ALL-NEXT: retq
44 %ret = and i32 %arg1, %arg2
45 ret i32 %ret
46 }
47
48 define i64 @test_and_i64(i64 %arg1, i64 %arg2) {
49 ; ALL-LABEL: test_and_i64:
50 ; ALL: # %bb.0:
51 ; ALL-NEXT: andq %rdi, %rsi
52 ; ALL-NEXT: movq %rsi, %rax
53 ; ALL-NEXT: retq
54 %ret = and i64 %arg1, %arg2
55 ret i64 %ret
56 }
57
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
11 ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
22
3 define i64 @test_ashr_i64(i64 %arg1, i64 %arg2) {
4 ; X64-LABEL: test_ashr_i64:
5 ; X64: # %bb.0:
6 ; X64-NEXT: movq %rsi, %rcx
7 ; X64-NEXT: # kill: def $cl killed $rcx
8 ; X64-NEXT: sarq %cl, %rdi
9 ; X64-NEXT: movq %rdi, %rax
10 ; X64-NEXT: retq
11 %res = ashr i64 %arg1, %arg2
12 ret i64 %res
13 }
14
15 define i64 @test_ashr_i64_imm(i64 %arg1) {
16 ; X64-LABEL: test_ashr_i64_imm:
17 ; X64: # %bb.0:
18 ; X64-NEXT: movq $5, %rcx
19 ; X64-NEXT: # kill: def $cl killed $rcx
20 ; X64-NEXT: sarq %cl, %rdi
21 ; X64-NEXT: movq %rdi, %rax
22 ; X64-NEXT: retq
23 %res = ashr i64 %arg1, 5
24 ret i64 %res
25 }
26
27 define i64 @test_ashr_i64_imm1(i64 %arg1) {
28 ; X64-LABEL: test_ashr_i64_imm1:
29 ; X64: # %bb.0:
30 ; X64-NEXT: movq $1, %rcx
31 ; X64-NEXT: # kill: def $cl killed $rcx
32 ; X64-NEXT: sarq %cl, %rdi
33 ; X64-NEXT: movq %rdi, %rax
34 ; X64-NEXT: retq
35 %res = ashr i64 %arg1, 1
36 ret i64 %res
37 }
38
39 define i32 @test_ashr_i32(i32 %arg1, i32 %arg2) {
40 ; X64-LABEL: test_ashr_i32:
41 ; X64: # %bb.0:
42 ; X64-NEXT: movl %esi, %ecx
43 ; X64-NEXT: # kill: def $cl killed $ecx
44 ; X64-NEXT: sarl %cl, %edi
45 ; X64-NEXT: movl %edi, %eax
46 ; X64-NEXT: retq
47 %res = ashr i32 %arg1, %arg2
48 ret i32 %res
49 }
50
51 define i32 @test_ashr_i32_imm(i32 %arg1) {
52 ; X64-LABEL: test_ashr_i32_imm:
53 ; X64: # %bb.0:
54 ; X64-NEXT: movl $5, %ecx
55 ; X64-NEXT: # kill: def $cl killed $ecx
56 ; X64-NEXT: sarl %cl, %edi
57 ; X64-NEXT: movl %edi, %eax
58 ; X64-NEXT: retq
59 %res = ashr i32 %arg1, 5
60 ret i32 %res
61 }
62
63 define i32 @test_ashr_i32_imm1(i32 %arg1) {
64 ; X64-LABEL: test_ashr_i32_imm1:
65 ; X64: # %bb.0:
66 ; X64-NEXT: movl $1, %ecx
67 ; X64-NEXT: # kill: def $cl killed $ecx
68 ; X64-NEXT: sarl %cl, %edi
69 ; X64-NEXT: movl %edi, %eax
70 ; X64-NEXT: retq
71 %res = ashr i32 %arg1, 1
72 ret i32 %res
73 }
74
75 define i16 @test_ashr_i16(i32 %arg1, i32 %arg2) {
76 ; X64-LABEL: test_ashr_i16:
77 ; X64: # %bb.0:
78 ; X64-NEXT: movl %esi, %ecx
79 ; X64-NEXT: # kill: def $cl killed $cx
80 ; X64-NEXT: sarw %cl, %di
81 ; X64-NEXT: movl %edi, %eax
82 ; X64-NEXT: retq
83 %a = trunc i32 %arg1 to i16
84 %a2 = trunc i32 %arg2 to i16
3 define i64 @test_ashr_i64(i64 %arg1, i64 %arg2) {
4 ; X64-LABEL: test_ashr_i64:
5 ; X64: # %bb.0:
6 ; X64-NEXT: movq %rdi, %rax
7 ; X64-NEXT: movq %rsi, %rcx
8 ; X64-NEXT: # kill: def $cl killed $rcx
9 ; X64-NEXT: sarq %cl, %rax
10 ; X64-NEXT: retq
11 %res = ashr i64 %arg1, %arg2
12 ret i64 %res
13 }
14
15 define i64 @test_ashr_i64_imm(i64 %arg1) {
16 ; X64-LABEL: test_ashr_i64_imm:
17 ; X64: # %bb.0:
18 ; X64-NEXT: movq %rdi, %rax
19 ; X64-NEXT: movq $5, %rcx
20 ; X64-NEXT: # kill: def $cl killed $rcx
21 ; X64-NEXT: sarq %cl, %rax
22 ; X64-NEXT: retq
23 %res = ashr i64 %arg1, 5
24 ret i64 %res
25 }
26
27 define i64 @test_ashr_i64_imm1(i64 %arg1) {
28 ; X64-LABEL: test_ashr_i64_imm1:
29 ; X64: # %bb.0:
30 ; X64-NEXT: movq %rdi, %rax
31 ; X64-NEXT: movq $1, %rcx
32 ; X64-NEXT: # kill: def $cl killed $rcx
33 ; X64-NEXT: sarq %cl, %rax
34 ; X64-NEXT: retq
35 %res = ashr i64 %arg1, 1
36 ret i64 %res
37 }
38
39 define i32 @test_ashr_i32(i32 %arg1, i32 %arg2) {
40 ; X64-LABEL: test_ashr_i32:
41 ; X64: # %bb.0:
42 ; X64-NEXT: movl %edi, %eax
43 ; X64-NEXT: movl %esi, %ecx
44 ; X64-NEXT: # kill: def $cl killed $ecx
45 ; X64-NEXT: sarl %cl, %eax
46 ; X64-NEXT: retq
47 %res = ashr i32 %arg1, %arg2
48 ret i32 %res
49 }
50
51 define i32 @test_ashr_i32_imm(i32 %arg1) {
52 ; X64-LABEL: test_ashr_i32_imm:
53 ; X64: # %bb.0:
54 ; X64-NEXT: movl %edi, %eax
55 ; X64-NEXT: movl $5, %ecx
56 ; X64-NEXT: # kill: def $cl killed $ecx
57 ; X64-NEXT: sarl %cl, %eax
58 ; X64-NEXT: retq
59 %res = ashr i32 %arg1, 5
60 ret i32 %res
61 }
62
63 define i32 @test_ashr_i32_imm1(i32 %arg1) {
64 ; X64-LABEL: test_ashr_i32_imm1:
65 ; X64: # %bb.0:
66 ; X64-NEXT: movl %edi, %eax
67 ; X64-NEXT: movl $1, %ecx
68 ; X64-NEXT: # kill: def $cl killed $ecx
69 ; X64-NEXT: sarl %cl, %eax
70 ; X64-NEXT: retq
71 %res = ashr i32 %arg1, 1
72 ret i32 %res
73 }
74
75 define i16 @test_ashr_i16(i32 %arg1, i32 %arg2) {
76 ; X64-LABEL: test_ashr_i16:
77 ; X64: # %bb.0:
78 ; X64-NEXT: movl %edi, %eax
79 ; X64-NEXT: movl %esi, %ecx
80 ; X64-NEXT: # kill: def $cx killed $cx killed $ecx
81 ; X64-NEXT: # kill: def $cl killed $cx
82 ; X64-NEXT: sarw %cl, %ax
83 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
84 ; X64-NEXT: retq
85 %a = trunc i32 %arg1 to i16
86 %a2 = trunc i32 %arg2 to i16
8587 %res = ashr i16 %a, %a2
8688 ret i16 %res
8789 }
8890
89 define i16 @test_ashr_i16_imm(i32 %arg1) {
90 ; X64-LABEL: test_ashr_i16_imm:
91 ; X64: # %bb.0:
92 ; X64-NEXT: movw $5, %cx
93 ; X64-NEXT: # kill: def $cl killed $cx
94 ; X64-NEXT: sarw %cl, %di
95 ; X64-NEXT: movl %edi, %eax
96 ; X64-NEXT: retq
97 %a = trunc i32 %arg1 to i16
98 %res = ashr i16 %a, 5
91 define i16 @test_ashr_i16_imm(i32 %arg1) {
92 ; X64-LABEL: test_ashr_i16_imm:
93 ; X64: # %bb.0:
94 ; X64-NEXT: movl %edi, %eax
95 ; X64-NEXT: movw $5, %cx
96 ; X64-NEXT: # kill: def $cl killed $cx
97 ; X64-NEXT: sarw %cl, %ax
98 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
99 ; X64-NEXT: retq
100 %a = trunc i32 %arg1 to i16
101 %res = ashr i16 %a, 5
99102 ret i16 %res
100103 }
101104
102 define i16 @test_ashr_i16_imm1(i32 %arg1) {
103 ; X64-LABEL: test_ashr_i16_imm1:
104 ; X64: # %bb.0:
105 ; X64-NEXT: movw $1, %cx
106 ; X64-NEXT: # kill: def $cl killed $cx
107 ; X64-NEXT: sarw %cl, %di
108 ; X64-NEXT: movl %edi, %eax
109 ; X64-NEXT: retq
110 %a = trunc i32 %arg1 to i16
111 %res = ashr i16 %a, 1
105 define i16 @test_ashr_i16_imm1(i32 %arg1) {
106 ; X64-LABEL: test_ashr_i16_imm1:
107 ; X64: # %bb.0:
108 ; X64-NEXT: movl %edi, %eax
109 ; X64-NEXT: movw $1, %cx
110 ; X64-NEXT: # kill: def $cl killed $cx
111 ; X64-NEXT: sarw %cl, %ax
112 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
113 ; X64-NEXT: retq
114 %a = trunc i32 %arg1 to i16
115 %res = ashr i16 %a, 1
112116 ret i16 %res
113117 }
114118
115 define i8 @test_ashr_i8(i32 %arg1, i32 %arg2) {
116 ; X64-LABEL: test_ashr_i8:
117 ; X64: # %bb.0:
118 ; X64-NEXT: movl %esi, %ecx
119 ; X64-NEXT: sarb %cl, %dil
120 ; X64-NEXT: movl %edi, %eax
121 ; X64-NEXT: retq
122 %a = trunc i32 %arg1 to i8
123 %a2 = trunc i32 %arg2 to i8
119 define i8 @test_ashr_i8(i32 %arg1, i32 %arg2) {
120 ; X64-LABEL: test_ashr_i8:
121 ; X64: # %bb.0:
122 ; X64-NEXT: movl %edi, %eax
123 ; X64-NEXT: movl %esi, %ecx
124 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
125 ; X64-NEXT: sarb %cl, %al
126 ; X64-NEXT: # kill: def $al killed $al killed $eax
127 ; X64-NEXT: retq
128 %a = trunc i32 %arg1 to i8
129 %a2 = trunc i32 %arg2 to i8
124130 %res = ashr i8 %a, %a2
125131 ret i8 %res
126132 }
127133
128 define i8 @test_ashr_i8_imm(i32 %arg1) {
129 ; X64-LABEL: test_ashr_i8_imm:
130 ; X64: # %bb.0:
131 ; X64-NEXT: sarb $5, %dil
132 ; X64-NEXT: movl %edi, %eax
133 ; X64-NEXT: retq
134 %a = trunc i32 %arg1 to i8
135 %res = ashr i8 %a, 5
134 define i8 @test_ashr_i8_imm(i32 %arg1) {
135 ; X64-LABEL: test_ashr_i8_imm:
136 ; X64: # %bb.0:
137 ; X64-NEXT: movl %edi, %eax
138 ; X64-NEXT: sarb $5, %al
139 ; X64-NEXT: # kill: def $al killed $al killed $eax
140 ; X64-NEXT: retq
141 %a = trunc i32 %arg1 to i8
142 %res = ashr i8 %a, 5
136143 ret i8 %res
137144 }
138145
139 define i8 @test_ashr_i8_imm1(i32 %arg1) {
140 ; X64-LABEL: test_ashr_i8_imm1:
141 ; X64: # %bb.0:
142 ; X64-NEXT: sarb %dil
143 ; X64-NEXT: movl %edi, %eax
144 ; X64-NEXT: retq
145 %a = trunc i32 %arg1 to i8
146 %res = ashr i8 %a, 1
146 define i8 @test_ashr_i8_imm1(i32 %arg1) {
147 ; X64-LABEL: test_ashr_i8_imm1:
148 ; X64: # %bb.0:
149 ; X64-NEXT: movl %edi, %eax
150 ; X64-NEXT: sarb %al
151 ; X64-NEXT: # kill: def $al killed $al killed $eax
152 ; X64-NEXT: retq
153 %a = trunc i32 %arg1 to i8
154 %res = ashr i8 %a, 1
147155 ret i8 %res
148156 }
149157
150 define i1 @test_ashr_i1(i32 %arg1, i32 %arg2) {
151 ; X64-LABEL: test_ashr_i1:
152 ; X64: # %bb.0:
153 ; X64-NEXT: shlb $7, %dil
154 ; X64-NEXT: sarb $7, %dil
155 ; X64-NEXT: andb $1, %sil
156 ; X64-NEXT: movl %esi, %ecx
157 ; X64-NEXT: sarb %cl, %dil
158 ; X64-NEXT: movl %edi, %eax
159 ; X64-NEXT: retq
160 %a = trunc i32 %arg1 to i1
161 %a2 = trunc i32 %arg2 to i1
158 define i1 @test_ashr_i1(i32 %arg1, i32 %arg2) {
159 ; X64-LABEL: test_ashr_i1:
160 ; X64: # %bb.0:
161 ; X64-NEXT: movl %edi, %eax
162 ; X64-NEXT: movl %esi, %ecx
163 ; X64-NEXT: shlb $7, %al
164 ; X64-NEXT: sarb $7, %al
165 ; X64-NEXT: andb $1, %cl
166 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
167 ; X64-NEXT: sarb %cl, %al
168 ; X64-NEXT: # kill: def $al killed $al killed $eax
169 ; X64-NEXT: retq
170 %a = trunc i32 %arg1 to i1
171 %a2 = trunc i32 %arg2 to i1
162172 %res = ashr i1 %a, %a2
163173 ret i1 %res
164174 }
165175
166 define i1 @test_ashr_i1_imm1(i32 %arg1) {
167 ; X64-LABEL: test_ashr_i1_imm1:
168 ; X64: # %bb.0:
169 ; X64-NEXT: movb $-1, %cl
170 ; X64-NEXT: shlb $7, %dil
171 ; X64-NEXT: sarb $7, %dil
172 ; X64-NEXT: andb $1, %cl
173 ; X64-NEXT: sarb %cl, %dil
174 ; X64-NEXT: movl %edi, %eax
175 ; X64-NEXT: retq
176 %a = trunc i32 %arg1 to i1
177 %res = ashr i1 %a, 1
176 define i1 @test_ashr_i1_imm1(i32 %arg1) {
177 ; X64-LABEL: test_ashr_i1_imm1:
178 ; X64: # %bb.0:
179 ; X64-NEXT: movl %edi, %eax
180 ; X64-NEXT: movb $-1, %cl
181 ; X64-NEXT: shlb $7, %al
182 ; X64-NEXT: sarb $7, %al
183 ; X64-NEXT: andb $1, %cl
184 ; X64-NEXT: sarb %cl, %al
185 ; X64-NEXT: # kill: def $al killed $al killed $eax
186 ; X64-NEXT: retq
187 %a = trunc i32 %arg1 to i1
188 %res = ashr i1 %a, 1
178189 ret i1 %res
179190 }
33 ; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX512F
44 ; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX512VL
55
6 define i64 @test_sub_i64(i64 %arg1, i64 %arg2) {
7 ; ALL-LABEL: test_sub_i64:
8 ; ALL: # %bb.0:
9 ; ALL-NEXT: subq %rsi, %rdi
10 ; ALL-NEXT: movq %rdi, %rax
11 ; ALL-NEXT: retq
12 %ret = sub i64 %arg1, %arg2
13 ret i64 %ret
14 }
15
16 define i32 @test_sub_i32(i32 %arg1, i32 %arg2) {
17 ; ALL-LABEL: test_sub_i32:
18 ; ALL: # %bb.0:
19 ; ALL-NEXT: subl %esi, %edi
20 ; ALL-NEXT: movl %edi, %eax
21 ; ALL-NEXT: retq
22 %ret = sub i32 %arg1, %arg2
23 ret i32 %ret
6 define i64 @test_sub_i64(i64 %arg1, i64 %arg2) {
7 ; ALL-LABEL: test_sub_i64:
8 ; ALL: # %bb.0:
9 ; ALL-NEXT: movq %rdi, %rax
10 ; ALL-NEXT: subq %rsi, %rax
11 ; ALL-NEXT: retq
12 %ret = sub i64 %arg1, %arg2
13 ret i64 %ret
14 }
15
16 define i32 @test_sub_i32(i32 %arg1, i32 %arg2) {
17 ; ALL-LABEL: test_sub_i32:
18 ; ALL: # %bb.0:
19 ; ALL-NEXT: movl %edi, %eax
20 ; ALL-NEXT: subl %esi, %eax
21 ; ALL-NEXT: retq
22 %ret = sub i32 %arg1, %arg2
23 ret i32 %ret
2424 }
2525
2626 define float @test_add_float(float %arg1, float %arg2) {
3434 ; X32-NEXT: movb {{[0-9]+}}(%esp), %al
3535 ; X32-NEXT: retl
3636 ;
37 ; X64-LABEL: test_arg_i8:
38 ; X64: # %bb.0:
39 ; X64-NEXT: movl %edi, %eax
40 ; X64-NEXT: retq
41 ret i8 %a
42 }
37 ; X64-LABEL: test_arg_i8:
38 ; X64: # %bb.0:
39 ; X64-NEXT: movl %edi, %eax
40 ; X64-NEXT: # kill: def $al killed $al killed $eax
41 ; X64-NEXT: retq
42 ret i8 %a
43 }
4344
4445 define i16 @test_arg_i16(i16 %a) {
4546 ; X32-LABEL: test_arg_i16:
4748 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
4849 ; X32-NEXT: retl
4950 ;
50 ; X64-LABEL: test_arg_i16:
51 ; X64: # %bb.0:
52 ; X64-NEXT: movl %edi, %eax
53 ; X64-NEXT: retq
54 ret i16 %a
55 }
51 ; X64-LABEL: test_arg_i16:
52 ; X64: # %bb.0:
53 ; X64-NEXT: movl %edi, %eax
54 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
55 ; X64-NEXT: retq
56 ret i16 %a
57 }
5658
5759 define i32 @test_arg_i32(i32 %a) {
5860 ; X32-LABEL: test_arg_i32:
110112
111113 define <8 x i32> @test_v8i32_args(<8 x i32> %arg1, <8 x i32> %arg2) {
112114 ; X32-LABEL: test_v8i32_args:
113 ; X32: # %bb.0:
114 ; X32-NEXT: subl $12, %esp
115 ; X32-NEXT: .cfi_def_cfa_offset 16
116 ; X32-NEXT: movups {{[0-9]+}}(%esp), %xmm1
117 ; X32-NEXT: movaps %xmm2, %xmm0
118 ; X32-NEXT: addl $12, %esp
119 ; X32-NEXT: .cfi_def_cfa_offset 4
120 ; X32-NEXT: retl
115 ; X32: # %bb.0:
116 ; X32-NEXT: subl $12, %esp
117 ; X32-NEXT: .cfi_def_cfa_offset 16
118 ; X32-NEXT: movaps %xmm2, %xmm0
119 ; X32-NEXT: movups {{[0-9]+}}(%esp), %xmm1
120 ; X32-NEXT: addl $12, %esp
121 ; X32-NEXT: .cfi_def_cfa_offset 4
122 ; X32-NEXT: retl
121123 ;
122124 ; X64-LABEL: test_v8i32_args:
123125 ; X64: # %bb.0:
253255 ; X32-LABEL: test_split_return_callee:
254256 ; X32: # %bb.0:
255257 ; X32-NEXT: subl $44, %esp
256 ; X32-NEXT: .cfi_def_cfa_offset 48
257 ; X32-NEXT: movaps %xmm0, (%esp) # 16-byte Spill
258 ; X32-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) # 16-byte Spill
259 ; X32-NEXT: movdqu {{[0-9]+}}(%esp), %xmm1
260 ; X32-NEXT: movdqa %xmm2, %xmm0
261 ; X32-NEXT: calll split_return_callee
262 ; X32-NEXT: paddd (%esp), %xmm0 # 16-byte Folded Reload
263 ; X32-NEXT: paddd {{[0-9]+}}(%esp), %xmm1 # 16-byte Folded Reload
258 ; X32-NEXT: .cfi_def_cfa_offset 48
259 ; X32-NEXT: movaps %xmm0, (%esp) # 16-byte Spill
260 ; X32-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) # 16-byte Spill
261 ; X32-NEXT: movdqa %xmm2, %xmm0
262 ; X32-NEXT: movdqu {{[0-9]+}}(%esp), %xmm1
263 ; X32-NEXT: calll split_return_callee
264 ; X32-NEXT: paddd (%esp), %xmm0 # 16-byte Folded Reload
265 ; X32-NEXT: paddd {{[0-9]+}}(%esp), %xmm1 # 16-byte Folded Reload
264266 ; X32-NEXT: addl $44, %esp
265267 ; X32-NEXT: .cfi_def_cfa_offset 4
266268 ; X32-NEXT: retl
22
33 ; TODO merge with ext.ll after i64 sext supported on 32bit platform
44
5 define i64 @test_zext_i1(i8 %a) {
6 ; X64-LABEL: test_zext_i1:
7 ; X64: # %bb.0:
8 ; X64-NEXT: # kill: def $edi killed $edi def $rdi
9 ; X64-NEXT: andq $1, %rdi
10 ; X64-NEXT: movq %rdi, %rax
11 ; X64-NEXT: retq
12 %val = trunc i8 %a to i1
13 %r = zext i1 %val to i64
5 define i64 @test_zext_i1(i8 %a) {
6 ; X64-LABEL: test_zext_i1:
7 ; X64: # %bb.0:
8 ; X64-NEXT: movl %edi, %eax
9 ; X64-NEXT: andq $1, %rax
10 ; X64-NEXT: retq
11 %val = trunc i8 %a to i1
12 %r = zext i1 %val to i64
1413 ret i64 %r
1514 }
1615
17 define i64 @test_sext_i8(i8 %val) {
18 ; X64-LABEL: test_sext_i8:
19 ; X64: # %bb.0:
20 ; X64-NEXT: # kill: def $edi killed $edi def $rdi
21 ; X64-NEXT: movq $56, %rcx
22 ; X64-NEXT: # kill: def $cl killed $rcx
23 ; X64-NEXT: shlq %cl, %rdi
24 ; X64-NEXT: movq $56, %rcx
25 ; X64-NEXT: # kill: def $cl killed $rcx
26 ; X64-NEXT: sarq %cl, %rdi
27 ; X64-NEXT: movq %rdi, %rax
28 ; X64-NEXT: retq
29 %r = sext i8 %val to i64
30 ret i64 %r
31 }
32
33 define i64 @test_sext_i16(i16 %val) {
34 ; X64-LABEL: test_sext_i16:
35 ; X64: # %bb.0:
36 ; X64-NEXT: # kill: def $edi killed $edi def $rdi
37 ; X64-NEXT: movq $48, %rcx
38 ; X64-NEXT: # kill: def $cl killed $rcx
39 ; X64-NEXT: shlq %cl, %rdi
40 ; X64-NEXT: movq $48, %rcx
41 ; X64-NEXT: # kill: def $cl killed $rcx
42 ; X64-NEXT: sarq %cl, %rdi
43 ; X64-NEXT: movq %rdi, %rax
44 ; X64-NEXT: retq
45 %r = sext i16 %val to i64
46 ret i64 %r
16 define i64 @test_sext_i8(i8 %val) {
17 ; X64-LABEL: test_sext_i8:
18 ; X64: # %bb.0:
19 ; X64-NEXT: movl %edi, %eax
20 ; X64-NEXT: movq $56, %rcx
21 ; X64-NEXT: # kill: def $cl killed $rcx
22 ; X64-NEXT: shlq %cl, %rax
23 ; X64-NEXT: movq $56, %rcx
24 ; X64-NEXT: # kill: def $cl killed $rcx
25 ; X64-NEXT: sarq %cl, %rax
26 ; X64-NEXT: retq
27 %r = sext i8 %val to i64
28 ret i64 %r
29 }
30
31 define i64 @test_sext_i16(i16 %val) {
32 ; X64-LABEL: test_sext_i16:
33 ; X64: # %bb.0:
34 ; X64-NEXT: movl %edi, %eax
35 ; X64-NEXT: movq $48, %rcx
36 ; X64-NEXT: # kill: def $cl killed $rcx
37 ; X64-NEXT: shlq %cl, %rax
38 ; X64-NEXT: movq $48, %rcx
39 ; X64-NEXT: # kill: def $cl killed $rcx
40 ; X64-NEXT: sarq %cl, %rax
41 ; X64-NEXT: retq
42 %r = sext i16 %val to i64
43 ret i64 %r
4744 }
4845
4946 ; TODO enable after selection supported
11 ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
22 ; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
33
4 define i8 @test_zext_i1toi8(i32 %a) {
5 ; X64-LABEL: test_zext_i1toi8:
6 ; X64: # %bb.0:
7 ; X64-NEXT: andb $1, %dil
8 ; X64-NEXT: movl %edi, %eax
9 ; X64-NEXT: retq
10 ;
11 ; X32-LABEL: test_zext_i1toi8:
4 define i8 @test_zext_i1toi8(i32 %a) {
5 ; X64-LABEL: test_zext_i1toi8:
6 ; X64: # %bb.0:
7 ; X64-NEXT: movl %edi, %eax
8 ; X64-NEXT: andb $1, %al
9 ; X64-NEXT: # kill: def $al killed $al killed $eax
10 ; X64-NEXT: retq
11 ;
12 ; X32-LABEL: test_zext_i1toi8:
1213 ; X32: # %bb.0:
1314 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
1415 ; X32-NEXT: andb $1, %al
1920 ret i8 %r
2021 }
2122
22 define i16 @test_zext_i1toi16(i32 %a) {
23 ; X64-LABEL: test_zext_i1toi16:
24 ; X64: # %bb.0:
25 ; X64-NEXT: andw $1, %di
26 ; X64-NEXT: movl %edi, %eax
27 ; X64-NEXT: retq
28 ;
29 ; X32-LABEL: test_zext_i1toi16:
23 define i16 @test_zext_i1toi16(i32 %a) {
24 ; X64-LABEL: test_zext_i1toi16:
25 ; X64: # %bb.0:
26 ; X64-NEXT: movl %edi, %eax
27 ; X64-NEXT: andw $1, %ax
28 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
29 ; X64-NEXT: retq
30 ;
31 ; X32-LABEL: test_zext_i1toi16:
3032 ; X32: # %bb.0:
3133 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
3234 ; X32-NEXT: andw $1, %ax
3739 ret i16 %r
3840 }
3941
40 define i32 @test_zext_i1(i32 %a) {
41 ; X64-LABEL: test_zext_i1:
42 ; X64: # %bb.0:
43 ; X64-NEXT: andl $1, %edi
44 ; X64-NEXT: movl %edi, %eax
45 ; X64-NEXT: retq
46 ;
47 ; X32-LABEL: test_zext_i1:
42 define i32 @test_zext_i1(i32 %a) {
43 ; X64-LABEL: test_zext_i1:
44 ; X64: # %bb.0:
45 ; X64-NEXT: movl %edi, %eax
46 ; X64-NEXT: andl $1, %eax
47 ; X64-NEXT: retq
48 ;
49 ; X32-LABEL: test_zext_i1:
4850 ; X32: # %bb.0:
4951 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
5052 ; X32-NEXT: andl $1, %eax
8284 ret i32 %r
8385 }
8486
85 define i32 @test_sext_i8(i8 %val) {
86 ; X64-LABEL: test_sext_i8:
87 ; X64: # %bb.0:
88 ; X64-NEXT: movl $24, %ecx
89 ; X64-NEXT: # kill: def $cl killed $ecx
90 ; X64-NEXT: shll %cl, %edi
91 ; X64-NEXT: movl $24, %ecx
92 ; X64-NEXT: # kill: def $cl killed $ecx
93 ; X64-NEXT: sarl %cl, %edi
94 ; X64-NEXT: movl %edi, %eax
95 ; X64-NEXT: retq
96 ;
97 ; X32-LABEL: test_sext_i8:
87 define i32 @test_sext_i8(i8 %val) {
88 ; X64-LABEL: test_sext_i8:
89 ; X64: # %bb.0:
90 ; X64-NEXT: movl %edi, %eax
91 ; X64-NEXT: movl $24, %ecx
92 ; X64-NEXT: # kill: def $cl killed $ecx
93 ; X64-NEXT: shll %cl, %eax
94 ; X64-NEXT: movl $24, %ecx
95 ; X64-NEXT: # kill: def $cl killed $ecx
96 ; X64-NEXT: sarl %cl, %eax
97 ; X64-NEXT: retq
98 ;
99 ; X32-LABEL: test_sext_i8:
98100 ; X32: # %bb.0:
99101 ; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
100102 ; X32-NEXT: retl
102104 ret i32 %r
103105 }
104106
105 define i32 @test_sext_i16(i16 %val) {
106 ; X64-LABEL: test_sext_i16:
107 ; X64: # %bb.0:
108 ; X64-NEXT: movl $16, %ecx
109 ; X64-NEXT: # kill: def $cl killed $ecx
110 ; X64-NEXT: shll %cl, %edi
111 ; X64-NEXT: movl $16, %ecx
112 ; X64-NEXT: # kill: def $cl killed $ecx
113 ; X64-NEXT: sarl %cl, %edi
114 ; X64-NEXT: movl %edi, %eax
115 ; X64-NEXT: retq
116 ;
117 ; X32-LABEL: test_sext_i16:
107 define i32 @test_sext_i16(i16 %val) {
108 ; X64-LABEL: test_sext_i16:
109 ; X64: # %bb.0:
110 ; X64-NEXT: movl %edi, %eax
111 ; X64-NEXT: movl $16, %ecx
112 ; X64-NEXT: # kill: def $cl killed $ecx
113 ; X64-NEXT: shll %cl, %eax
114 ; X64-NEXT: movl $16, %ecx
115 ; X64-NEXT: # kill: def $cl killed $ecx
116 ; X64-NEXT: sarl %cl, %eax
117 ; X64-NEXT: retq
118 ;
119 ; X32-LABEL: test_sext_i16:
118120 ; X32: # %bb.0:
119121 ; X32-NEXT: movswl {{[0-9]+}}(%esp), %eax
120122 ; X32-NEXT: retl
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
11 ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
22
3 define i64 @test_lshr_i64(i64 %arg1, i64 %arg2) {
4 ; X64-LABEL: test_lshr_i64:
5 ; X64: # %bb.0:
6 ; X64-NEXT: movq %rsi, %rcx
7 ; X64-NEXT: # kill: def $cl killed $rcx
8 ; X64-NEXT: shrq %cl, %rdi
9 ; X64-NEXT: movq %rdi, %rax
10 ; X64-NEXT: retq
11 %res = lshr i64 %arg1, %arg2
12 ret i64 %res
13 }
14
15 define i64 @test_lshr_i64_imm(i64 %arg1) {
16 ; X64-LABEL: test_lshr_i64_imm:
17 ; X64: # %bb.0:
18 ; X64-NEXT: movq $5, %rcx
19 ; X64-NEXT: # kill: def $cl killed $rcx
20 ; X64-NEXT: shrq %cl, %rdi
21 ; X64-NEXT: movq %rdi, %rax
22 ; X64-NEXT: retq
23 %res = lshr i64 %arg1, 5
24 ret i64 %res
25 }
26
27 define i64 @test_lshr_i64_imm1(i64 %arg1) {
28 ; X64-LABEL: test_lshr_i64_imm1:
29 ; X64: # %bb.0:
30 ; X64-NEXT: movq $1, %rcx
31 ; X64-NEXT: # kill: def $cl killed $rcx
32 ; X64-NEXT: shrq %cl, %rdi
33 ; X64-NEXT: movq %rdi, %rax
34 ; X64-NEXT: retq
35 %res = lshr i64 %arg1, 1
36 ret i64 %res
37 }
38
39 define i32 @test_lshr_i32(i32 %arg1, i32 %arg2) {
40 ; X64-LABEL: test_lshr_i32:
41 ; X64: # %bb.0:
42 ; X64-NEXT: movl %esi, %ecx
43 ; X64-NEXT: # kill: def $cl killed $ecx
44 ; X64-NEXT: shrl %cl, %edi
45 ; X64-NEXT: movl %edi, %eax
46 ; X64-NEXT: retq
47 %res = lshr i32 %arg1, %arg2
48 ret i32 %res
49 }
50
51 define i32 @test_lshr_i32_imm(i32 %arg1) {
52 ; X64-LABEL: test_lshr_i32_imm:
53 ; X64: # %bb.0:
54 ; X64-NEXT: movl $5, %ecx
55 ; X64-NEXT: # kill: def $cl killed $ecx
56 ; X64-NEXT: shrl %cl, %edi
57 ; X64-NEXT: movl %edi, %eax
58 ; X64-NEXT: retq
59 %res = lshr i32 %arg1, 5
60 ret i32 %res
61 }
62
63 define i32 @test_lshr_i32_imm1(i32 %arg1) {
64 ; X64-LABEL: test_lshr_i32_imm1:
65 ; X64: # %bb.0:
66 ; X64-NEXT: movl $1, %ecx
67 ; X64-NEXT: # kill: def $cl killed $ecx
68 ; X64-NEXT: shrl %cl, %edi
69 ; X64-NEXT: movl %edi, %eax
70 ; X64-NEXT: retq
71 %res = lshr i32 %arg1, 1
72 ret i32 %res
73 }
74
75 define i16 @test_lshr_i16(i32 %arg1, i32 %arg2) {
76 ; X64-LABEL: test_lshr_i16:
77 ; X64: # %bb.0:
78 ; X64-NEXT: movl %esi, %ecx
79 ; X64-NEXT: # kill: def $cl killed $cx
80 ; X64-NEXT: shrw %cl, %di
81 ; X64-NEXT: movl %edi, %eax
82 ; X64-NEXT: retq
83 %a = trunc i32 %arg1 to i16
84 %a2 = trunc i32 %arg2 to i16
3 define i64 @test_lshr_i64(i64 %arg1, i64 %arg2) {
4 ; X64-LABEL: test_lshr_i64:
5 ; X64: # %bb.0:
6 ; X64-NEXT: movq %rdi, %rax
7 ; X64-NEXT: movq %rsi, %rcx
8 ; X64-NEXT: # kill: def $cl killed $rcx
9 ; X64-NEXT: shrq %cl, %rax
10 ; X64-NEXT: retq
11 %res = lshr i64 %arg1, %arg2
12 ret i64 %res
13 }
14
15 define i64 @test_lshr_i64_imm(i64 %arg1) {
16 ; X64-LABEL: test_lshr_i64_imm:
17 ; X64: # %bb.0:
18 ; X64-NEXT: movq %rdi, %rax
19 ; X64-NEXT: movq $5, %rcx
20 ; X64-NEXT: # kill: def $cl killed $rcx
21 ; X64-NEXT: shrq %cl, %rax
22 ; X64-NEXT: retq
23 %res = lshr i64 %arg1, 5
24 ret i64 %res
25 }
26
27 define i64 @test_lshr_i64_imm1(i64 %arg1) {
28 ; X64-LABEL: test_lshr_i64_imm1:
29 ; X64: # %bb.0:
30 ; X64-NEXT: movq %rdi, %rax
31 ; X64-NEXT: movq $1, %rcx
32 ; X64-NEXT: # kill: def $cl killed $rcx
33 ; X64-NEXT: shrq %cl, %rax
34 ; X64-NEXT: retq
35 %res = lshr i64 %arg1, 1
36 ret i64 %res
37 }
38
39 define i32 @test_lshr_i32(i32 %arg1, i32 %arg2) {
40 ; X64-LABEL: test_lshr_i32:
41 ; X64: # %bb.0:
42 ; X64-NEXT: movl %edi, %eax
43 ; X64-NEXT: movl %esi, %ecx
44 ; X64-NEXT: # kill: def $cl killed $ecx
45 ; X64-NEXT: shrl %cl, %eax
46 ; X64-NEXT: retq
47 %res = lshr i32 %arg1, %arg2
48 ret i32 %res
49 }
50
51 define i32 @test_lshr_i32_imm(i32 %arg1) {
52 ; X64-LABEL: test_lshr_i32_imm:
53 ; X64: # %bb.0:
54 ; X64-NEXT: movl %edi, %eax
55 ; X64-NEXT: movl $5, %ecx
56 ; X64-NEXT: # kill: def $cl killed $ecx
57 ; X64-NEXT: shrl %cl, %eax
58 ; X64-NEXT: retq
59 %res = lshr i32 %arg1, 5
60 ret i32 %res
61 }
62
63 define i32 @test_lshr_i32_imm1(i32 %arg1) {
64 ; X64-LABEL: test_lshr_i32_imm1:
65 ; X64: # %bb.0:
66 ; X64-NEXT: movl %edi, %eax
67 ; X64-NEXT: movl $1, %ecx
68 ; X64-NEXT: # kill: def $cl killed $ecx
69 ; X64-NEXT: shrl %cl, %eax
70 ; X64-NEXT: retq
71 %res = lshr i32 %arg1, 1
72 ret i32 %res
73 }
74
75 define i16 @test_lshr_i16(i32 %arg1, i32 %arg2) {
76 ; X64-LABEL: test_lshr_i16:
77 ; X64: # %bb.0:
78 ; X64-NEXT: movl %edi, %eax
79 ; X64-NEXT: movl %esi, %ecx
80 ; X64-NEXT: # kill: def $cx killed $cx killed $ecx
81 ; X64-NEXT: # kill: def $cl killed $cx
82 ; X64-NEXT: shrw %cl, %ax
83 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
84 ; X64-NEXT: retq
85 %a = trunc i32 %arg1 to i16
86 %a2 = trunc i32 %arg2 to i16
8587 %res = lshr i16 %a, %a2
8688 ret i16 %res
8789 }
8890
89 define i16 @test_lshr_i16_imm(i32 %arg1) {
90 ; X64-LABEL: test_lshr_i16_imm:
91 ; X64: # %bb.0:
92 ; X64-NEXT: movw $5, %cx
93 ; X64-NEXT: # kill: def $cl killed $cx
94 ; X64-NEXT: shrw %cl, %di
95 ; X64-NEXT: movl %edi, %eax
96 ; X64-NEXT: retq
97 %a = trunc i32 %arg1 to i16
98 %res = lshr i16 %a, 5
91 define i16 @test_lshr_i16_imm(i32 %arg1) {
92 ; X64-LABEL: test_lshr_i16_imm:
93 ; X64: # %bb.0:
94 ; X64-NEXT: movl %edi, %eax
95 ; X64-NEXT: movw $5, %cx
96 ; X64-NEXT: # kill: def $cl killed $cx
97 ; X64-NEXT: shrw %cl, %ax
98 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
99 ; X64-NEXT: retq
100 %a = trunc i32 %arg1 to i16
101 %res = lshr i16 %a, 5
99102 ret i16 %res
100103 }
101104
102 define i16 @test_lshr_i16_imm1(i32 %arg1) {
103 ; X64-LABEL: test_lshr_i16_imm1:
104 ; X64: # %bb.0:
105 ; X64-NEXT: movw $1, %cx
106 ; X64-NEXT: # kill: def $cl killed $cx
107 ; X64-NEXT: shrw %cl, %di
108 ; X64-NEXT: movl %edi, %eax
109 ; X64-NEXT: retq
110 %a = trunc i32 %arg1 to i16
111 %res = lshr i16 %a, 1
105 define i16 @test_lshr_i16_imm1(i32 %arg1) {
106 ; X64-LABEL: test_lshr_i16_imm1:
107 ; X64: # %bb.0:
108 ; X64-NEXT: movl %edi, %eax
109 ; X64-NEXT: movw $1, %cx
110 ; X64-NEXT: # kill: def $cl killed $cx
111 ; X64-NEXT: shrw %cl, %ax
112 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
113 ; X64-NEXT: retq
114 %a = trunc i32 %arg1 to i16
115 %res = lshr i16 %a, 1
112116 ret i16 %res
113117 }
114118
115 define i8 @test_lshr_i8(i32 %arg1, i32 %arg2) {
116 ; X64-LABEL: test_lshr_i8:
117 ; X64: # %bb.0:
118 ; X64-NEXT: movl %esi, %ecx
119 ; X64-NEXT: shrb %cl, %dil
120 ; X64-NEXT: movl %edi, %eax
121 ; X64-NEXT: retq
122 %a = trunc i32 %arg1 to i8
123 %a2 = trunc i32 %arg2 to i8
119 define i8 @test_lshr_i8(i32 %arg1, i32 %arg2) {
120 ; X64-LABEL: test_lshr_i8:
121 ; X64: # %bb.0:
122 ; X64-NEXT: movl %edi, %eax
123 ; X64-NEXT: movl %esi, %ecx
124 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
125 ; X64-NEXT: shrb %cl, %al
126 ; X64-NEXT: # kill: def $al killed $al killed $eax
127 ; X64-NEXT: retq
128 %a = trunc i32 %arg1 to i8
129 %a2 = trunc i32 %arg2 to i8
124130 %res = lshr i8 %a, %a2
125131 ret i8 %res
126132 }
127133
128 define i8 @test_lshr_i8_imm(i32 %arg1) {
129 ; X64-LABEL: test_lshr_i8_imm:
130 ; X64: # %bb.0:
131 ; X64-NEXT: shrb $5, %dil
132 ; X64-NEXT: movl %edi, %eax
133 ; X64-NEXT: retq
134 %a = trunc i32 %arg1 to i8
135 %res = lshr i8 %a, 5
134 define i8 @test_lshr_i8_imm(i32 %arg1) {
135 ; X64-LABEL: test_lshr_i8_imm:
136 ; X64: # %bb.0:
137 ; X64-NEXT: movl %edi, %eax
138 ; X64-NEXT: shrb $5, %al
139 ; X64-NEXT: # kill: def $al killed $al killed $eax
140 ; X64-NEXT: retq
141 %a = trunc i32 %arg1 to i8
142 %res = lshr i8 %a, 5
136143 ret i8 %res
137144 }
138145
139 define i8 @test_lshr_i8_imm1(i32 %arg1) {
140 ; X64-LABEL: test_lshr_i8_imm1:
141 ; X64: # %bb.0:
142 ; X64-NEXT: shrb %dil
143 ; X64-NEXT: movl %edi, %eax
144 ; X64-NEXT: retq
145 %a = trunc i32 %arg1 to i8
146 %res = lshr i8 %a, 1
146 define i8 @test_lshr_i8_imm1(i32 %arg1) {
147 ; X64-LABEL: test_lshr_i8_imm1:
148 ; X64: # %bb.0:
149 ; X64-NEXT: movl %edi, %eax
150 ; X64-NEXT: shrb %al
151 ; X64-NEXT: # kill: def $al killed $al killed $eax
152 ; X64-NEXT: retq
153 %a = trunc i32 %arg1 to i8
154 %res = lshr i8 %a, 1
147155 ret i8 %res
148156 }
149157
150 define i1 @test_lshr_i1(i32 %arg1, i32 %arg2) {
151 ; X64-LABEL: test_lshr_i1:
152 ; X64: # %bb.0:
153 ; X64-NEXT: andb $1, %dil
154 ; X64-NEXT: andb $1, %sil
155 ; X64-NEXT: movl %esi, %ecx
156 ; X64-NEXT: shrb %cl, %dil
157 ; X64-NEXT: movl %edi, %eax
158 ; X64-NEXT: retq
159 %a = trunc i32 %arg1 to i1
160 %a2 = trunc i32 %arg2 to i1
158 define i1 @test_lshr_i1(i32 %arg1, i32 %arg2) {
159 ; X64-LABEL: test_lshr_i1:
160 ; X64: # %bb.0:
161 ; X64-NEXT: movl %edi, %eax
162 ; X64-NEXT: movl %esi, %ecx
163 ; X64-NEXT: andb $1, %al
164 ; X64-NEXT: andb $1, %cl
165 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
166 ; X64-NEXT: shrb %cl, %al
167 ; X64-NEXT: # kill: def $al killed $al killed $eax
168 ; X64-NEXT: retq
169 %a = trunc i32 %arg1 to i1
170 %a2 = trunc i32 %arg2 to i1
161171 %res = lshr i1 %a, %a2
162172 ret i1 %res
163173 }
164174
165 define i1 @test_lshr_i1_imm1(i32 %arg1) {
166 ; X64-LABEL: test_lshr_i1_imm1:
167 ; X64: # %bb.0:
168 ; X64-NEXT: movb $-1, %cl
169 ; X64-NEXT: andb $1, %dil
170 ; X64-NEXT: andb $1, %cl
171 ; X64-NEXT: shrb %cl, %dil
172 ; X64-NEXT: movl %edi, %eax
173 ; X64-NEXT: retq
174 %a = trunc i32 %arg1 to i1
175 %res = lshr i1 %a, 1
175 define i1 @test_lshr_i1_imm1(i32 %arg1) {
176 ; X64-LABEL: test_lshr_i1_imm1:
177 ; X64: # %bb.0:
178 ; X64-NEXT: movl %edi, %eax
179 ; X64-NEXT: movb $-1, %cl
180 ; X64-NEXT: andb $1, %al
181 ; X64-NEXT: andb $1, %cl
182 ; X64-NEXT: shrb %cl, %al
183 ; X64-NEXT: # kill: def $al killed $al killed $eax
184 ; X64-NEXT: retq
185 %a = trunc i32 %arg1 to i1
186 %res = lshr i1 %a, 1
176187 ret i1 %res
177188 }
7878 ret double %r
7979 }
8080
81 define i1 * @test_store_i1(i1 %val, i1 * %p1) {
82 ; ALL-LABEL: test_store_i1:
83 ; ALL: # %bb.0:
84 ; ALL-NEXT: andb $1, %dil
85 ; ALL-NEXT: movb %dil, (%rsi)
86 ; ALL-NEXT: movq %rsi, %rax
87 ; ALL-NEXT: retq
88 store i1 %val, i1* %p1
89 ret i1 * %p1;
90 }
91
92 define i32 * @test_store_i32(i32 %val, i32 * %p1) {
93 ; ALL-LABEL: test_store_i32:
94 ; ALL: # %bb.0:
95 ; ALL-NEXT: movl %edi, (%rsi)
96 ; ALL-NEXT: movq %rsi, %rax
97 ; ALL-NEXT: retq
98 store i32 %val, i32* %p1
99 ret i32 * %p1;
100 }
101
102 define i64 * @test_store_i64(i64 %val, i64 * %p1) {
103 ; ALL-LABEL: test_store_i64:
104 ; ALL: # %bb.0:
105 ; ALL-NEXT: movq %rdi, (%rsi)
106 ; ALL-NEXT: movq %rsi, %rax
107 ; ALL-NEXT: retq
108 store i64 %val, i64* %p1
109 ret i64 * %p1;
81 define i1 * @test_store_i1(i1 %val, i1 * %p1) {
82 ; ALL-LABEL: test_store_i1:
83 ; ALL: # %bb.0:
84 ; ALL-NEXT: movq %rsi, %rax
85 ; ALL-NEXT: andb $1, %dil
86 ; ALL-NEXT: movb %dil, (%rsi)
87 ; ALL-NEXT: retq
88 store i1 %val, i1* %p1
89 ret i1 * %p1;
90 }
91
92 define i32 * @test_store_i32(i32 %val, i32 * %p1) {
93 ; ALL-LABEL: test_store_i32:
94 ; ALL: # %bb.0:
95 ; ALL-NEXT: movq %rsi, %rax
96 ; ALL-NEXT: movl %edi, (%rsi)
97 ; ALL-NEXT: retq
98 store i32 %val, i32* %p1
99 ret i32 * %p1;
100 }
101
102 define i64 * @test_store_i64(i64 %val, i64 * %p1) {
103 ; ALL-LABEL: test_store_i64:
104 ; ALL: # %bb.0:
105 ; ALL-NEXT: movq %rsi, %rax
106 ; ALL-NEXT: movq %rdi, (%rsi)
107 ; ALL-NEXT: retq
108 store i64 %val, i64* %p1
109 ret i64 * %p1;
110110 }
111111
112112 define float * @test_store_float(float %val, float * %p1) {
113 ;
114 ; SSE_FAST-LABEL: test_store_float:
115 ; SSE_FAST: # %bb.0:
116 ; SSE_FAST-NEXT: movd %xmm0, %eax
117 ; SSE_FAST-NEXT: movl %eax, (%rdi)
118 ; SSE_FAST-NEXT: movq %rdi, %rax
119 ; SSE_FAST-NEXT: retq
120 ;
121 ; SSE_GREEDY-LABEL: test_store_float:
122 ; SSE_GREEDY: # %bb.0:
123 ; SSE_GREEDY-NEXT: movss %xmm0, (%rdi)
124 ; SSE_GREEDY-NEXT: movq %rdi, %rax
125 ; SSE_GREEDY-NEXT: retq
126 store float %val, float* %p1
127 ret float * %p1;
113 ;
114 ; SSE_FAST-LABEL: test_store_float:
115 ; SSE_FAST: # %bb.0:
116 ; SSE_FAST-NEXT: movq %rdi, %rax
117 ; SSE_FAST-NEXT: movd %xmm0, %ecx
118 ; SSE_FAST-NEXT: movl %ecx, (%rdi)
119 ; SSE_FAST-NEXT: retq
120 ;
121 ; SSE_GREEDY-LABEL: test_store_float:
122 ; SSE_GREEDY: # %bb.0:
123 ; SSE_GREEDY-NEXT: movq %rdi, %rax
124 ; SSE_GREEDY-NEXT: movss %xmm0, (%rdi)
125 ; SSE_GREEDY-NEXT: retq
126 store float %val, float* %p1
127 ret float * %p1;
128128 }
129129
130130 define double * @test_store_double(double %val, double * %p1) {
131 ;
132 ; SSE_FAST-LABEL: test_store_double:
133 ; SSE_FAST: # %bb.0:
134 ; SSE_FAST-NEXT: movq %xmm0, %rax
135 ; SSE_FAST-NEXT: movq %rax, (%rdi)
136 ; SSE_FAST-NEXT: movq %rdi, %rax
137 ; SSE_FAST-NEXT: retq
138 ;
139 ; SSE_GREEDY-LABEL: test_store_double:
140 ; SSE_GREEDY: # %bb.0:
141 ; SSE_GREEDY-NEXT: movsd %xmm0, (%rdi)
142 ; SSE_GREEDY-NEXT: movq %rdi, %rax
143 ; SSE_GREEDY-NEXT: retq
144 store double %val, double* %p1
145 ret double * %p1;
131 ;
132 ; SSE_FAST-LABEL: test_store_double:
133 ; SSE_FAST: # %bb.0:
134 ; SSE_FAST-NEXT: movq %rdi, %rax
135 ; SSE_FAST-NEXT: movq %xmm0, %rcx
136 ; SSE_FAST-NEXT: movq %rcx, (%rdi)
137 ; SSE_FAST-NEXT: retq
138 ;
139 ; SSE_GREEDY-LABEL: test_store_double:
140 ; SSE_GREEDY: # %bb.0:
141 ; SSE_GREEDY-NEXT: movq %rdi, %rax
142 ; SSE_GREEDY-NEXT: movsd %xmm0, (%rdi)
143 ; SSE_GREEDY-NEXT: retq
144 store double %val, double* %p1
145 ret double * %p1;
146146 }
147147
148148 define i32* @test_load_ptr(i32** %ptr1) {
44 ;define i8 @test_mul_i8(i8 %arg1, i8 %arg2) {
55 ; %ret = mul i8 %arg1, %arg2
66 ; ret i8 %ret
7 ;}
7 ;}
8
9 define i16 @test_mul_i16(i16 %arg1, i16 %arg2) {
10 ; ALL-LABEL: test_mul_i16:
11 ; ALL: # %bb.0:
12 ; ALL-NEXT: movl %esi, %eax
13 ; ALL-NEXT: imulw %di, %ax
14 ; ALL-NEXT: # kill: def $ax killed $ax killed $eax
15 ; ALL-NEXT: retq
16 %ret = mul i16 %arg1, %arg2
17 ret i16 %ret
18 }
19
20 define i32 @test_mul_i32(i32 %arg1, i32 %arg2) {
21 ; ALL-LABEL: test_mul_i32:
22 ; ALL: # %bb.0:
23 ; ALL-NEXT: movl %esi, %eax
24 ; ALL-NEXT: imull %edi, %eax
25 ; ALL-NEXT: retq
26 %ret = mul i32 %arg1, %arg2
27 ret i32 %ret
28 }
29
30 define i64 @test_mul_i64(i64 %arg1, i64 %arg2) {
31 ; ALL-LABEL: test_mul_i64:
32 ; ALL: # %bb.0:
33 ; ALL-NEXT: movq %rsi, %rax
34 ; ALL-NEXT: imulq %rdi, %rax
35 ; ALL-NEXT: retq
36 %ret = mul i64 %arg1, %arg2
37 ret i64 %ret
38 }
839
9 define i16 @test_mul_i16(i16 %arg1, i16 %arg2) {
10 ; X64-LABEL: test_mul_i16:
11 ; X64: # %bb.0:
12 ; X64-NEXT: imulw %di, %si
13 ; X64-NEXT: movl %esi, %eax
14 ; X64-NEXT: retq
15 %ret = mul i16 %arg1, %arg2
16 ret i16 %ret
17 }
18
19 define i32 @test_mul_i32(i32 %arg1, i32 %arg2) {
20 ; X64-LABEL: test_mul_i32:
21 ; X64: # %bb.0:
22 ; X64-NEXT: imull %edi, %esi
23 ; X64-NEXT: movl %esi, %eax
24 ; X64-NEXT: retq
25 %ret = mul i32 %arg1, %arg2
26 ret i32 %ret
27 }
28
29 define i64 @test_mul_i64(i64 %arg1, i64 %arg2) {
30 ; X64-LABEL: test_mul_i64:
31 ; X64: # %bb.0:
32 ; X64-NEXT: imulq %rdi, %rsi
33 ; X64-NEXT: movq %rsi, %rax
34 ; X64-NEXT: retq
35 %ret = mul i64 %arg1, %arg2
36 ret i64 %ret
37 }
38
1515 ret i32 %ret
1616 }
1717
18 define i8 @test_or_i8(i8 %arg1, i8 %arg2) {
19 ; ALL-LABEL: test_or_i8:
20 ; ALL: # %bb.0:
21 ; ALL-NEXT: orb %dil, %sil
22 ; ALL-NEXT: movl %esi, %eax
23 ; ALL-NEXT: retq
24 %ret = or i8 %arg1, %arg2
25 ret i8 %ret
18 define i8 @test_or_i8(i8 %arg1, i8 %arg2) {
19 ; ALL-LABEL: test_or_i8:
20 ; ALL: # %bb.0:
21 ; ALL-NEXT: movl %esi, %eax
22 ; ALL-NEXT: orb %dil, %al
23 ; ALL-NEXT: # kill: def $al killed $al killed $eax
24 ; ALL-NEXT: retq
25 %ret = or i8 %arg1, %arg2
26 ret i8 %ret
27 }
28
29 define i16 @test_or_i16(i16 %arg1, i16 %arg2) {
30 ; ALL-LABEL: test_or_i16:
31 ; ALL: # %bb.0:
32 ; ALL-NEXT: movl %esi, %eax
33 ; ALL-NEXT: orw %di, %ax
34 ; ALL-NEXT: # kill: def $ax killed $ax killed $eax
35 ; ALL-NEXT: retq
36 %ret = or i16 %arg1, %arg2
37 ret i16 %ret
38 }
39
40 define i32 @test_or_i32(i32 %arg1, i32 %arg2) {
41 ; ALL-LABEL: test_or_i32:
42 ; ALL: # %bb.0:
43 ; ALL-NEXT: movl %esi, %eax
44 ; ALL-NEXT: orl %edi, %eax
45 ; ALL-NEXT: retq
46 %ret = or i32 %arg1, %arg2
47 ret i32 %ret
48 }
49
50 define i64 @test_or_i64(i64 %arg1, i64 %arg2) {
51 ; ALL-LABEL: test_or_i64:
52 ; ALL: # %bb.0:
53 ; ALL-NEXT: movq %rsi, %rax
54 ; ALL-NEXT: orq %rdi, %rax
55 ; ALL-NEXT: retq
56 %ret = or i64 %arg1, %arg2
57 ret i64 %ret
2658 }
2759
28 define i16 @test_or_i16(i16 %arg1, i16 %arg2) {
29 ; ALL-LABEL: test_or_i16:
30 ; ALL: # %bb.0:
31 ; ALL-NEXT: orw %di, %si
32 ; ALL-NEXT: movl %esi, %eax
33 ; ALL-NEXT: retq
34 %ret = or i16 %arg1, %arg2
35 ret i16 %ret
36 }
37
38 define i32 @test_or_i32(i32 %arg1, i32 %arg2) {
39 ; ALL-LABEL: test_or_i32:
40 ; ALL: # %bb.0:
41 ; ALL-NEXT: orl %edi, %esi
42 ; ALL-NEXT: movl %esi, %eax
43 ; ALL-NEXT: retq
44 %ret = or i32 %arg1, %arg2
45 ret i32 %ret
46 }
47
48 define i64 @test_or_i64(i64 %arg1, i64 %arg2) {
49 ; ALL-LABEL: test_or_i64:
50 ; ALL: # %bb.0:
51 ; ALL-NEXT: orq %rdi, %rsi
52 ; ALL-NEXT: movq %rsi, %rax
53 ; ALL-NEXT: retq
54 %ret = or i64 %arg1, %arg2
55 ret i64 %ret
56 }
57
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
11 ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL
22
3 define i8 @test_i8(i32 %a, i8 %f, i8 %t) {
4 ; ALL-LABEL: test_i8:
5 ; ALL: # %bb.0: # %entry
6 ; ALL-NEXT: xorl %eax, %eax
7 ; ALL-NEXT: cmpl %eax, %edi
8 ; ALL-NEXT: setg %al
9 ; ALL-NEXT: testb $1, %al
10 ; ALL-NEXT: jne .LBB0_2
11 ; ALL-NEXT: # %bb.1: # %cond.false
12 ; ALL-NEXT: movl %edx, %esi
13 ; ALL-NEXT: .LBB0_2: # %cond.end
14 ; ALL-NEXT: movl %esi, %eax
15 ; ALL-NEXT: retq
16 entry:
17 %cmp = icmp sgt i32 %a, 0
3 define i8 @test_i8(i32 %a, i8 %f, i8 %t) {
4 ; ALL-LABEL: test_i8:
5 ; ALL: # %bb.0: # %entry
6 ; ALL-NEXT: xorl %ecx, %ecx
7 ; ALL-NEXT: cmpl %ecx, %edi
8 ; ALL-NEXT: setg %cl
9 ; ALL-NEXT: testb $1, %cl
10 ; ALL-NEXT: je .LBB0_2
11 ; ALL-NEXT: # %bb.1:
12 ; ALL-NEXT: movl %esi, %eax
13 ; ALL-NEXT: # kill: def $al killed $al killed $eax
14 ; ALL-NEXT: retq
15 ; ALL-NEXT: .LBB0_2: # %cond.false
16 ; ALL-NEXT: movl %edx, %eax
17 ; ALL-NEXT: # kill: def $al killed $al killed $eax
18 ; ALL-NEXT: retq
19 entry:
20 %cmp = icmp sgt i32 %a, 0
1821 br i1 %cmp, label %cond.true, label %cond.false
1922
2023 cond.true: ; preds = %entry
2831 ret i8 %cond
2932 }
3033
31 define i16 @test_i16(i32 %a, i16 %f, i16 %t) {
32 ; ALL-LABEL: test_i16:
33 ; ALL: # %bb.0: # %entry
34 ; ALL-NEXT: xorl %eax, %eax
35 ; ALL-NEXT: cmpl %eax, %edi
36 ; ALL-NEXT: setg %al
37 ; ALL-NEXT: testb $1, %al
38 ; ALL-NEXT: jne .LBB1_2
39 ; ALL-NEXT: # %bb.1: # %cond.false
40 ; ALL-NEXT: movl %edx, %esi
41 ; ALL-NEXT: .LBB1_2: # %cond.end
42 ; ALL-NEXT: movl %esi, %eax
43 ; ALL-NEXT: retq
44 entry:
45 %cmp = icmp sgt i32 %a, 0
34 define i16 @test_i16(i32 %a, i16 %f, i16 %t) {
35 ; ALL-LABEL: test_i16:
36 ; ALL: # %bb.0: # %entry
37 ; ALL-NEXT: xorl %ecx, %ecx
38 ; ALL-NEXT: cmpl %ecx, %edi
39 ; ALL-NEXT: setg %cl
40 ; ALL-NEXT: testb $1, %cl
41 ; ALL-NEXT: je .LBB1_2
42 ; ALL-NEXT: # %bb.1:
43 ; ALL-NEXT: movl %esi, %eax
44 ; ALL-NEXT: # kill: def $ax killed $ax killed $eax
45 ; ALL-NEXT: retq
46 ; ALL-NEXT: .LBB1_2: # %cond.false
47 ; ALL-NEXT: movl %edx, %eax
48 ; ALL-NEXT: # kill: def $ax killed $ax killed $eax
49 ; ALL-NEXT: retq
50 entry:
51 %cmp = icmp sgt i32 %a, 0
4652 br i1 %cmp, label %cond.true, label %cond.false
4753
4854 cond.true: ; preds = %entry
5662 ret i16 %cond
5763 }
5864
59 define i32 @test_i32(i32 %a, i32 %f, i32 %t) {
60 ; ALL-LABEL: test_i32:
61 ; ALL: # %bb.0: # %entry
62 ; ALL-NEXT: xorl %eax, %eax
63 ; ALL-NEXT: cmpl %eax, %edi
64 ; ALL-NEXT: setg %al
65 ; ALL-NEXT: testb $1, %al
66 ; ALL-NEXT: jne .LBB2_2
67 ; ALL-NEXT: # %bb.1: # %cond.false
68 ; ALL-NEXT: movl %edx, %esi
69 ; ALL-NEXT: .LBB2_2: # %cond.end
70 ; ALL-NEXT: movl %esi, %eax
71 ; ALL-NEXT: retq
72 entry:
73 %cmp = icmp sgt i32 %a, 0
65 define i32 @test_i32(i32 %a, i32 %f, i32 %t) {
66 ; ALL-LABEL: test_i32:
67 ; ALL: # %bb.0: # %entry
68 ; ALL-NEXT: movl %esi, %eax
69 ; ALL-NEXT: xorl %ecx, %ecx
70 ; ALL-NEXT: cmpl %ecx, %edi
71 ; ALL-NEXT: setg %cl
72 ; ALL-NEXT: testb $1, %cl
73 ; ALL-NEXT: jne .LBB2_2
74 ; ALL-NEXT: # %bb.1: # %cond.false
75 ; ALL-NEXT: movl %edx, %eax
76 ; ALL-NEXT: .LBB2_2: # %cond.end
77 ; ALL-NEXT: retq
78 entry:
79 %cmp = icmp sgt i32 %a, 0
7480 br i1 %cmp, label %cond.true, label %cond.false
7581
7682 cond.true: ; preds = %entry
8490 ret i32 %cond
8591 }
8692
87 define i64 @test_i64(i32 %a, i64 %f, i64 %t) {
88 ; ALL-LABEL: test_i64:
89 ; ALL: # %bb.0: # %entry
90 ; ALL-NEXT: xorl %eax, %eax
91 ; ALL-NEXT: cmpl %eax, %edi
92 ; ALL-NEXT: setg %al
93 ; ALL-NEXT: testb $1, %al
94 ; ALL-NEXT: jne .LBB3_2
95 ; ALL-NEXT: # %bb.1: # %cond.false
96 ; ALL-NEXT: movq %rdx, %rsi
97 ; ALL-NEXT: .LBB3_2: # %cond.end
98 ; ALL-NEXT: movq %rsi, %rax
99 ; ALL-NEXT: retq
100 entry:
101 %cmp = icmp sgt i32 %a, 0
93 define i64 @test_i64(i32 %a, i64 %f, i64 %t) {
94 ; ALL-LABEL: test_i64:
95 ; ALL: # %bb.0: # %entry
96 ; ALL-NEXT: movq %rsi, %rax
97 ; ALL-NEXT: xorl %ecx, %ecx
98 ; ALL-NEXT: cmpl %ecx, %edi
99 ; ALL-NEXT: setg %cl
100 ; ALL-NEXT: testb $1, %cl
101 ; ALL-NEXT: jne .LBB3_2
102 ; ALL-NEXT: # %bb.1: # %cond.false
103 ; ALL-NEXT: movq %rdx, %rax
104 ; ALL-NEXT: .LBB3_2: # %cond.end
105 ; ALL-NEXT: retq
106 entry:
107 %cmp = icmp sgt i32 %a, 0
102108 br i1 %cmp, label %cond.true, label %cond.false
103109
104110 cond.true: ; preds = %entry
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
11 ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
22
3 define i1 @ptrtoint_s1_p0(i64* %p) {
4 ; CHECK-LABEL: ptrtoint_s1_p0:
5 ; CHECK: # %bb.0: # %entry
6 ; CHECK-NEXT: movl %edi, %eax
7 ; CHECK-NEXT: retq
8 entry:
9 %0 = ptrtoint i64* %p to i1
3 define i1 @ptrtoint_s1_p0(i64* %p) {
4 ; CHECK-LABEL: ptrtoint_s1_p0:
5 ; CHECK: # %bb.0: # %entry
6 ; CHECK-NEXT: movq %rdi, %rax
7 ; CHECK-NEXT: # kill: def $al killed $al killed $rax
8 ; CHECK-NEXT: retq
9 entry:
10 %0 = ptrtoint i64* %p to i1
1011 ret i1 %0
1112 }
1213
13 define i8 @ptrtoint_s8_p0(i64* %p) {
14 ; CHECK-LABEL: ptrtoint_s8_p0:
15 ; CHECK: # %bb.0: # %entry
16 ; CHECK-NEXT: movl %edi, %eax
17 ; CHECK-NEXT: retq
18 entry:
19 %0 = ptrtoint i64* %p to i8
14 define i8 @ptrtoint_s8_p0(i64* %p) {
15 ; CHECK-LABEL: ptrtoint_s8_p0:
16 ; CHECK: # %bb.0: # %entry
17 ; CHECK-NEXT: movq %rdi, %rax
18 ; CHECK-NEXT: # kill: def $al killed $al killed $rax
19 ; CHECK-NEXT: retq
20 entry:
21 %0 = ptrtoint i64* %p to i8
2022 ret i8 %0
2123 }
2224
23 define i16 @ptrtoint_s16_p0(i64* %p) {
24 ; CHECK-LABEL: ptrtoint_s16_p0:
25 ; CHECK: # %bb.0: # %entry
26 ; CHECK-NEXT: movl %edi, %eax
27 ; CHECK-NEXT: retq
28 entry:
29 %0 = ptrtoint i64* %p to i16
25 define i16 @ptrtoint_s16_p0(i64* %p) {
26 ; CHECK-LABEL: ptrtoint_s16_p0:
27 ; CHECK: # %bb.0: # %entry
28 ; CHECK-NEXT: movq %rdi, %rax
29 ; CHECK-NEXT: # kill: def $ax killed $ax killed $rax
30 ; CHECK-NEXT: retq
31 entry:
32 %0 = ptrtoint i64* %p to i16
3033 ret i16 %0
3134 }
3235
33 define i32 @ptrtoint_s32_p0(i64* %p) {
34 ; CHECK-LABEL: ptrtoint_s32_p0:
35 ; CHECK: # %bb.0: # %entry
36 ; CHECK-NEXT: movl %edi, %eax
37 ; CHECK-NEXT: retq
38 entry:
39 %0 = ptrtoint i64* %p to i32
36 define i32 @ptrtoint_s32_p0(i64* %p) {
37 ; CHECK-LABEL: ptrtoint_s32_p0:
38 ; CHECK: # %bb.0: # %entry
39 ; CHECK-NEXT: movq %rdi, %rax
40 ; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
41 ; CHECK-NEXT: retq
42 entry:
43 %0 = ptrtoint i64* %p to i32
4044 ret i32 %0
4145 }
4246
None ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
1
2 define i16 @test_shl_i4(i16 %v, i16 %a, i16 %b) {
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
2
3 define i16 @test_shl_i4(i16 %v, i16 %a, i16 %b) {
34 ; Let's say the arguments are the following unsigned
45 ; integers in two’s complement representation:
56 ;
6 ; %v: 77 (0000 0000 0100 1101)
7 ; %a: 74 (0000 0000 0100 1010)
8 ; %b: 72 (0000 0000 0100 1000)
9 %v.t = trunc i16 %v to i4 ; %v.t: 13 (1101)
10 %a.t = trunc i16 %a to i4 ; %a.t: 10 (1010)
11 %b.t = trunc i16 %b to i4 ; %b.t: 8 (1000)
7 ; %v: 77 (0000 0000 0100 1101)
8 ; %a: 74 (0000 0000 0100 1010)
9 ; %b: 72 (0000 0000 0100 1000)
10 ; X64-LABEL: test_shl_i4:
11 ; X64: # %bb.0:
12 ; X64-NEXT: movl %edi, %eax
13 ; X64-NEXT: movl %edx, %ecx
14 ; X64-NEXT: addb %sil, %cl
15 ; X64-NEXT: andb $15, %cl
16 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
17 ; X64-NEXT: shlb %cl, %al
18 ; X64-NEXT: andw $15, %ax
19 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
20 ; X64-NEXT: retq
21 %v.t = trunc i16 %v to i4 ; %v.t: 13 (1101)
22 %a.t = trunc i16 %a to i4 ; %a.t: 10 (1010)
23 %b.t = trunc i16 %b to i4 ; %b.t: 8 (1000)
1224 %n.t = add i4 %a.t, %b.t ; %n.t: 2 (0010)
1325 %r.t = shl i4 %v.t, %n.t ; %r.t: 4 (0100)
1426 %r = zext i4 %r.t to i16
15 ; %r: 4 (0000 0000 0000 0100)
16 ret i16 %r
17
18 ; X64-LABEL: test_shl_i4
19 ;
20 ; %di: 77 (0000 0000 0100 1101)
21 ; %si: 74 (0000 0000 0100 1010)
22 ; %dx: 72 (0000 0000 0100 1000)
23 ;
24 ; X64: # %bb.0:
25 ;
26 ; X64-NEXT: addb %sil, %dl
27 ; %dx: 146 (0000 0000 1001 0010)
28 ;
29 ; X64-NEXT: andb $15, %dl
30 ; %dx: 2 (0000 0000 0000 0010)
31 ;
32 ; X64-NEXT: movl %edx, %ecx
33 ; %cx: 2 (0000 0000 0000 0010)
34 ;
35 ; X64-NEXT: shlb %cl, %dil
36 ; %di: 52 (0000 0000 0011 0100)
37 ;
38 ; X64-NEXT: andw $15, %di
39 ; %di: 4 (0000 0000 0000 0100)
40 ;
41 ; X64-NEXT: movl %edi, %eax
42 ; %ax: 4 (0000 0000 0000 0100)
43 ;
44 ; X64-NEXT: retq
45 ;
46 ; Let's pretend that legalizing G_SHL by widening its second
47 ; source operand is done via G_ANYEXT rather than G_ZEXT and
48 ; see what happens:
49 ;
50 ; addb %sil, %dl
51 ; %dx: 146 (0000 0000 1001 0010)
52 ;
53 ; movl %edx, %ecx
54 ; %cx: 146 (0000 0000 1001 0010)
55 ;
56 ; shlb %cl, %dil
57 ; %di: 0 (0000 0000 0000 0000)
58 ;
59 ; andw $15, %di
60 ; %di: 0 (0000 0000 0000 0000)
61 ;
62 ; movl %edi, %eax
63 ; %ax: 0 (0000 0000 0000 0000)
64 ;
65 ; retq
66 }
27 ; %r: 4 (0000 0000 0000 0100)
28 ret i16 %r
29
30 ; %di: 77 (0000 0000 0100 1101)
31 ; %si: 74 (0000 0000 0100 1010)
32 ; %dx: 72 (0000 0000 0100 1000)
33 ; %dx: 146 (0000 0000 1001 0010)
34 ; %dx: 2 (0000 0000 0000 0010)
35 ; %cx: 2 (0000 0000 0000 0010)
36 ; %di: 52 (0000 0000 0011 0100)
37 ; %di: 4 (0000 0000 0000 0100)
38 ; %ax: 4 (0000 0000 0000 0100)
39 ; Let's pretend that legalizing G_SHL by widening its second
40 ; source operand is done via G_ANYEXT rather than G_ZEXT and
41 ; see what happens:
42 ; addb %sil, %dl
43 ; %dx: 146 (0000 0000 1001 0010)
44 ; movl %edx, %ecx
45 ; %cx: 146 (0000 0000 1001 0010)
46 ; shlb %cl, %dil
47 ; %di: 0 (0000 0000 0000 0000)
48 ; andw $15, %di
49 ; %di: 0 (0000 0000 0000 0000)
50 ; movl %edi, %eax
51 ; %ax: 0 (0000 0000 0000 0000)
52 ; retq
53 }
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
11 ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
22
3 define i64 @test_shl_i64(i64 %arg1, i64 %arg2) {
4 ; X64-LABEL: test_shl_i64:
5 ; X64: # %bb.0:
6 ; X64-NEXT: movq %rsi, %rcx
7 ; X64-NEXT: # kill: def $cl killed $rcx
8 ; X64-NEXT: shlq %cl, %rdi
9 ; X64-NEXT: movq %rdi, %rax
10 ; X64-NEXT: retq
11 %res = shl i64 %arg1, %arg2
12 ret i64 %res
13 }
14
15 define i64 @test_shl_i64_imm(i64 %arg1) {
16 ; X64-LABEL: test_shl_i64_imm:
17 ; X64: # %bb.0:
18 ; X64-NEXT: movq $5, %rcx
19 ; X64-NEXT: # kill: def $cl killed $rcx
20 ; X64-NEXT: shlq %cl, %rdi
21 ; X64-NEXT: movq %rdi, %rax
22 ; X64-NEXT: retq
23 %res = shl i64 %arg1, 5
24 ret i64 %res
25 }
26
27 define i64 @test_shl_i64_imm1(i64 %arg1) {
28 ; X64-LABEL: test_shl_i64_imm1:
29 ; X64: # %bb.0:
30 ; X64-NEXT: movq $1, %rcx
31 ; X64-NEXT: # kill: def $cl killed $rcx
32 ; X64-NEXT: shlq %cl, %rdi
33 ; X64-NEXT: movq %rdi, %rax
34 ; X64-NEXT: retq
35 %res = shl i64 %arg1, 1
36 ret i64 %res
37 }
38
39 define i32 @test_shl_i32(i32 %arg1, i32 %arg2) {
40 ; X64-LABEL: test_shl_i32:
41 ; X64: # %bb.0:
42 ; X64-NEXT: movl %esi, %ecx
43 ; X64-NEXT: # kill: def $cl killed $ecx
44 ; X64-NEXT: shll %cl, %edi
45 ; X64-NEXT: movl %edi, %eax
46 ; X64-NEXT: retq
47 %res = shl i32 %arg1, %arg2
48 ret i32 %res
49 }
50
51 define i32 @test_shl_i32_imm(i32 %arg1) {
52 ; X64-LABEL: test_shl_i32_imm:
53 ; X64: # %bb.0:
54 ; X64-NEXT: movl $5, %ecx
55 ; X64-NEXT: # kill: def $cl killed $ecx
56 ; X64-NEXT: shll %cl, %edi
57 ; X64-NEXT: movl %edi, %eax
58 ; X64-NEXT: retq
59 %res = shl i32 %arg1, 5
60 ret i32 %res
61 }
62
63 define i32 @test_shl_i32_imm1(i32 %arg1) {
64 ; X64-LABEL: test_shl_i32_imm1:
65 ; X64: # %bb.0:
66 ; X64-NEXT: movl $1, %ecx
67 ; X64-NEXT: # kill: def $cl killed $ecx
68 ; X64-NEXT: shll %cl, %edi
69 ; X64-NEXT: movl %edi, %eax
70 ; X64-NEXT: retq
71 %res = shl i32 %arg1, 1
72 ret i32 %res
73 }
74
75 define i16 @test_shl_i16(i32 %arg1, i32 %arg2) {
76 ; X64-LABEL: test_shl_i16:
77 ; X64: # %bb.0:
78 ; X64-NEXT: movl %esi, %ecx
79 ; X64-NEXT: # kill: def $cl killed $cx
80 ; X64-NEXT: shlw %cl, %di
81 ; X64-NEXT: movl %edi, %eax
82 ; X64-NEXT: retq
83 %a = trunc i32 %arg1 to i16
84 %a2 = trunc i32 %arg2 to i16
3 define i64 @test_shl_i64(i64 %arg1, i64 %arg2) {
4 ; X64-LABEL: test_shl_i64:
5 ; X64: # %bb.0:
6 ; X64-NEXT: movq %rdi, %rax
7 ; X64-NEXT: movq %rsi, %rcx
8 ; X64-NEXT: # kill: def $cl killed $rcx
9 ; X64-NEXT: shlq %cl, %rax
10 ; X64-NEXT: retq
11 %res = shl i64 %arg1, %arg2
12 ret i64 %res
13 }
14
15 define i64 @test_shl_i64_imm(i64 %arg1) {
16 ; X64-LABEL: test_shl_i64_imm:
17 ; X64: # %bb.0:
18 ; X64-NEXT: movq %rdi, %rax
19 ; X64-NEXT: movq $5, %rcx
20 ; X64-NEXT: # kill: def $cl killed $rcx
21 ; X64-NEXT: shlq %cl, %rax
22 ; X64-NEXT: retq
23 %res = shl i64 %arg1, 5
24 ret i64 %res
25 }
26
27 define i64 @test_shl_i64_imm1(i64 %arg1) {
28 ; X64-LABEL: test_shl_i64_imm1:
29 ; X64: # %bb.0:
30 ; X64-NEXT: movq %rdi, %rax
31 ; X64-NEXT: movq $1, %rcx
32 ; X64-NEXT: # kill: def $cl killed $rcx
33 ; X64-NEXT: shlq %cl, %rax
34 ; X64-NEXT: retq
35 %res = shl i64 %arg1, 1
36 ret i64 %res
37 }
38
39 define i32 @test_shl_i32(i32 %arg1, i32 %arg2) {
40 ; X64-LABEL: test_shl_i32:
41 ; X64: # %bb.0:
42 ; X64-NEXT: movl %edi, %eax
43 ; X64-NEXT: movl %esi, %ecx
44 ; X64-NEXT: # kill: def $cl killed $ecx
45 ; X64-NEXT: shll %cl, %eax
46 ; X64-NEXT: retq
47 %res = shl i32 %arg1, %arg2
48 ret i32 %res
49 }
50
51 define i32 @test_shl_i32_imm(i32 %arg1) {
52 ; X64-LABEL: test_shl_i32_imm:
53 ; X64: # %bb.0:
54 ; X64-NEXT: movl %edi, %eax
55 ; X64-NEXT: movl $5, %ecx
56 ; X64-NEXT: # kill: def $cl killed $ecx
57 ; X64-NEXT: shll %cl, %eax
58 ; X64-NEXT: retq
59 %res = shl i32 %arg1, 5
60 ret i32 %res
61 }
62
63 define i32 @test_shl_i32_imm1(i32 %arg1) {
64 ; X64-LABEL: test_shl_i32_imm1:
65 ; X64: # %bb.0:
66 ; X64-NEXT: movl %edi, %eax
67 ; X64-NEXT: movl $1, %ecx
68 ; X64-NEXT: # kill: def $cl killed $ecx
69 ; X64-NEXT: shll %cl, %eax
70 ; X64-NEXT: retq
71 %res = shl i32 %arg1, 1
72 ret i32 %res
73 }
74
75 define i16 @test_shl_i16(i32 %arg1, i32 %arg2) {
76 ; X64-LABEL: test_shl_i16:
77 ; X64: # %bb.0:
78 ; X64-NEXT: movl %edi, %eax
79 ; X64-NEXT: movl %esi, %ecx
80 ; X64-NEXT: # kill: def $cx killed $cx killed $ecx
81 ; X64-NEXT: # kill: def $cl killed $cx
82 ; X64-NEXT: shlw %cl, %ax
83 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
84 ; X64-NEXT: retq
85 %a = trunc i32 %arg1 to i16
86 %a2 = trunc i32 %arg2 to i16
8587 %res = shl i16 %a, %a2
8688 ret i16 %res
8789 }
8890
89 define i16 @test_shl_i16_imm(i32 %arg1) {
90 ; X64-LABEL: test_shl_i16_imm:
91 ; X64: # %bb.0:
92 ; X64-NEXT: movw $5, %cx
93 ; X64-NEXT: # kill: def $cl killed $cx
94 ; X64-NEXT: shlw %cl, %di
95 ; X64-NEXT: movl %edi, %eax
96 ; X64-NEXT: retq
97 %a = trunc i32 %arg1 to i16
98 %res = shl i16 %a, 5
91 define i16 @test_shl_i16_imm(i32 %arg1) {
92 ; X64-LABEL: test_shl_i16_imm:
93 ; X64: # %bb.0:
94 ; X64-NEXT: movl %edi, %eax
95 ; X64-NEXT: movw $5, %cx
96 ; X64-NEXT: # kill: def $cl killed $cx
97 ; X64-NEXT: shlw %cl, %ax
98 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
99 ; X64-NEXT: retq
100 %a = trunc i32 %arg1 to i16
101 %res = shl i16 %a, 5
99102 ret i16 %res
100103 }
101104
102 define i16 @test_shl_i16_imm1(i32 %arg1) {
103 ; X64-LABEL: test_shl_i16_imm1:
104 ; X64: # %bb.0:
105 ; X64-NEXT: movw $1, %cx
106 ; X64-NEXT: # kill: def $cl killed $cx
107 ; X64-NEXT: shlw %cl, %di
108 ; X64-NEXT: movl %edi, %eax
109 ; X64-NEXT: retq
110 %a = trunc i32 %arg1 to i16
111 %res = shl i16 %a, 1
105 define i16 @test_shl_i16_imm1(i32 %arg1) {
106 ; X64-LABEL: test_shl_i16_imm1:
107 ; X64: # %bb.0:
108 ; X64-NEXT: movl %edi, %eax
109 ; X64-NEXT: movw $1, %cx
110 ; X64-NEXT: # kill: def $cl killed $cx
111 ; X64-NEXT: shlw %cl, %ax
112 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
113 ; X64-NEXT: retq
114 %a = trunc i32 %arg1 to i16
115 %res = shl i16 %a, 1
112116 ret i16 %res
113117 }
114118
115 define i8 @test_shl_i8(i32 %arg1, i32 %arg2) {
116 ; X64-LABEL: test_shl_i8:
117 ; X64: # %bb.0:
118 ; X64-NEXT: movl %esi, %ecx
119 ; X64-NEXT: shlb %cl, %dil
120 ; X64-NEXT: movl %edi, %eax
121 ; X64-NEXT: retq
122 %a = trunc i32 %arg1 to i8
123 %a2 = trunc i32 %arg2 to i8
119 define i8 @test_shl_i8(i32 %arg1, i32 %arg2) {
120 ; X64-LABEL: test_shl_i8:
121 ; X64: # %bb.0:
122 ; X64-NEXT: movl %edi, %eax
123 ; X64-NEXT: movl %esi, %ecx
124 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
125 ; X64-NEXT: shlb %cl, %al
126 ; X64-NEXT: # kill: def $al killed $al killed $eax
127 ; X64-NEXT: retq
128 %a = trunc i32 %arg1 to i8
129 %a2 = trunc i32 %arg2 to i8
124130 %res = shl i8 %a, %a2
125131 ret i8 %res
126132 }
127133
128 define i8 @test_shl_i8_imm(i32 %arg1) {
129 ; X64-LABEL: test_shl_i8_imm:
130 ; X64: # %bb.0:
131 ; X64-NEXT: shlb $5, %dil
132 ; X64-NEXT: movl %edi, %eax
133 ; X64-NEXT: retq
134 %a = trunc i32 %arg1 to i8
135 %res = shl i8 %a, 5
134 define i8 @test_shl_i8_imm(i32 %arg1) {
135 ; X64-LABEL: test_shl_i8_imm:
136 ; X64: # %bb.0:
137 ; X64-NEXT: movl %edi, %eax
138 ; X64-NEXT: shlb $5, %al
139 ; X64-NEXT: # kill: def $al killed $al killed $eax
140 ; X64-NEXT: retq
141 %a = trunc i32 %arg1 to i8
142 %res = shl i8 %a, 5
136143 ret i8 %res
137144 }
138145
139 define i8 @test_shl_i8_imm1(i32 %arg1) {
140 ; X64-LABEL: test_shl_i8_imm1:
141 ; X64: # %bb.0:
142 ; X64-NEXT: addb %dil, %dil
143 ; X64-NEXT: movl %edi, %eax
144 ; X64-NEXT: retq
145 %a = trunc i32 %arg1 to i8
146 %res = shl i8 %a, 1
146 define i8 @test_shl_i8_imm1(i32 %arg1) {
147 ; X64-LABEL: test_shl_i8_imm1:
148 ; X64: # %bb.0:
149 ; X64-NEXT: movl %edi, %eax
150 ; X64-NEXT: addb %al, %al
151 ; X64-NEXT: # kill: def $al killed $al killed $eax
152 ; X64-NEXT: retq
153 %a = trunc i32 %arg1 to i8
154 %res = shl i8 %a, 1
147155 ret i8 %res
148156 }
149157
150 define i1 @test_shl_i1(i32 %arg1, i32 %arg2) {
151 ; X64-LABEL: test_shl_i1:
152 ; X64: # %bb.0:
153 ; X64-NEXT: andb $1, %sil
154 ; X64-NEXT: movl %esi, %ecx
155 ; X64-NEXT: shlb %cl, %dil
156 ; X64-NEXT: movl %edi, %eax
157 ; X64-NEXT: retq
158 %a = trunc i32 %arg1 to i1
159 %a2 = trunc i32 %arg2 to i1
158 define i1 @test_shl_i1(i32 %arg1, i32 %arg2) {
159 ; X64-LABEL: test_shl_i1:
160 ; X64: # %bb.0:
161 ; X64-NEXT: movl %edi, %eax
162 ; X64-NEXT: movl %esi, %ecx
163 ; X64-NEXT: andb $1, %cl
164 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
165 ; X64-NEXT: shlb %cl, %al
166 ; X64-NEXT: # kill: def $al killed $al killed $eax
167 ; X64-NEXT: retq
168 %a = trunc i32 %arg1 to i1
169 %a2 = trunc i32 %arg2 to i1
160170 %res = shl i1 %a, %a2
161171 ret i1 %res
162172 }
163173
164 define i1 @test_shl_i1_imm1(i32 %arg1) {
165 ; X64-LABEL: test_shl_i1_imm1:
166 ; X64: # %bb.0:
167 ; X64-NEXT: movb $-1, %cl
168 ; X64-NEXT: andb $1, %cl
169 ; X64-NEXT: shlb %cl, %dil
170 ; X64-NEXT: movl %edi, %eax
171 ; X64-NEXT: retq
172 %a = trunc i32 %arg1 to i1
173 %res = shl i1 %a, 1
174 define i1 @test_shl_i1_imm1(i32 %arg1) {
175 ; X64-LABEL: test_shl_i1_imm1:
176 ; X64: # %bb.0:
177 ; X64-NEXT: movl %edi, %eax
178 ; X64-NEXT: movb $-1, %cl
179 ; X64-NEXT: andb $1, %cl
180 ; X64-NEXT: shlb %cl, %al
181 ; X64-NEXT: # kill: def $al killed $al killed $eax
182 ; X64-NEXT: retq
183 %a = trunc i32 %arg1 to i1
184 %res = shl i1 %a, 1
174185 ret i1 %res
175186 }
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
11 ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
22
3 define i64 @test_sub_i64(i64 %arg1, i64 %arg2) {
4 ; X64-LABEL: test_sub_i64:
5 ; X64: # %bb.0:
6 ; X64-NEXT: subq %rsi, %rdi
7 ; X64-NEXT: movq %rdi, %rax
8 ; X64-NEXT: retq
9 %ret = sub i64 %arg1, %arg2
10 ret i64 %ret
11 }
12
13 define i32 @test_sub_i32(i32 %arg1, i32 %arg2) {
14 ; X64-LABEL: test_sub_i32:
15 ; X64: # %bb.0:
16 ; X64-NEXT: subl %esi, %edi
17 ; X64-NEXT: movl %edi, %eax
18 ; X64-NEXT: retq
19 %ret = sub i32 %arg1, %arg2
20 ret i32 %ret
21 }
22
23 define i16 @test_sub_i16(i16 %arg1, i16 %arg2) {
24 ; X64-LABEL: test_sub_i16:
25 ; X64: # %bb.0:
26 ; X64-NEXT: subw %si, %di
27 ; X64-NEXT: movl %edi, %eax
28 ; X64-NEXT: retq
29 %ret = sub i16 %arg1, %arg2
30 ret i16 %ret
31 }
32
33 define i8 @test_sub_i8(i8 %arg1, i8 %arg2) {
34 ; X64-LABEL: test_sub_i8:
35 ; X64: # %bb.0:
36 ; X64-NEXT: subb %sil, %dil
37 ; X64-NEXT: movl %edi, %eax
38 ; X64-NEXT: retq
39 %ret = sub i8 %arg1, %arg2
40 ret i8 %ret
3 define i64 @test_sub_i64(i64 %arg1, i64 %arg2) {
4 ; X64-LABEL: test_sub_i64:
5 ; X64: # %bb.0:
6 ; X64-NEXT: movq %rdi, %rax
7 ; X64-NEXT: subq %rsi, %rax
8 ; X64-NEXT: retq
9 %ret = sub i64 %arg1, %arg2
10 ret i64 %ret
11 }
12
13 define i32 @test_sub_i32(i32 %arg1, i32 %arg2) {
14 ; X64-LABEL: test_sub_i32:
15 ; X64: # %bb.0:
16 ; X64-NEXT: movl %edi, %eax
17 ; X64-NEXT: subl %esi, %eax
18 ; X64-NEXT: retq
19 %ret = sub i32 %arg1, %arg2
20 ret i32 %ret
21 }
22
23 define i16 @test_sub_i16(i16 %arg1, i16 %arg2) {
24 ; X64-LABEL: test_sub_i16:
25 ; X64: # %bb.0:
26 ; X64-NEXT: movl %edi, %eax
27 ; X64-NEXT: subw %si, %ax
28 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
29 ; X64-NEXT: retq
30 %ret = sub i16 %arg1, %arg2
31 ret i16 %ret
32 }
33
34 define i8 @test_sub_i8(i8 %arg1, i8 %arg2) {
35 ; X64-LABEL: test_sub_i8:
36 ; X64: # %bb.0:
37 ; X64-NEXT: movl %edi, %eax
38 ; X64-NEXT: subb %sil, %al
39 ; X64-NEXT: # kill: def $al killed $al killed $eax
40 ; X64-NEXT: retq
41 %ret = sub i8 %arg1, %arg2
42 ret i8 %ret
4143 }
4244
4345 define i32 @test_sub_i1(i32 %arg1, i32 %arg2) {
11 ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
22
33 define i1 @trunc_i32toi1(i32 %a) {
4 ; CHECK-LABEL: trunc_i32toi1:
5 ; CHECK: # %bb.0:
6 ; CHECK-NEXT: movl %edi, %eax
7 ; CHECK-NEXT: retq
8 %r = trunc i32 %a to i1
9 ret i1 %r
4 ; CHECK-LABEL: trunc_i32toi1:
5 ; CHECK: # %bb.0:
6 ; CHECK-NEXT: movl %edi, %eax
7 ; CHECK-NEXT: # kill: def $al killed $al killed $eax
8 ; CHECK-NEXT: retq
9 %r = trunc i32 %a to i1
10 ret i1 %r
1011 }
1112
1213 define i8 @trunc_i32toi8(i32 %a) {
13 ; CHECK-LABEL: trunc_i32toi8:
14 ; CHECK: # %bb.0:
15 ; CHECK-NEXT: movl %edi, %eax
16 ; CHECK-NEXT: retq
17 %r = trunc i32 %a to i8
18 ret i8 %r
14 ; CHECK-LABEL: trunc_i32toi8:
15 ; CHECK: # %bb.0:
16 ; CHECK-NEXT: movl %edi, %eax
17 ; CHECK-NEXT: # kill: def $al killed $al killed $eax
18 ; CHECK-NEXT: retq
19 %r = trunc i32 %a to i8
20 ret i8 %r
1921 }
2022
2123 define i16 @trunc_i32toi16(i32 %a) {
22 ; CHECK-LABEL: trunc_i32toi16:
23 ; CHECK: # %bb.0:
24 ; CHECK-NEXT: movl %edi, %eax
25 ; CHECK-NEXT: retq
26 %r = trunc i32 %a to i16
27 ret i16 %r
24 ; CHECK-LABEL: trunc_i32toi16:
25 ; CHECK: # %bb.0:
26 ; CHECK-NEXT: movl %edi, %eax
27 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
28 ; CHECK-NEXT: retq
29 %r = trunc i32 %a to i16
30 ret i16 %r
31 }
32
33 define i8 @trunc_i64toi8(i64 %a) {
34 ; CHECK-LABEL: trunc_i64toi8:
35 ; CHECK: # %bb.0:
36 ; CHECK-NEXT: movq %rdi, %rax
37 ; CHECK-NEXT: # kill: def $al killed $al killed $rax
38 ; CHECK-NEXT: retq
39 %r = trunc i64 %a to i8
40 ret i8 %r
41 }
42
43 define i16 @trunc_i64toi16(i64 %a) {
44 ; CHECK-LABEL: trunc_i64toi16:
45 ; CHECK: # %bb.0:
46 ; CHECK-NEXT: movq %rdi, %rax
47 ; CHECK-NEXT: # kill: def $ax killed $ax killed $rax
48 ; CHECK-NEXT: retq
49 %r = trunc i64 %a to i16
50 ret i16 %r
51 }
52
53 define i32 @trunc_i64toi32(i64 %a) {
54 ; CHECK-LABEL: trunc_i64toi32:
55 ; CHECK: # %bb.0:
56 ; CHECK-NEXT: movq %rdi, %rax
57 ; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
58 ; CHECK-NEXT: retq
59 %r = trunc i64 %a to i32
60 ret i32 %r
2861 }
2962
30 define i8 @trunc_i64toi8(i64 %a) {
31 ; CHECK-LABEL: trunc_i64toi8:
32 ; CHECK: # %bb.0:
33 ; CHECK-NEXT: movl %edi, %eax
34 ; CHECK-NEXT: retq
35 %r = trunc i64 %a to i8
36 ret i8 %r
37 }
38
39 define i16 @trunc_i64toi16(i64 %a) {
40 ; CHECK-LABEL: trunc_i64toi16:
41 ; CHECK: # %bb.0:
42 ; CHECK-NEXT: movl %edi, %eax
43 ; CHECK-NEXT: retq
44 %r = trunc i64 %a to i16
45 ret i16 %r
46 }
47
48 define i32 @trunc_i64toi32(i64 %a) {
49 ; CHECK-LABEL: trunc_i64toi32:
50 ; CHECK: # %bb.0:
51 ; CHECK-NEXT: movl %edi, %eax
52 ; CHECK-NEXT: retq
53 %r = trunc i64 %a to i32
54 ret i32 %r
55 }
56
77 ret i8 undef
88 }
99
10 define i8 @test2(i8 %a) {
11 ; ALL-LABEL: test2:
12 ; ALL: # %bb.0:
13 ; ALL-NEXT: addb %al, %dil
14 ; ALL-NEXT: movl %edi, %eax
15 ; ALL-NEXT: retq
16 %r = add i8 %a, undef
17 ret i8 %r
10 define i8 @test2(i8 %a) {
11 ; ALL-LABEL: test2:
12 ; ALL: # %bb.0:
13 ; ALL-NEXT: movl %edi, %eax
14 ; ALL-NEXT: addb %al, %al
15 ; ALL-NEXT: # kill: def $al killed $al killed $eax
16 ; ALL-NEXT: retq
17 %r = add i8 %a, undef
18 ret i8 %r
1819 }
1920
2021
1515 ret i32 %ret
1616 }
1717
18 define i8 @test_xor_i8(i8 %arg1, i8 %arg2) {
19 ; ALL-LABEL: test_xor_i8:
20 ; ALL: # %bb.0:
21 ; ALL-NEXT: xorb %dil, %sil
22 ; ALL-NEXT: movl %esi, %eax
23 ; ALL-NEXT: retq
24 %ret = xor i8 %arg1, %arg2
25 ret i8 %ret
18 define i8 @test_xor_i8(i8 %arg1, i8 %arg2) {
19 ; ALL-LABEL: test_xor_i8:
20 ; ALL: # %bb.0:
21 ; ALL-NEXT: movl %esi, %eax
22 ; ALL-NEXT: xorb %dil, %al
23 ; ALL-NEXT: # kill: def $al killed $al killed $eax
24 ; ALL-NEXT: retq
25 %ret = xor i8 %arg1, %arg2
26 ret i8 %ret
27 }
28
29 define i16 @test_xor_i16(i16 %arg1, i16 %arg2) {
30 ; ALL-LABEL: test_xor_i16:
31 ; ALL: # %bb.0:
32 ; ALL-NEXT: movl %esi, %eax
33 ; ALL-NEXT: xorw %di, %ax
34 ; ALL-NEXT: # kill: def $ax killed $ax killed $eax
35 ; ALL-NEXT: retq
36 %ret = xor i16 %arg1, %arg2
37 ret i16 %ret
38 }
39
40 define i32 @test_xor_i32(i32 %arg1, i32 %arg2) {
41 ; ALL-LABEL: test_xor_i32:
42 ; ALL: # %bb.0:
43 ; ALL-NEXT: movl %esi, %eax
44 ; ALL-NEXT: xorl %edi, %eax
45 ; ALL-NEXT: retq
46 %ret = xor i32 %arg1, %arg2
47 ret i32 %ret
48 }
49
50 define i64 @test_xor_i64(i64 %arg1, i64 %arg2) {
51 ; ALL-LABEL: test_xor_i64:
52 ; ALL: # %bb.0:
53 ; ALL-NEXT: movq %rsi, %rax
54 ; ALL-NEXT: xorq %rdi, %rax
55 ; ALL-NEXT: retq
56 %ret = xor i64 %arg1, %arg2
57 ret i64 %ret
2658 }
2759
28 define i16 @test_xor_i16(i16 %arg1, i16 %arg2) {
29 ; ALL-LABEL: test_xor_i16:
30 ; ALL: # %bb.0:
31 ; ALL-NEXT: xorw %di, %si
32 ; ALL-NEXT: movl %esi, %eax
33 ; ALL-NEXT: retq
34 %ret = xor i16 %arg1, %arg2
35 ret i16 %ret
36 }
37
38 define i32 @test_xor_i32(i32 %arg1, i32 %arg2) {
39 ; ALL-LABEL: test_xor_i32:
40 ; ALL: # %bb.0:
41 ; ALL-NEXT: xorl %edi, %esi
42 ; ALL-NEXT: movl %esi, %eax
43 ; ALL-NEXT: retq
44 %ret = xor i32 %arg1, %arg2
45 ret i32 %ret
46 }
47
48 define i64 @test_xor_i64(i64 %arg1, i64 %arg2) {
49 ; ALL-LABEL: test_xor_i64:
50 ; ALL: # %bb.0:
51 ; ALL-NEXT: xorq %rdi, %rsi
52 ; ALL-NEXT: movq %rsi, %rax
53 ; ALL-NEXT: retq
54 %ret = xor i64 %arg1, %arg2
55 ret i64 %ret
56 }
57
1515 ;
1616 ; X64-LINUX-LABEL: test1:
1717 ; X64-LINUX: # %bb.0: # %entry
18 ; X64-LINUX-NEXT: subl $-128, %edi
1918 ; X64-LINUX-NEXT: movl %edi, %eax
19 ; X64-LINUX-NEXT: subl $-128, %eax
2020 ; X64-LINUX-NEXT: retq
2121 ;
2222 ; X64-WIN32-LABEL: test1:
2323 ; X64-WIN32: # %bb.0: # %entry
24 ; X64-WIN32-NEXT: subl $-128, %ecx
2524 ; X64-WIN32-NEXT: movl %ecx, %eax
25 ; X64-WIN32-NEXT: subl $-128, %eax
2626 ; X64-WIN32-NEXT: retq
2727 entry:
2828 %b = add i32 %a, 128
3737 ;
3838 ; X64-LINUX-LABEL: test2:
3939 ; X64-LINUX: # %bb.0: # %entry
40 ; X64-LINUX-NEXT: subq $-2147483648, %rdi # imm = 0x80000000
4140 ; X64-LINUX-NEXT: movq %rdi, %rax
41 ; X64-LINUX-NEXT: subq $-2147483648, %rax # imm = 0x80000000
4242 ; X64-LINUX-NEXT: retq
4343 ;
4444 ; X64-WIN32-LABEL: test2:
4545 ; X64-WIN32: # %bb.0: # %entry
46 ; X64-WIN32-NEXT: subq $-2147483648, %rcx # imm = 0x80000000
4746 ; X64-WIN32-NEXT: movq %rcx, %rax
47 ; X64-WIN32-NEXT: subq $-2147483648, %rax # imm = 0x80000000
4848 ; X64-WIN32-NEXT: retq
4949 entry:
5050 %b = add i64 %a, 2147483648
5959 ;
6060 ; X64-LINUX-LABEL: test3:
6161 ; X64-LINUX: # %bb.0: # %entry
62 ; X64-LINUX-NEXT: subq $-128, %rdi
6362 ; X64-LINUX-NEXT: movq %rdi, %rax
63 ; X64-LINUX-NEXT: subq $-128, %rax
6464 ; X64-LINUX-NEXT: retq
6565 ;
6666 ; X64-WIN32-LABEL: test3:
6767 ; X64-WIN32: # %bb.0: # %entry
68 ; X64-WIN32-NEXT: subq $-128, %rcx
6968 ; X64-WIN32-NEXT: movq %rcx, %rax
69 ; X64-WIN32-NEXT: subq $-128, %rax
7070 ; X64-WIN32-NEXT: retq
7171 entry:
7272 %b = add i64 %a, 128
203203 ;
204204 ; X64-LINUX-LABEL: test7:
205205 ; X64-LINUX: # %bb.0: # %entry
206 ; X64-LINUX-NEXT: addl %esi, %edi
206 ; X64-LINUX-NEXT: movl %edi, %eax
207 ; X64-LINUX-NEXT: addl %esi, %eax
207208 ; X64-LINUX-NEXT: setb %dl
208 ; X64-LINUX-NEXT: movl %edi, %eax
209209 ; X64-LINUX-NEXT: retq
210210 ;
211211 ; X64-WIN32-LABEL: test7:
212212 ; X64-WIN32: # %bb.0: # %entry
213 ; X64-WIN32-NEXT: addl %edx, %ecx
213 ; X64-WIN32-NEXT: movl %ecx, %eax
214 ; X64-WIN32-NEXT: addl %edx, %eax
214215 ; X64-WIN32-NEXT: setb %dl
215 ; X64-WIN32-NEXT: movl %ecx, %eax
216216 ; X64-WIN32-NEXT: retq
217217 entry:
218218 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
232232 ;
233233 ; X64-LINUX-LABEL: test8:
234234 ; X64-LINUX: # %bb.0: # %entry
235 ; X64-LINUX-NEXT: addq %rsi, %rdi
235 ; X64-LINUX-NEXT: movq %rdi, %rax
236 ; X64-LINUX-NEXT: addq %rsi, %rax
236237 ; X64-LINUX-NEXT: setb %dl
237 ; X64-LINUX-NEXT: movq %rdi, %rax
238238 ; X64-LINUX-NEXT: retq
239239 ;
240240 ; X64-WIN32-LABEL: test8:
241241 ; X64-WIN32: # %bb.0: # %entry
242 ; X64-WIN32-NEXT: addq %rdx, %rcx
242 ; X64-WIN32-NEXT: movq %rcx, %rax
243 ; X64-WIN32-NEXT: addq %rdx, %rax
243244 ; X64-WIN32-NEXT: setb %dl
244 ; X64-WIN32-NEXT: movq %rcx, %rax
245245 ; X64-WIN32-NEXT: retq
246246 entry:
247247 %extleft = zext i64 %left to i65
267267 ;
268268 ; X64-LINUX-LABEL: test9:
269269 ; X64-LINUX: # %bb.0: # %entry
270 ; X64-LINUX-NEXT: xorl %eax, %eax
270 ; X64-LINUX-NEXT: movl %esi, %eax
271 ; X64-LINUX-NEXT: xorl %ecx, %ecx
271272 ; X64-LINUX-NEXT: cmpl $10, %edi
272 ; X64-LINUX-NEXT: sete %al
273 ; X64-LINUX-NEXT: subl %eax, %esi
274 ; X64-LINUX-NEXT: movl %esi, %eax
273 ; X64-LINUX-NEXT: sete %cl
274 ; X64-LINUX-NEXT: subl %ecx, %eax
275275 ; X64-LINUX-NEXT: retq
276276 ;
277277 ; X64-WIN32-LABEL: test9:
278278 ; X64-WIN32: # %bb.0: # %entry
279 ; X64-WIN32-NEXT: xorl %eax, %eax
279 ; X64-WIN32-NEXT: movl %edx, %eax
280 ; X64-WIN32-NEXT: xorl %edx, %edx
280281 ; X64-WIN32-NEXT: cmpl $10, %ecx
281 ; X64-WIN32-NEXT: sete %al
282 ; X64-WIN32-NEXT: subl %eax, %edx
283 ; X64-WIN32-NEXT: movl %edx, %eax
282 ; X64-WIN32-NEXT: sete %dl
283 ; X64-WIN32-NEXT: subl %edx, %eax
284284 ; X64-WIN32-NEXT: retq
285285 entry:
286286 %cmp = icmp eq i32 %x, 10
391391 ;
392392 ; X64-LINUX-LABEL: inc_not:
393393 ; X64-LINUX: # %bb.0:
394 ; X64-LINUX-NEXT: negl %edi
395394 ; X64-LINUX-NEXT: movl %edi, %eax
395 ; X64-LINUX-NEXT: negl %eax
396396 ; X64-LINUX-NEXT: retq
397397 ;
398398 ; X64-WIN32-LABEL: inc_not:
399399 ; X64-WIN32: # %bb.0:
400 ; X64-WIN32-NEXT: negl %ecx
401400 ; X64-WIN32-NEXT: movl %ecx, %eax
401 ; X64-WIN32-NEXT: negl %eax
402402 ; X64-WIN32-NEXT: retq
403403 %nota = xor i32 %a, -1
404404 %r = add i32 %nota, 1
33 define i128 @add128(i128 %a, i128 %b) nounwind {
44 ; CHECK-LABEL: add128:
55 ; CHECK: # %bb.0: # %entry
6 ; CHECK-NEXT: addq %rdx, %rdi
6 ; CHECK-NEXT: movq %rdi, %rax
7 ; CHECK-NEXT: addq %rdx, %rax
78 ; CHECK-NEXT: adcq %rcx, %rsi
8 ; CHECK-NEXT: movq %rdi, %rax
99 ; CHECK-NEXT: movq %rsi, %rdx
1010 ; CHECK-NEXT: retq
1111 entry:
4242 define i256 @add256(i256 %a, i256 %b) nounwind {
4343 ; CHECK-LABEL: add256:
4444 ; CHECK: # %bb.0: # %entry
45 ; CHECK-NEXT: movq %rdi, %rax
4546 ; CHECK-NEXT: addq %r9, %rsi
4647 ; CHECK-NEXT: adcq {{[0-9]+}}(%rsp), %rdx
4748 ; CHECK-NEXT: adcq {{[0-9]+}}(%rsp), %rcx
5051 ; CHECK-NEXT: movq %rsi, (%rdi)
5152 ; CHECK-NEXT: movq %rcx, 16(%rdi)
5253 ; CHECK-NEXT: movq %r8, 24(%rdi)
53 ; CHECK-NEXT: movq %rdi, %rax
5454 ; CHECK-NEXT: retq
5555 entry:
5656 %0 = add i256 %a, %b
196196 define %scalar @pr31719(%scalar* nocapture readonly %this, %scalar %arg.b) {
197197 ; CHECK-LABEL: pr31719:
198198 ; CHECK: # %bb.0: # %entry
199 ; CHECK-NEXT: movq %rdi, %rax
199200 ; CHECK-NEXT: addq (%rsi), %rdx
200201 ; CHECK-NEXT: adcq 8(%rsi), %rcx
201202 ; CHECK-NEXT: adcq 16(%rsi), %r8
204205 ; CHECK-NEXT: movq %rcx, 8(%rdi)
205206 ; CHECK-NEXT: movq %r8, 16(%rdi)
206207 ; CHECK-NEXT: movq %r9, 24(%rdi)
207 ; CHECK-NEXT: movq %rdi, %rax
208208 ; CHECK-NEXT: retq
209209 entry:
210210 %0 = extractvalue %scalar %arg.b, 0
291291 define i64 @shiftadd(i64 %a, i64 %b, i64 %c, i64 %d) {
292292 ; CHECK-LABEL: shiftadd:
293293 ; CHECK: # %bb.0: # %entry
294 ; CHECK-NEXT: movq %rdx, %rax
294295 ; CHECK-NEXT: addq %rsi, %rdi
295 ; CHECK-NEXT: adcq %rcx, %rdx
296 ; CHECK-NEXT: movq %rdx, %rax
296 ; CHECK-NEXT: adcq %rcx, %rax
297297 ; CHECK-NEXT: retq
298298 entry:
299299 %0 = zext i64 %a to i128
311311 define %S @readd(%S* nocapture readonly %this, %S %arg.b) {
312312 ; CHECK-LABEL: readd:
313313 ; CHECK: # %bb.0: # %entry
314 ; CHECK-NEXT: movq %rdi, %rax
314315 ; CHECK-NEXT: addq (%rsi), %rdx
315 ; CHECK-NEXT: movq 8(%rsi), %r10
316 ; CHECK-NEXT: adcq $0, %r10
317 ; CHECK-NEXT: setb %al
318 ; CHECK-NEXT: movzbl %al, %eax
319 ; CHECK-NEXT: addq %rcx, %r10
320 ; CHECK-NEXT: adcq 16(%rsi), %rax
316 ; CHECK-NEXT: movq 8(%rsi), %r11
317 ; CHECK-NEXT: adcq $0, %r11
318 ; CHECK-NEXT: setb %r10b
319 ; CHECK-NEXT: movzbl %r10b, %edi
320 ; CHECK-NEXT: addq %rcx, %r11
321 ; CHECK-NEXT: adcq 16(%rsi), %rdi
321322 ; CHECK-NEXT: setb %cl
322323 ; CHECK-NEXT: movzbl %cl, %ecx
323 ; CHECK-NEXT: addq %r8, %rax
324 ; CHECK-NEXT: addq %r8, %rdi
324325 ; CHECK-NEXT: adcq 24(%rsi), %rcx
325326 ; CHECK-NEXT: addq %r9, %rcx
326 ; CHECK-NEXT: movq %rdx, (%rdi)
327 ; CHECK-NEXT: movq %r10, 8(%rdi)
328 ; CHECK-NEXT: movq %rax, 16(%rdi)
329 ; CHECK-NEXT: movq %rcx, 24(%rdi)
330 ; CHECK-NEXT: movq %rdi, %rax
327 ; CHECK-NEXT: movq %rdx, (%rax)
328 ; CHECK-NEXT: movq %r11, 8(%rax)
329 ; CHECK-NEXT: movq %rdi, 16(%rax)
330 ; CHECK-NEXT: movq %rcx, 24(%rax)
331331 ; CHECK-NEXT: retq
332332 entry:
333333 %0 = extractvalue %S %arg.b, 0
376376 define i128 @addcarry1_not(i128 %n) {
377377 ; CHECK-LABEL: addcarry1_not:
378378 ; CHECK: # %bb.0:
379 ; CHECK-NEXT: movq %rdi, %rax
379380 ; CHECK-NEXT: xorl %edx, %edx
380 ; CHECK-NEXT: negq %rdi
381 ; CHECK-NEXT: negq %rax
381382 ; CHECK-NEXT: sbbq %rsi, %rdx
382 ; CHECK-NEXT: movq %rdi, %rax
383383 ; CHECK-NEXT: retq
384384 %1 = xor i128 %n, -1
385385 %2 = add i128 %1, 1
4545 define i32 @lopped32_32to8(i32 %x) {
4646 ; CHECK-LABEL: lopped32_32to8:
4747 ; CHECK: # %bb.0:
48 ; CHECK-NEXT: shrl $4, %edi # encoding: [0xc1,0xef,0x04]
49 ; CHECK-NEXT: andl $-16, %edi # encoding: [0x83,0xe7,0xf0]
5048 ; CHECK-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
49 ; CHECK-NEXT: shrl $4, %eax # encoding: [0xc1,0xe8,0x04]
50 ; CHECK-NEXT: andl $-16, %eax # encoding: [0x83,0xe0,0xf0]
5151 ; CHECK-NEXT: retq # encoding: [0xc3]
5252 %shr = lshr i32 %x, 4
5353 %and = and i32 %shr, 268435440
5959 define i64 @lopped64_32to8(i64 %x) {
6060 ; CHECK-LABEL: lopped64_32to8:
6161 ; CHECK: # %bb.0:
62 ; CHECK-NEXT: shrq $36, %rdi # encoding: [0x48,0xc1,0xef,0x24]
63 ; CHECK-NEXT: andl $-16, %edi # encoding: [0x83,0xe7,0xf0]
6462 ; CHECK-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
63 ; CHECK-NEXT: shrq $36, %rax # encoding: [0x48,0xc1,0xe8,0x24]
64 ; CHECK-NEXT: andl $-16, %eax # encoding: [0x83,0xe0,0xf0]
6565 ; CHECK-NEXT: retq # encoding: [0xc3]
6666 %shr = lshr i64 %x, 36
6767 %and = and i64 %shr, 268435440
7373 define i64 @lopped64_64to8(i64 %x) {
7474 ; CHECK-LABEL: lopped64_64to8:
7575 ; CHECK: # %bb.0:
76 ; CHECK-NEXT: shrq $4, %rdi # encoding: [0x48,0xc1,0xef,0x04]
77 ; CHECK-NEXT: andq $-16, %rdi # encoding: [0x48,0x83,0xe7,0xf0]
7876 ; CHECK-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
77 ; CHECK-NEXT: shrq $4, %rax # encoding: [0x48,0xc1,0xe8,0x04]
78 ; CHECK-NEXT: andq $-16, %rax # encoding: [0x48,0x83,0xe0,0xf0]
7979 ; CHECK-NEXT: retq # encoding: [0xc3]
8080 %shr = lshr i64 %x, 4
8181 %and = and i64 %shr, 1152921504606846960
8787 define i64 @lopped64_64to32(i64 %x) {
8888 ; CHECK-LABEL: lopped64_64to32:
8989 ; CHECK: # %bb.0:
90 ; CHECK-NEXT: shrq $4, %rdi # encoding: [0x48,0xc1,0xef,0x04]
91 ; CHECK-NEXT: andq $-983056, %rdi # encoding: [0x48,0x81,0xe7,0xf0,0xff,0xf0,0xff]
90 ; CHECK-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
91 ; CHECK-NEXT: shrq $4, %rax # encoding: [0x48,0xc1,0xe8,0x04]
92 ; CHECK-NEXT: andq $-983056, %rax # encoding: [0x48,0x25,0xf0,0xff,0xf0,0xff]
9293 ; CHECK-NEXT: # imm = 0xFFF0FFF0
93 ; CHECK-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
9494 ; CHECK-NEXT: retq # encoding: [0xc3]
9595 %shr = lshr i64 %x, 4
9696 %and = and i64 %shr, 1152921504605863920
1313 ;
1414 ; X64-LABEL: bra:
1515 ; X64: # %bb.0:
16 ; X64-NEXT: # kill: def $edi killed $edi def $rdi
17 ; X64-NEXT: andl $-64, %edi # encoding: [0x83,0xe7,0xc0]
18 ; X64-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
16 ; X64-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
17 ; X64-NEXT: andl $-64, %eax # encoding: [0x83,0xe0,0xc0]
1918 ; X64-NEXT: retq # encoding: [0xc3]
2019 %t1 = zext i32 %zed to i64
2120 %t2 = and i64 %t1, 4294967232
5655 ;
5756 ; X64-LABEL: bar:
5857 ; X64: # %bb.0:
59 ; X64-NEXT: andl $42, %edi # encoding: [0x83,0xe7,0x2a]
6058 ; X64-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
59 ; X64-NEXT: andl $42, %eax # encoding: [0x83,0xe0,0x2a]
6160 ; X64-NEXT: retq # encoding: [0xc3]
6261 %t1 = and i64 %zed, 42
6362 ret i64 %t1
7473 ;
7574 ; X64-LABEL: baz:
7675 ; X64: # %bb.0:
77 ; X64-NEXT: andl $2147483647, %edi # encoding: [0x81,0xe7,0xff,0xff,0xff,0x7f]
76 ; X64-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
77 ; X64-NEXT: andl $2147483647, %eax # encoding: [0x25,0xff,0xff,0xff,0x7f]
7878 ; X64-NEXT: # imm = 0x7FFFFFFF
79 ; X64-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
8079 ; X64-NEXT: retq # encoding: [0xc3]
8180 %t1 = and i64 %zed, 2147483647
8281 ret i64 %t1
4040 ;
4141 ; X64-LABEL: bar:
4242 ; X64: # %bb.0:
43 ; X64-NEXT: movl %edi, %eax
4344 ; X64-NEXT: xorl %edx, %edx
44 ; X64-NEXT: movl %edi, %eax
45 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
4546 ; X64-NEXT: divw %si
4647 ; X64-NEXT: # kill: def $ax killed $ax def $eax
4748 ; X64-NEXT: andl $1, %eax
1616 ;
1717 ; X64-LABEL: foo:
1818 ; X64: # %bb.0: # %entry
19 ; X64-NEXT: movl %esi, %ecx
1920 ; X64-NEXT: leaq (%rdi), %rax
20 ; X64-NEXT: movl %esi, %ecx
2121 ; X64-NEXT: monitor
2222 ; X64-NEXT: retq
2323 ;
4545 ;
4646 ; X64-LABEL: bar:
4747 ; X64: # %bb.0: # %entry
48 ; X64-NEXT: movl %esi, %eax
4849 ; X64-NEXT: movl %edi, %ecx
49 ; X64-NEXT: movl %esi, %eax
5050 ; X64-NEXT: mwait
5151 ; X64-NEXT: retq
5252 ;
44 define i32 @test_add_1_cmov_slt(i64* %p, i32 %a0, i32 %a1) #0 {
55 ; FASTINCDEC-LABEL: test_add_1_cmov_slt:
66 ; FASTINCDEC: # %bb.0: # %entry
7 ; FASTINCDEC-NEXT: movl %esi, %eax
78 ; FASTINCDEC-NEXT: lock incq (%rdi)
8 ; FASTINCDEC-NEXT: cmovgl %edx, %esi
9 ; FASTINCDEC-NEXT: movl %esi, %eax
9 ; FASTINCDEC-NEXT: cmovgl %edx, %eax
1010 ; FASTINCDEC-NEXT: retq
1111 ;
1212 ; SLOWINCDEC-LABEL: test_add_1_cmov_slt:
1313 ; SLOWINCDEC: # %bb.0: # %entry
14 ; SLOWINCDEC-NEXT: movl %esi, %eax
1415 ; SLOWINCDEC-NEXT: lock addq $1, (%rdi)
15 ; SLOWINCDEC-NEXT: cmovgl %edx, %esi
16 ; SLOWINCDEC-NEXT: movl %esi, %eax
16 ; SLOWINCDEC-NEXT: cmovgl %edx, %eax
1717 ; SLOWINCDEC-NEXT: retq
1818 entry:
1919 %tmp0 = atomicrmw add i64* %p, i64 1 seq_cst
2525 define i32 @test_add_1_cmov_sge(i64* %p, i32 %a0, i32 %a1) #0 {
2626 ; FASTINCDEC-LABEL: test_add_1_cmov_sge:
2727 ; FASTINCDEC: # %bb.0: # %entry
28 ; FASTINCDEC-NEXT: movl %esi, %eax
2829 ; FASTINCDEC-NEXT: lock incq (%rdi)
29 ; FASTINCDEC-NEXT: cmovlel %edx, %esi
30 ; FASTINCDEC-NEXT: movl %esi, %eax
30 ; FASTINCDEC-NEXT: cmovlel %edx, %eax
3131 ; FASTINCDEC-NEXT: retq
3232 ;
3333 ; SLOWINCDEC-LABEL: test_add_1_cmov_sge:
3434 ; SLOWINCDEC: # %bb.0: # %entry
35 ; SLOWINCDEC-NEXT: movl %esi, %eax
3536 ; SLOWINCDEC-NEXT: lock addq $1, (%rdi)
36 ; SLOWINCDEC-NEXT: cmovlel %edx, %esi
37 ; SLOWINCDEC-NEXT: movl %esi, %eax
37 ; SLOWINCDEC-NEXT: cmovlel %edx, %eax
3838 ; SLOWINCDEC-NEXT: retq
3939 entry:
4040 %tmp0 = atomicrmw add i64* %p, i64 1 seq_cst
4646 define i32 @test_sub_1_cmov_sle(i64* %p, i32 %a0, i32 %a1) #0 {
4747 ; FASTINCDEC-LABEL: test_sub_1_cmov_sle:
4848 ; FASTINCDEC: # %bb.0: # %entry
49 ; FASTINCDEC-NEXT: lock decq (%rdi)
50 ; FASTINCDEC-NEXT: cmovgel %edx, %esi
51 ; FASTINCDEC-NEXT: movl %esi, %eax
49 ; FASTINCDEC-NEXT: movl %esi, %eax
50 ; FASTINCDEC-NEXT: lock decq (%rdi)
51 ; FASTINCDEC-NEXT: cmovgel %edx, %eax
5252 ; FASTINCDEC-NEXT: retq
5353 ;
5454 ; SLOWINCDEC-LABEL: test_sub_1_cmov_sle:
5555 ; SLOWINCDEC: # %bb.0: # %entry
56 ; SLOWINCDEC-NEXT: movl %esi, %eax
5657 ; SLOWINCDEC-NEXT: lock addq $-1, (%rdi)
57 ; SLOWINCDEC-NEXT: cmovgel %edx, %esi
58 ; SLOWINCDEC-NEXT: movl %esi, %eax
58 ; SLOWINCDEC-NEXT: cmovgel %edx, %eax
5959 ; SLOWINCDEC-NEXT: retq
6060 entry:
6161 %tmp0 = atomicrmw sub i64* %p, i64 1 seq_cst
6767 define i32 @test_sub_1_cmov_sgt(i64* %p, i32 %a0, i32 %a1) #0 {
6868 ; FASTINCDEC-LABEL: test_sub_1_cmov_sgt:
6969 ; FASTINCDEC: # %bb.0: # %entry
70 ; FASTINCDEC-NEXT: lock decq (%rdi)
71 ; FASTINCDEC-NEXT: cmovll %edx, %esi
72 ; FASTINCDEC-NEXT: movl %esi, %eax
70 ; FASTINCDEC-NEXT: movl %esi, %eax
71 ; FASTINCDEC-NEXT: lock decq (%rdi)
72 ; FASTINCDEC-NEXT: cmovll %edx, %eax
7373 ; FASTINCDEC-NEXT: retq
7474 ;
7575 ; SLOWINCDEC-LABEL: test_sub_1_cmov_sgt:
7676 ; SLOWINCDEC: # %bb.0: # %entry
77 ; SLOWINCDEC-NEXT: movl %esi, %eax
7778 ; SLOWINCDEC-NEXT: lock addq $-1, (%rdi)
78 ; SLOWINCDEC-NEXT: cmovll %edx, %esi
79 ; SLOWINCDEC-NEXT: movl %esi, %eax
79 ; SLOWINCDEC-NEXT: cmovll %edx, %eax
8080 ; SLOWINCDEC-NEXT: retq
8181 entry:
8282 %tmp0 = atomicrmw sub i64* %p, i64 1 seq_cst
158158 define i32 @test_add_1_cmov_sle(i64* %p, i32 %a0, i32 %a1) #0 {
159159 ; CHECK-LABEL: test_add_1_cmov_sle:
160160 ; CHECK: # %bb.0: # %entry
161 ; CHECK-NEXT: movl $1, %eax
162 ; CHECK-NEXT: lock xaddq %rax, (%rdi)
163 ; CHECK-NEXT: testq %rax, %rax
164 ; CHECK-NEXT: cmovgl %edx, %esi
165161 ; CHECK-NEXT: movl %esi, %eax
162 ; CHECK-NEXT: movl $1, %ecx
163 ; CHECK-NEXT: lock xaddq %rcx, (%rdi)
164 ; CHECK-NEXT: testq %rcx, %rcx
165 ; CHECK-NEXT: cmovgl %edx, %eax
166166 ; CHECK-NEXT: retq
167167 entry:
168168 %tmp0 = atomicrmw add i64* %p, i64 1 seq_cst
174174 define i32 @test_add_1_cmov_sgt(i64* %p, i32 %a0, i32 %a1) #0 {
175175 ; CHECK-LABEL: test_add_1_cmov_sgt:
176176 ; CHECK: # %bb.0: # %entry
177 ; CHECK-NEXT: movl $1, %eax
178 ; CHECK-NEXT: lock xaddq %rax, (%rdi)
179 ; CHECK-NEXT: testq %rax, %rax
180 ; CHECK-NEXT: cmovlel %edx, %esi
181177 ; CHECK-NEXT: movl %esi, %eax
178 ; CHECK-NEXT: movl $1, %ecx
179 ; CHECK-NEXT: lock xaddq %rcx, (%rdi)
180 ; CHECK-NEXT: testq %rcx, %rcx
181 ; CHECK-NEXT: cmovlel %edx, %eax
182182 ; CHECK-NEXT: retq
183183 entry:
184184 %tmp0 = atomicrmw add i64* %p, i64 1 seq_cst
1111 ; CHECK-NEXT: pushq %rbx
1212 ; CHECK-NEXT: .cfi_def_cfa_offset 16
1313 ; CHECK-NEXT: .cfi_offset %rbx, -16
14 ; CHECK-NEXT: movq %rcx, %r9
14 ; CHECK-NEXT: movq %rcx, %rbx
1515 ; CHECK-NEXT: movq %rsi, %rax
1616 ; CHECK-NEXT: movq %r8, %rcx
17 ; CHECK-NEXT: movq %r9, %rbx
1817 ; CHECK-NEXT: lock cmpxchg16b (%rdi)
1918 ; CHECK-NEXT: popq %rbx
2019 ; CHECK-NEXT: retq
16371637 define <512 x i8> @avg_v512i8_3(<512 x i8> %a, <512 x i8> %b) nounwind {
16381638 ; SSE2-LABEL: avg_v512i8_3:
16391639 ; SSE2: # %bb.0:
1640 ; SSE2-NEXT: movq %rdi, %rax
16401641 ; SSE2-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8
16411642 ; SSE2-NEXT: pavgb {{[0-9]+}}(%rsp), %xmm8
16421643 ; SSE2-NEXT: movdqa %xmm8, 496(%rdi)
17251726 ; SSE2-NEXT: movdqa %xmm1, 16(%rdi)
17261727 ; SSE2-NEXT: pavgb {{[0-9]+}}(%rsp), %xmm0
17271728 ; SSE2-NEXT: movdqa %xmm0, (%rdi)
1728 ; SSE2-NEXT: movq %rdi, %rax
17291729 ; SSE2-NEXT: retq
17301730 ;
17311731 ; AVX1-LABEL: avg_v512i8_3:
17341734 ; AVX1-NEXT: movq %rsp, %rbp
17351735 ; AVX1-NEXT: andq $-32, %rsp
17361736 ; AVX1-NEXT: subq $128, %rsp
1737 ; AVX1-NEXT: movq %rdi, %rax
17371738 ; AVX1-NEXT: vmovdqa 144(%rbp), %ymm8
17381739 ; AVX1-NEXT: vmovdqa 112(%rbp), %ymm9
17391740 ; AVX1-NEXT: vmovdqa 80(%rbp), %ymm10
18601861 ; AVX1-NEXT: vmovaps %ymm0, 32(%rdi)
18611862 ; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
18621863 ; AVX1-NEXT: vmovaps %ymm0, (%rdi)
1863 ; AVX1-NEXT: movq %rdi, %rax
18641864 ; AVX1-NEXT: movq %rbp, %rsp
18651865 ; AVX1-NEXT: popq %rbp
18661866 ; AVX1-NEXT: vzeroupper
18721872 ; AVX2-NEXT: movq %rsp, %rbp
18731873 ; AVX2-NEXT: andq $-32, %rsp
18741874 ; AVX2-NEXT: subq $32, %rsp
1875 ; AVX2-NEXT: movq %rdi, %rax
18751876 ; AVX2-NEXT: vmovdqa 240(%rbp), %ymm8
18761877 ; AVX2-NEXT: vmovdqa 208(%rbp), %ymm9
18771878 ; AVX2-NEXT: vmovdqa 176(%rbp), %ymm10
19121913 ; AVX2-NEXT: vmovdqa %ymm2, 64(%rdi)
19131914 ; AVX2-NEXT: vmovdqa %ymm1, 32(%rdi)
19141915 ; AVX2-NEXT: vmovdqa %ymm0, (%rdi)
1915 ; AVX2-NEXT: movq %rdi, %rax
19161916 ; AVX2-NEXT: movq %rbp, %rsp
19171917 ; AVX2-NEXT: popq %rbp
19181918 ; AVX2-NEXT: vzeroupper
19241924 ; AVX512F-NEXT: movq %rsp, %rbp
19251925 ; AVX512F-NEXT: andq $-32, %rsp
19261926 ; AVX512F-NEXT: subq $32, %rsp
1927 ; AVX512F-NEXT: movq %rdi, %rax
19271928 ; AVX512F-NEXT: vmovdqa 240(%rbp), %ymm8
19281929 ; AVX512F-NEXT: vmovdqa 208(%rbp), %ymm9
19291930 ; AVX512F-NEXT: vmovdqa 176(%rbp), %ymm10
19641965 ; AVX512F-NEXT: vmovdqa %ymm2, 64(%rdi)
19651966 ; AVX512F-NEXT: vmovdqa %ymm1, 32(%rdi)
19661967 ; AVX512F-NEXT: vmovdqa %ymm0, (%rdi)
1967 ; AVX512F-NEXT: movq %rdi, %rax
19681968 ; AVX512F-NEXT: movq %rbp, %rsp
19691969 ; AVX512F-NEXT: popq %rbp
19701970 ; AVX512F-NEXT: vzeroupper
19761976 ; AVX512BW-NEXT: movq %rsp, %rbp
19771977 ; AVX512BW-NEXT: andq $-64, %rsp
19781978 ; AVX512BW-NEXT: subq $64, %rsp
1979 ; AVX512BW-NEXT: movq %rdi, %rax
19791980 ; AVX512BW-NEXT: vpavgb 16(%rbp), %zmm0, %zmm0
19801981 ; AVX512BW-NEXT: vpavgb 80(%rbp), %zmm1, %zmm1
19811982 ; AVX512BW-NEXT: vpavgb 144(%rbp), %zmm2, %zmm2
19921993 ; AVX512BW-NEXT: vmovdqa64 %zmm2, 128(%rdi)
19931994 ; AVX512BW-NEXT: vmovdqa64 %zmm1, 64(%rdi)
19941995 ; AVX512BW-NEXT: vmovdqa64 %zmm0, (%rdi)
1995 ; AVX512BW-NEXT: movq %rdi, %rax
19961996 ; AVX512BW-NEXT: movq %rbp, %rsp
19971997 ; AVX512BW-NEXT: popq %rbp
19981998 ; AVX512BW-NEXT: vzeroupper
726726 define void @test_stack(%struct.S6* noalias nocapture sret %agg.result, %struct.S6* byval nocapture readnone align 8 %s1, %struct.S6* byval nocapture align 8 %s2, i32 %x) local_unnamed_addr #0 {
727727 ; CHECK-LABEL: test_stack:
728728 ; CHECK: # %bb.0: # %entry
729 ; CHECK-NEXT: movq %rdi, %rax
729730 ; CHECK-NEXT: movl %esi, {{[0-9]+}}(%rsp)
730731 ; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm0
731732 ; CHECK-NEXT: movups %xmm0, (%rdi)
732 ; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax
733 ; CHECK-NEXT: movq %rax, 16(%rdi)
734 ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
735 ; CHECK-NEXT: movl %eax, 24(%rdi)
736 ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
737 ; CHECK-NEXT: movl %eax, 28(%rdi)
733 ; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rcx
734 ; CHECK-NEXT: movq %rcx, 16(%rdi)
735 ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %ecx
736 ; CHECK-NEXT: movl %ecx, 24(%rdi)
737 ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %ecx
738 ; CHECK-NEXT: movl %ecx, 28(%rdi)
738739 ; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm0
739 ; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax
740 ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %ecx
740 ; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rcx
741741 ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %edx
742 ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %esi
742743 ; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
743 ; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp)
744 ; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%rsp)
744 ; CHECK-NEXT: movq %rcx, {{[0-9]+}}(%rsp)
745745 ; CHECK-NEXT: movl %edx, {{[0-9]+}}(%rsp)
746 ; CHECK-NEXT: movq %rdi, %rax
746 ; CHECK-NEXT: movl %esi, {{[0-9]+}}(%rsp)
747747 ; CHECK-NEXT: retq
748748 ;
749749 ; DISABLED-LABEL: test_stack:
750750 ; DISABLED: # %bb.0: # %entry
751 ; DISABLED-NEXT: movq %rdi, %rax
751752 ; DISABLED-NEXT: movl %esi, {{[0-9]+}}(%rsp)
752753 ; DISABLED-NEXT: movaps {{[0-9]+}}(%rsp), %xmm0
753754 ; DISABLED-NEXT: movups %xmm0, (%rdi)
757758 ; DISABLED-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1
758759 ; DISABLED-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
759760 ; DISABLED-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp)
760 ; DISABLED-NEXT: movq %rdi, %rax
761761 ; DISABLED-NEXT: retq
762762 ;
763763 ; CHECK-AVX2-LABEL: test_stack:
764764 ; CHECK-AVX2: # %bb.0: # %entry
765 ; CHECK-AVX2-NEXT: movq %rdi, %rax
765766 ; CHECK-AVX2-NEXT: movl %esi, {{[0-9]+}}(%rsp)
766767 ; CHECK-AVX2-NEXT: vmovups {{[0-9]+}}(%rsp), %xmm0
767768 ; CHECK-AVX2-NEXT: vmovups %xmm0, (%rdi)
768 ; CHECK-AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
769 ; CHECK-AVX2-NEXT: movq %rax, 16(%rdi)
770 ; CHECK-AVX2-NEXT: movl {{[0-9]+}}(%rsp), %eax
771 ; CHECK-AVX2-NEXT: movl %eax, 24(%rdi)
772 ; CHECK-AVX2-NEXT: movl {{[0-9]+}}(%rsp), %eax
773 ; CHECK-AVX2-NEXT: movl %eax, 28(%rdi)
769 ; CHECK-AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rcx
770 ; CHECK-AVX2-NEXT: movq %rcx, 16(%rdi)
771 ; CHECK-AVX2-NEXT: movl {{[0-9]+}}(%rsp), %ecx
772 ; CHECK-AVX2-NEXT: movl %ecx, 24(%rdi)
773 ; CHECK-AVX2-NEXT: movl {{[0-9]+}}(%rsp), %ecx
774 ; CHECK-AVX2-NEXT: movl %ecx, 28(%rdi)
774775 ; CHECK-AVX2-NEXT: vmovups {{[0-9]+}}(%rsp), %xmm0
775776 ; CHECK-AVX2-NEXT: vmovups %xmm0, {{[0-9]+}}(%rsp)
776 ; CHECK-AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
777 ; CHECK-AVX2-NEXT: movq %rax, {{[0-9]+}}(%rsp)
778 ; CHECK-AVX2-NEXT: movl {{[0-9]+}}(%rsp), %eax
779 ; CHECK-AVX2-NEXT: movl %eax, {{[0-9]+}}(%rsp)
780 ; CHECK-AVX2-NEXT: movl {{[0-9]+}}(%rsp), %eax
781 ; CHECK-AVX2-NEXT: movl %eax, {{[0-9]+}}(%rsp)
782 ; CHECK-AVX2-NEXT: movq %rdi, %rax
777 ; CHECK-AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rcx
778 ; CHECK-AVX2-NEXT: movq %rcx, {{[0-9]+}}(%rsp)
779 ; CHECK-AVX2-NEXT: movl {{[0-9]+}}(%rsp), %ecx
780 ; CHECK-AVX2-NEXT: movl %ecx, {{[0-9]+}}(%rsp)
781 ; CHECK-AVX2-NEXT: movl {{[0-9]+}}(%rsp), %ecx
782 ; CHECK-AVX2-NEXT: movl %ecx, {{[0-9]+}}(%rsp)
783783 ; CHECK-AVX2-NEXT: retq
784784 ;
785785 ; CHECK-AVX512-LABEL: test_stack:
786786 ; CHECK-AVX512: # %bb.0: # %entry
787 ; CHECK-AVX512-NEXT: movq %rdi, %rax
787788 ; CHECK-AVX512-NEXT: movl %esi, {{[0-9]+}}(%rsp)
788789 ; CHECK-AVX512-NEXT: vmovups {{[0-9]+}}(%rsp), %xmm0
789790 ; CHECK-AVX512-NEXT: vmovups %xmm0, (%rdi)
790 ; CHECK-AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
791 ; CHECK-AVX512-NEXT: movq %rax, 16(%rdi)
792 ; CHECK-AVX512-NEXT: movl {{[0-9]+}}(%rsp), %eax
793 ; CHECK-AVX512-NEXT: movl %eax, 24(%rdi)
794 ; CHECK-AVX512-NEXT: movl {{[0-9]+}}(%rsp), %eax
795 ; CHECK-AVX512-NEXT: movl %eax, 28(%rdi)
791 ; CHECK-AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rcx
792 ; CHECK-AVX512-NEXT: movq %rcx, 16(%rdi)
793 ; CHECK-AVX512-NEXT: movl {{[0-9]+}}(%rsp), %ecx
794 ; CHECK-AVX512-NEXT: movl %ecx, 24(%rdi)
795 ; CHECK-AVX512-NEXT: movl {{[0-9]+}}(%rsp), %ecx
796 ; CHECK-AVX512-NEXT: movl %ecx, 28(%rdi)
796797 ; CHECK-AVX512-NEXT: vmovups {{[0-9]+}}(%rsp), %xmm0
797798 ; CHECK-AVX512-NEXT: vmovups %xmm0, {{[0-9]+}}(%rsp)
798 ; CHECK-AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
799 ; CHECK-AVX512-NEXT: movq %rax, {{[0-9]+}}(%rsp)
800 ; CHECK-AVX512-NEXT: movl {{[0-9]+}}(%rsp), %eax
801 ; CHECK-AVX512-NEXT: movl %eax, {{[0-9]+}}(%rsp)
802 ; CHECK-AVX512-NEXT: movl {{[0-9]+}}(%rsp), %eax
803 ; CHECK-AVX512-NEXT: movl %eax, {{[0-9]+}}(%rsp)
804 ; CHECK-AVX512-NEXT: movq %rdi, %rax
799 ; CHECK-AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rcx
800 ; CHECK-AVX512-NEXT: movq %rcx, {{[0-9]+}}(%rsp)
801 ; CHECK-AVX512-NEXT: movl {{[0-9]+}}(%rsp), %ecx
802 ; CHECK-AVX512-NEXT: movl %ecx, {{[0-9]+}}(%rsp)
803 ; CHECK-AVX512-NEXT: movl {{[0-9]+}}(%rsp), %ecx
804 ; CHECK-AVX512-NEXT: movl %ecx, {{[0-9]+}}(%rsp)
805805 ; CHECK-AVX512-NEXT: retq
806806 entry:
807807 %s6.sroa.0.0..sroa_cast1 = bitcast %struct.S6* %s2 to i8*
121121
122122 ; pass parameters in registers for 64-bit platform
123123 ; X64-LABEL: test_int
124 ; X64: movl {{.*}}, %esi
124125 ; X64: leal {{.*}}, %edi
125 ; X64: movl {{.*}}, %esi
126126 ; X64: call
127127 ; X64: addl {{.*}}, %eax
128128 define i32 @test_int(i32 %a, i32 %b) nounwind {
7474 define <4 x double> @insert_undef_pd(<4 x double> %a0, <2 x double> %a1) {
7575 ; CHECK-LABEL: insert_undef_pd:
7676 ; CHECK: # %bb.0:
77 ; CHECK-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
78 ; CHECK-NEXT: vmovaps %ymm1, %ymm0
77 ; CHECK-NEXT: vmovaps %xmm1, %xmm0
7978 ; CHECK-NEXT: retq
8079 %res = call <4 x double> @llvm.x86.avx.vinsertf128.pd.256(<4 x double> undef, <2 x double> %a1, i8 0)
8180 ret <4 x double> %res
8584 define <8 x float> @insert_undef_ps(<8 x float> %a0, <4 x float> %a1) {
8685 ; CHECK-LABEL: insert_undef_ps:
8786 ; CHECK: # %bb.0:
88 ; CHECK-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
89 ; CHECK-NEXT: vmovaps %ymm1, %ymm0
87 ; CHECK-NEXT: vmovaps %xmm1, %xmm0
9088 ; CHECK-NEXT: retq
9189 %res = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> undef, <4 x float> %a1, i8 0)
9290 ret <8 x float> %res
9694 define <8 x i32> @insert_undef_si(<8 x i32> %a0, <4 x i32> %a1) {
9795 ; CHECK-LABEL: insert_undef_si:
9896 ; CHECK: # %bb.0:
99 ; CHECK-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1
100 ; CHECK-NEXT: vmovaps %ymm1, %ymm0
97 ; CHECK-NEXT: vmovaps %xmm1, %xmm0
10198 ; CHECK-NEXT: retq
10299 %res = call <8 x i32> @llvm.x86.avx.vinsertf128.si.256(<8 x i32> undef, <4 x i32> %a1, i8 0)
103100 ret <8 x i32> %res
903903 define <8 x double> @test_mask_broadcast_vaddpd(<8 x double> %dst, <8 x double> %i,
904904 ; CHECK-LABEL: test_mask_broadcast_vaddpd:
905905 ; CHECK: # %bb.0:
906 ; CHECK-NEXT: vmovapd %zmm1, %zmm0
906907 ; CHECK-NEXT: vptestmq %zmm2, %zmm2, %k1
907 ; CHECK-NEXT: vaddpd (%rdi){1to8}, %zmm1, %zmm1 {%k1}
908 ; CHECK-NEXT: vmovapd %zmm1, %zmm0
908 ; CHECK-NEXT: vaddpd (%rdi){1to8}, %zmm1, %zmm0 {%k1}
909909 ; CHECK-NEXT: retq
910910 double* %j, <8 x i64> %mask1) nounwind {
911911 %mask = icmp ne <8 x i64> %mask1, zeroinitializer
271271 define i32 @test10(i32 %a, i32 %b, i1 %cond) {
272272 ; ALL_X64-LABEL: test10:
273273 ; ALL_X64: ## %bb.0:
274 ; ALL_X64-NEXT: movl %edi, %eax
274275 ; ALL_X64-NEXT: testb $1, %dl
275 ; ALL_X64-NEXT: cmovel %esi, %edi
276 ; ALL_X64-NEXT: movl %edi, %eax
276 ; ALL_X64-NEXT: cmovel %esi, %eax
277277 ; ALL_X64-NEXT: retq
278278 ;
279279 ; KNL_X32-LABEL: test10:
194194 define i64 @test12(<16 x i64>%a, <16 x i64>%b, i64 %a1, i64 %b1) {
195195 ; KNL-LABEL: test12:
196196 ; KNL: ## %bb.0:
197 ; KNL-NEXT: movq %rdi, %rax
197198 ; KNL-NEXT: vpcmpgtq %zmm0, %zmm2, %k0
198 ; KNL-NEXT: kmovw %k0, %eax
199 ; KNL-NEXT: testb $1, %al
200 ; KNL-NEXT: cmoveq %rsi, %rdi
201 ; KNL-NEXT: movq %rdi, %rax
199 ; KNL-NEXT: kmovw %k0, %ecx
200 ; KNL-NEXT: testb $1, %cl
201 ; KNL-NEXT: cmoveq %rsi, %rax
202202 ; KNL-NEXT: vzeroupper
203203 ; KNL-NEXT: retq
204204 ;
205205 ; SKX-LABEL: test12:
206206 ; SKX: ## %bb.0:
207 ; SKX-NEXT: movq %rdi, %rax
207208 ; SKX-NEXT: vpcmpgtq %zmm0, %zmm2, %k0
208 ; SKX-NEXT: kmovd %k0, %eax
209 ; SKX-NEXT: testb $1, %al
210 ; SKX-NEXT: cmoveq %rsi, %rdi
211 ; SKX-NEXT: movq %rdi, %rax
209 ; SKX-NEXT: kmovd %k0, %ecx
210 ; SKX-NEXT: testb $1, %cl
211 ; SKX-NEXT: cmoveq %rsi, %rax
212212 ; SKX-NEXT: vzeroupper
213213 ; SKX-NEXT: retq
214214 %cmpvector_func.i = icmp slt <16 x i64> %a, %b
256256 define i64 @test14(<8 x i64>%a, <8 x i64>%b, i64 %a1, i64 %b1) {
257257 ; KNL-LABEL: test14:
258258 ; KNL: ## %bb.0:
259 ; KNL-NEXT: movq %rdi, %rax
259260 ; KNL-NEXT: vpcmpgtq %zmm0, %zmm1, %k0
260261 ; KNL-NEXT: kshiftrw $4, %k0, %k0
261 ; KNL-NEXT: kmovw %k0, %eax
262 ; KNL-NEXT: testb $1, %al
263 ; KNL-NEXT: cmoveq %rsi, %rdi
264 ; KNL-NEXT: movq %rdi, %rax
262 ; KNL-NEXT: kmovw %k0, %ecx
263 ; KNL-NEXT: testb $1, %cl
264 ; KNL-NEXT: cmoveq %rsi, %rax
265265 ; KNL-NEXT: vzeroupper
266266 ; KNL-NEXT: retq
267267 ;
268268 ; SKX-LABEL: test14:
269269 ; SKX: ## %bb.0:
270 ; SKX-NEXT: movq %rdi, %rax
270271 ; SKX-NEXT: vpcmpgtq %zmm0, %zmm1, %k0
271272 ; SKX-NEXT: kshiftrw $4, %k0, %k0
272 ; SKX-NEXT: kmovd %k0, %eax
273 ; SKX-NEXT: testb $1, %al
274 ; SKX-NEXT: cmoveq %rsi, %rdi
275 ; SKX-NEXT: movq %rdi, %rax
273 ; SKX-NEXT: kmovd %k0, %ecx
274 ; SKX-NEXT: testb $1, %cl
275 ; SKX-NEXT: cmoveq %rsi, %rax
276276 ; SKX-NEXT: vzeroupper
277277 ; SKX-NEXT: retq
278278 %cmpvector_func.i = icmp slt <8 x i64> %a, %b
58525852 ;
58535853 ; X64-LABEL: test_kand:
58545854 ; X64: ## %bb.0:
5855 ; X64-NEXT: andl %esi, %edi ## encoding: [0x21,0xf7]
5856 ; X64-NEXT: andl $8, %edi ## encoding: [0x83,0xe7,0x08]
58575855 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
5856 ; X64-NEXT: andl %esi, %eax ## encoding: [0x21,0xf0]
5857 ; X64-NEXT: andl $8, %eax ## encoding: [0x83,0xe0,0x08]
5858 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
58585859 ; X64-NEXT: retq ## encoding: [0xc3]
58595860 %t1 = call i16 @llvm.x86.avx512.kand.w(i16 %a0, i16 8)
58605861 %t2 = call i16 @llvm.x86.avx512.kand.w(i16 %t1, i16 %a1)
58745875 ;
58755876 ; X64-LABEL: test_kandn:
58765877 ; X64: ## %bb.0:
5877 ; X64-NEXT: orl $-9, %edi ## encoding: [0x83,0xcf,0xf7]
5878 ; X64-NEXT: andl %esi, %edi ## encoding: [0x21,0xf7]
58795878 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
5879 ; X64-NEXT: orl $-9, %eax ## encoding: [0x83,0xc8,0xf7]
5880 ; X64-NEXT: andl %esi, %eax ## encoding: [0x21,0xf0]
5881 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
58805882 ; X64-NEXT: retq ## encoding: [0xc3]
58815883 %t1 = call i16 @llvm.x86.avx512.kandn.w(i16 %a0, i16 8)
58825884 %t2 = call i16 @llvm.x86.avx512.kandn.w(i16 %t1, i16 %a1)
58945896 ;
58955897 ; X64-LABEL: test_knot:
58965898 ; X64: ## %bb.0:
5897 ; X64-NEXT: notl %edi ## encoding: [0xf7,0xd7]
58985899 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
5900 ; X64-NEXT: notl %eax ## encoding: [0xf7,0xd0]
5901 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
58995902 ; X64-NEXT: retq ## encoding: [0xc3]
59005903 %res = call i16 @llvm.x86.avx512.knot.w(i16 %a0)
59015904 ret i16 %res
59135916 ;
59145917 ; X64-LABEL: test_kor:
59155918 ; X64: ## %bb.0:
5916 ; X64-NEXT: orl %esi, %edi ## encoding: [0x09,0xf7]
5917 ; X64-NEXT: orl $8, %edi ## encoding: [0x83,0xcf,0x08]
59185919 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
5920 ; X64-NEXT: orl %esi, %eax ## encoding: [0x09,0xf0]
5921 ; X64-NEXT: orl $8, %eax ## encoding: [0x83,0xc8,0x08]
5922 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
59195923 ; X64-NEXT: retq ## encoding: [0xc3]
59205924 %t1 = call i16 @llvm.x86.avx512.kor.w(i16 %a0, i16 8)
59215925 %t2 = call i16 @llvm.x86.avx512.kor.w(i16 %t1, i16 %a1)
59365940 ;
59375941 ; X64-LABEL: test_kxnor:
59385942 ; X64: ## %bb.0:
5939 ; X64-NEXT: xorl %esi, %edi ## encoding: [0x31,0xf7]
5940 ; X64-NEXT: xorl $8, %edi ## encoding: [0x83,0xf7,0x08]
59415943 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
5944 ; X64-NEXT: xorl %esi, %eax ## encoding: [0x31,0xf0]
5945 ; X64-NEXT: xorl $8, %eax ## encoding: [0x83,0xf0,0x08]
5946 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
59425947 ; X64-NEXT: retq ## encoding: [0xc3]
59435948 %t1 = call i16 @llvm.x86.avx512.kxnor.w(i16 %a0, i16 8)
59445949 %t2 = call i16 @llvm.x86.avx512.kxnor.w(i16 %t1, i16 %a1)
59575962 ;
59585963 ; X64-LABEL: test_kxor:
59595964 ; X64: ## %bb.0:
5960 ; X64-NEXT: xorl %esi, %edi ## encoding: [0x31,0xf7]
5961 ; X64-NEXT: xorl $8, %edi ## encoding: [0x83,0xf7,0x08]
59625965 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
5966 ; X64-NEXT: xorl %esi, %eax ## encoding: [0x31,0xf0]
5967 ; X64-NEXT: xorl $8, %eax ## encoding: [0x83,0xf0,0x08]
5968 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
59635969 ; X64-NEXT: retq ## encoding: [0xc3]
59645970 %t1 = call i16 @llvm.x86.avx512.kxor.w(i16 %a0, i16 8)
59655971 %t2 = call i16 @llvm.x86.avx512.kxor.w(i16 %t1, i16 %a1)
88 define i16 @mask16(i16 %x) {
99 ; CHECK-LABEL: mask16:
1010 ; CHECK: ## %bb.0:
11 ; CHECK-NEXT: notl %edi
1211 ; CHECK-NEXT: movl %edi, %eax
12 ; CHECK-NEXT: notl %eax
13 ; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
1314 ; CHECK-NEXT: retq
1415 ;
1516 ; X86-LABEL: mask16:
4647 define i8 @mask8(i8 %x) {
4748 ; CHECK-LABEL: mask8:
4849 ; CHECK: ## %bb.0:
49 ; CHECK-NEXT: notb %dil
5050 ; CHECK-NEXT: movl %edi, %eax
51 ; CHECK-NEXT: notb %al
52 ; CHECK-NEXT: ## kill: def $al killed $al killed $eax
5153 ; CHECK-NEXT: retq
5254 ;
5355 ; X86-LABEL: mask8:
148150 ; CHECK-LABEL: mand16:
149151 ; CHECK: ## %bb.0:
150152 ; CHECK-NEXT: movl %edi, %eax
151 ; CHECK-NEXT: xorl %esi, %eax
152 ; CHECK-NEXT: andl %esi, %edi
153 ; CHECK-NEXT: orl %eax, %edi
154 ; CHECK-NEXT: movl %edi, %eax
153 ; CHECK-NEXT: movl %edi, %ecx
154 ; CHECK-NEXT: xorl %esi, %ecx
155 ; CHECK-NEXT: andl %esi, %eax
156 ; CHECK-NEXT: orl %ecx, %eax
157 ; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
155158 ; CHECK-NEXT: retq
156159 ;
157160 ; X86-LABEL: mand16:
923923 ; X32-NEXT: pushl %ebx
924924 ; X32-NEXT: subl $20, %esp
925925 ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
926 ; X32-NEXT: movl %edi, %esi
927926 ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
928 ; X32-NEXT: movl %edx, %ebx
929927 ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
930928 ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
931 ; X32-NEXT: movl %eax, %edx
929 ; X32-NEXT: movl %eax, %ebx
932930 ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
933 ; X32-NEXT: subl %ecx, %edx
934 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
931 ; X32-NEXT: subl %ecx, %ebx
932 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
933 ; X32-NEXT: movl %esi, %ebp
934 ; X32-NEXT: subl {{[0-9]+}}(%esp), %ebp
935 ; X32-NEXT: imull %ebp, %ebx
936 ; X32-NEXT: movl %edx, %ebp
937 ; X32-NEXT: subl %edi, %ebp
938 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
939 ; X32-NEXT: movl %edx, %ecx
940 ; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx
941 ; X32-NEXT: imull %ebp, %ecx
942 ; X32-NEXT: addl %ecx, %ebx
943 ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
935944 ; X32-NEXT: movl %edi, %ebp
936 ; X32-NEXT: subl {{[0-9]+}}(%esp), %ebp
937 ; X32-NEXT: imull %ebp, %edx
938 ; X32-NEXT: subl %esi, %ebx
939 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
940 ; X32-NEXT: movl %esi, %ecx
941 ; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx
942 ; X32-NEXT: imull %ebx, %ecx
943 ; X32-NEXT: addl %ecx, %edx
944 ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
945 ; X32-NEXT: movl %ebx, %ebp
946945 ; X32-NEXT: subl {{[0-9]+}}(%esp), %ebp
947946 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
948947 ; X32-NEXT: movl %ecx, %eax
949948 ; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
950949 ; X32-NEXT: imull %ebp, %eax
951 ; X32-NEXT: addl %eax, %edx
950 ; X32-NEXT: addl %eax, %ebx
952951 ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
953952 ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
954953 ; X32-NEXT: movl (%esp), %ebp # 4-byte Reload
955954 ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
956 ; X32-NEXT: addl {{[0-9]+}}(%esp), %ebx
957955 ; X32-NEXT: addl {{[0-9]+}}(%esp), %edi
958 ; X32-NEXT: imull %eax, %edi
959956 ; X32-NEXT: addl {{[0-9]+}}(%esp), %esi
960 ; X32-NEXT: imull %ebp, %esi
961 ; X32-NEXT: addl %edi, %esi
957 ; X32-NEXT: imull %eax, %esi
958 ; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
959 ; X32-NEXT: imull %ebp, %edx
960 ; X32-NEXT: addl %esi, %edx
962961 ; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
963 ; X32-NEXT: imull %ebx, %ecx
964 ; X32-NEXT: addl %esi, %ecx
965 ; X32-NEXT: addl %ecx, %edx
966 ; X32-NEXT: movl %edx, %eax
962 ; X32-NEXT: imull %edi, %ecx
963 ; X32-NEXT: addl %edx, %ecx
964 ; X32-NEXT: addl %ecx, %ebx
965 ; X32-NEXT: movl %ebx, %eax
967966 ; X32-NEXT: addl $20, %esp
968967 ; X32-NEXT: popl %ebx
969968 ; X32-NEXT: popl %ebp
946946 define <8 x double> @test_mask_broadcast_vaddpd(<8 x double> %dst, <8 x double> %i, double* %j, <8 x i64> %mask1) nounwind {
947947 ; GENERIC-LABEL: test_mask_broadcast_vaddpd:
948948 ; GENERIC: # %bb.0:
949 ; GENERIC-NEXT: vmovapd %zmm1, %zmm0 # sched: [1:1.00]
949950 ; GENERIC-NEXT: vptestmq %zmm2, %zmm2, %k1 # sched: [1:0.33]
950 ; GENERIC-NEXT: vaddpd (%rdi){1to8}, %zmm1, %zmm1 {%k1} # sched: [10:1.00]
951 ; GENERIC-NEXT: vmovapd %zmm1, %zmm0 # sched: [1:1.00]
951 ; GENERIC-NEXT: vaddpd (%rdi){1to8}, %zmm1, %zmm0 {%k1} # sched: [10:1.00]
952952 ; GENERIC-NEXT: retq # sched: [1:1.00]
953953 ;
954954 ; SKX-LABEL: test_mask_broadcast_vaddpd:
955955 ; SKX: # %bb.0:
956 ; SKX-NEXT: vmovapd %zmm1, %zmm0 # sched: [1:0.33]
956957 ; SKX-NEXT: vptestmq %zmm2, %zmm2, %k1 # sched: [3:1.00]
957 ; SKX-NEXT: vaddpd (%rdi){1to8}, %zmm1, %zmm1 {%k1} # sched: [11:0.50]
958 ; SKX-NEXT: vmovapd %zmm1, %zmm0 # sched: [1:0.33]
958 ; SKX-NEXT: vaddpd (%rdi){1to8}, %zmm1, %zmm0 {%k1} # sched: [11:0.50]
959959 ; SKX-NEXT: retq # sched: [7:1.00]
960960 %mask = icmp ne <8 x i64> %mask1, zeroinitializer
961961 %tmp = load double, double* %j
66686668 define i16 @mask16(i16 %x) {
66696669 ; GENERIC-LABEL: mask16:
66706670 ; GENERIC: # %bb.0:
6671 ; GENERIC-NEXT: notl %edi # sched: [1:0.33]
66726671 ; GENERIC-NEXT: movl %edi, %eax # sched: [1:0.33]
6672 ; GENERIC-NEXT: notl %eax # sched: [1:0.33]
6673 ; GENERIC-NEXT: # kill: def $ax killed $ax killed $eax
66736674 ; GENERIC-NEXT: retq # sched: [1:1.00]
66746675 ;
66756676 ; SKX-LABEL: mask16:
66766677 ; SKX: # %bb.0:
6677 ; SKX-NEXT: notl %edi # sched: [1:0.25]
66786678 ; SKX-NEXT: movl %edi, %eax # sched: [1:0.25]
6679 ; SKX-NEXT: notl %eax # sched: [1:0.25]
6680 ; SKX-NEXT: # kill: def $ax killed $ax killed $eax
66796681 ; SKX-NEXT: retq # sched: [7:1.00]
66806682 %m0 = bitcast i16 %x to <16 x i1>
66816683 %m1 = xor <16 x i1> %m0,
67056707 define i8 @mask8(i8 %x) {
67066708 ; GENERIC-LABEL: mask8:
67076709 ; GENERIC: # %bb.0:
6708 ; GENERIC-NEXT: notb %dil # sched: [1:0.33]
67096710 ; GENERIC-NEXT: movl %edi, %eax # sched: [1:0.33]
6711 ; GENERIC-NEXT: notb %al # sched: [1:0.33]
6712 ; GENERIC-NEXT: # kill: def $al killed $al killed $eax
67106713 ; GENERIC-NEXT: retq # sched: [1:1.00]
67116714 ;
67126715 ; SKX-LABEL: mask8:
67136716 ; SKX: # %bb.0:
6714 ; SKX-NEXT: notb %dil # sched: [1:0.25]
67156717 ; SKX-NEXT: movl %edi, %eax # sched: [1:0.25]
6718 ; SKX-NEXT: notb %al # sched: [1:0.25]
6719 ; SKX-NEXT: # kill: def $al killed $al killed $eax
67166720 ; SKX-NEXT: retq # sched: [7:1.00]
67176721 %m0 = bitcast i8 %x to <8 x i1>
67186722 %m1 = xor <8 x i1> %m0,
67876791 ; GENERIC-LABEL: mand16:
67886792 ; GENERIC: # %bb.0:
67896793 ; GENERIC-NEXT: movl %edi, %eax # sched: [1:0.33]
6790 ; GENERIC-NEXT: xorl %esi, %eax # sched: [1:0.33]
6791 ; GENERIC-NEXT: andl %esi, %edi # sched: [1:0.33]
6792 ; GENERIC-NEXT: orl %eax, %edi # sched: [1:0.33]
6793 ; GENERIC-NEXT: movl %edi, %eax # sched: [1:0.33]
6794 ; GENERIC-NEXT: movl %edi, %ecx # sched: [1:0.33]
6795 ; GENERIC-NEXT: xorl %esi, %ecx # sched: [1:0.33]
6796 ; GENERIC-NEXT: andl %esi, %eax # sched: [1:0.33]
6797 ; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
6798 ; GENERIC-NEXT: # kill: def $ax killed $ax killed $eax
67946799 ; GENERIC-NEXT: retq # sched: [1:1.00]
67956800 ;
67966801 ; SKX-LABEL: mand16:
67976802 ; SKX: # %bb.0:
67986803 ; SKX-NEXT: movl %edi, %eax # sched: [1:0.25]
6799 ; SKX-NEXT: xorl %esi, %eax # sched: [1:0.25]
6800 ; SKX-NEXT: andl %esi, %edi # sched: [1:0.25]
6801 ; SKX-NEXT: orl %eax, %edi # sched: [1:0.25]
6802 ; SKX-NEXT: movl %edi, %eax # sched: [1:0.25]
6804 ; SKX-NEXT: movl %edi, %ecx # sched: [1:0.25]
6805 ; SKX-NEXT: xorl %esi, %ecx # sched: [1:0.25]
6806 ; SKX-NEXT: andl %esi, %eax # sched: [1:0.25]
6807 ; SKX-NEXT: orl %ecx, %eax # sched: [1:0.25]
6808 ; SKX-NEXT: # kill: def $ax killed $ax killed $eax
68036809 ; SKX-NEXT: retq # sched: [7:1.00]
68046810 %ma = bitcast i16 %x to <16 x i1>
68056811 %mb = bitcast i16 %y to <16 x i1>