llvm.org GIT mirror llvm / 712ad0c
allow a virtual register to be associated with live-in values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21927 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 15 years ago
3 changed file(s) with 22 addition(s) and 15 deletion(s). Raw diff Collapse all Expand all
107107 /// LiveIns/LiveOuts - Keep track of the physical registers that are
108108 /// livein/liveout of the function. Live in values are typically arguments in
109109 /// registers, live out values are typically return values in registers.
110 std::vector LiveIns, LiveOuts;
110 /// LiveIn values are allowed to have virtual registers associated with them,
111 /// stored in the second element.
112 std::vector > LiveIns;
113 std::vector LiveOuts;
111114
112115 public:
113116 MachineFunction(const Function *Fn, const TargetMachine &TM);
176179
177180 /// addLiveIn/Out - Add the specified register as a live in/out. Note that it
178181 /// is an error to add the same register to the same set more than once.
179 void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); }
182 void addLiveIn(unsigned Reg, unsigned vreg = 0) {
183 LiveIns.push_back(std::make_pair(Reg, vreg));
184 }
180185 void addLiveOut(unsigned Reg) { LiveOuts.push_back(Reg); }
181186
182187 // Iteration support for live in/out sets. These sets are kept in sorted
183188 // order by their register number.
184 typedef std::vector::const_iterator liveinout_iterator;
185 liveinout_iterator livein_begin() const { return LiveIns.begin(); }
186 liveinout_iterator livein_end() const { return LiveIns.end(); }
187 liveinout_iterator liveout_begin() const { return LiveOuts.begin(); }
188 liveinout_iterator liveout_end() const { return LiveOuts.end(); }
189 typedef std::vector >::const_iterator
190 livein_iterator;
191 typedef std::vector::const_iterator liveout_iterator;
192 livein_iterator livein_begin() const { return LiveIns.begin(); }
193 livein_iterator livein_end() const { return LiveIns.end(); }
194 liveout_iterator liveout_begin() const { return LiveOuts.begin(); }
195 liveout_iterator liveout_end() const { return LiveOuts.end(); }
189196
190197 /// getBlockNumbered - MachineBasicBlocks are automatically numbered when they
191198 /// are inserted into the machine function. The block number for a machine
9494 // beginning of the function that we will pretend "defines" the values. This
9595 // is to make the interval analysis simpler by providing a number.
9696 if (fn.livein_begin() != fn.livein_end()) {
97 unsigned FirstLiveIn = *fn.livein_begin();
97 unsigned FirstLiveIn = fn.livein_begin()->first;
9898
9999 // Find a reg class that contains this live in.
100100 const TargetRegisterClass *RC = 0;
127127 // Note intervals due to live-in values.
128128 if (fn.livein_begin() != fn.livein_end()) {
129129 MachineBasicBlock *Entry = fn.begin();
130 for (MachineFunction::liveinout_iterator I = fn.livein_begin(),
130 for (MachineFunction::livein_iterator I = fn.livein_begin(),
131131 E = fn.livein_end(); I != E; ++I) {
132132 handlePhysicalRegisterDef(Entry, Entry->begin(),
133 getOrCreateInterval(*I), 0, 0);
134 for (const unsigned* AS = mri_->getAliasSet(*I); *AS; ++AS)
133 getOrCreateInterval(I->first), 0, 0);
134 for (const unsigned* AS = mri_->getAliasSet(I->first); *AS; ++AS)
135135 handlePhysicalRegisterDef(Entry, Entry->begin(),
136136 getOrCreateInterval(*AS), 0, 0);
137137 }
164164 VirtRegInfo.resize(64);
165165
166166 // Mark live-in registers as live-in.
167 for (MachineFunction::liveinout_iterator I = MF.livein_begin(),
167 for (MachineFunction::livein_iterator I = MF.livein_begin(),
168168 E = MF.livein_end(); I != E; ++I) {
169 assert(MRegisterInfo::isPhysicalRegister(*I) &&
169 assert(MRegisterInfo::isPhysicalRegister(I->first) &&
170170 "Cannot have a live-in virtual register!");
171 HandlePhysRegDef(*I, 0);
171 HandlePhysRegDef(I->first, 0);
172172 }
173173
174174 // Calculate live variable information in depth first order on the CFG of the
271271 // it as using all of the live-out values in the function.
272272 if (!MBB->empty() && TII.isReturn(MBB->back().getOpcode())) {
273273 MachineInstr *Ret = &MBB->back();
274 for (MachineFunction::liveinout_iterator I = MF.liveout_begin(),
274 for (MachineFunction::liveout_iterator I = MF.liveout_begin(),
275275 E = MF.liveout_end(); I != E; ++I) {
276276 assert(MRegisterInfo::isPhysicalRegister(*I) &&
277277 "Cannot have a live-in virtual register!");