llvm.org GIT mirror llvm / 706d946
Add support for parsing dmb/dsb instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125055 91177308-0d34-0410-b5e6-96231b3b80d8 Bruno Cardoso Lopes 9 years ago
5 changed file(s) with 148 addition(s) and 9 deletion(s). Raw diff Collapse all Expand all
146146 def CCOutOperand : AsmOperandClass {
147147 let Name = "CCOut";
148148 let SuperClasses = [];
149 }
150
151 def MemBarrierOptOperand : AsmOperandClass {
152 let Name = "MemBarrierOpt";
153 let SuperClasses = [];
154 let ParserMethod = "ParseMemBarrierOptOperand";
149155 }
150156
151157 // ARM Predicate operand. Default to 14 = always (AL). Second part is CC
31903190
31913191 def memb_opt : Operand {
31923192 let PrintMethod = "printMemBOption";
3193 let ParserMatchClass = MemBarrierOptOperand;
31933194 }
31943195
31953196 // memory barriers protect the atomic sequences
5757 bool ParseCoprocNumOperand(SmallVectorImpl&);
5858 bool ParseCoprocRegOperand(SmallVectorImpl&);
5959 bool ParseRegisterList(SmallVectorImpl &);
60 bool ParseMemBarrierOptOperand(SmallVectorImpl &);
6061 bool ParseMemory(SmallVectorImpl &);
6162 bool ParseOperand(SmallVectorImpl &, StringRef Mnemonic);
6263 bool ParsePrefix(ARMMCExpr::VariantKind &RefKind);
118119 CoprocNum,
119120 CoprocReg,
120121 Immediate,
122 MemBarrierOpt,
121123 Memory,
122124 Register,
123125 RegisterList,
133135 struct {
134136 ARMCC::CondCodes Val;
135137 } CC;
138
139 struct {
140 ARM_MB::MemBOpt Val;
141 } MBOpt;
136142
137143 struct {
138144 unsigned Val;
198204 case Immediate:
199205 Imm = o.Imm;
200206 break;
207 case MemBarrierOpt:
208 MBOpt = o.MBOpt;
209 break;
201210 case Memory:
202211 Mem = o.Mem;
203212 break;
238247 const MCExpr *getImm() const {
239248 assert(Kind == Immediate && "Invalid access!");
240249 return Imm.Val;
250 }
251
252 ARM_MB::MemBOpt getMemBarrierOpt() const {
253 assert(Kind == MemBarrierOpt && "Invalid access!");
254 return MBOpt.Val;
241255 }
242256
243257 /// @name Memory Operand Accessors
284298 bool isDPRRegList() const { return Kind == DPRRegisterList; }
285299 bool isSPRRegList() const { return Kind == SPRRegisterList; }
286300 bool isToken() const { return Kind == Token; }
301 bool isMemBarrierOpt() const { return Kind == MemBarrierOpt; }
287302 bool isMemory() const { return Kind == Memory; }
288303 bool isMemMode5() const {
289304 if (!isMemory() || getMemOffsetIsReg() || getMemWriteback() ||
370385 void addImmOperands(MCInst &Inst, unsigned N) const {
371386 assert(N == 1 && "Invalid number of operands!");
372387 addExpr(Inst, getImm());
388 }
389
390 void addMemBarrierOptOperands(MCInst &Inst, unsigned N) const {
391 assert(N == 1 && "Invalid number of operands!");
392 Inst.addOperand(MCOperand::CreateImm(unsigned(getMemBarrierOpt())));
373393 }
374394
375395 void addMemMode5Operands(MCInst &Inst, unsigned N) const {
523543 Op->EndLoc = E;
524544 return Op;
525545 }
546
547 static ARMOperand *CreateMemBarrierOpt(ARM_MB::MemBOpt Opt, SMLoc S) {
548 ARMOperand *Op = new ARMOperand(MemBarrierOpt);
549 Op->MBOpt.Val = Opt;
550 Op->StartLoc = S;
551 Op->EndLoc = S;
552 return Op;
553 }
526554 };
527555
528556 } // end anonymous namespace.
543571 break;
544572 case Immediate:
545573 getImm()->print(OS);
574 break;
575 case MemBarrierOpt:
576 OS << "";
546577 break;
547578 case Memory:
548579 OS << "
819850 }
820851
821852 Operands.push_back(ARMOperand::CreateRegList(Registers, S, E));
853 return false;
854 }
855
856 /// ParseMemBarrierOptOperand - Try to parse DSB/DMB data barrier options.
857 bool ARMAsmParser::
858 ParseMemBarrierOptOperand(SmallVectorImpl &Operands) {
859 SMLoc S = Parser.getTok().getLoc();
860 const AsmToken &Tok = Parser.getTok();
861 assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier");
862 StringRef OptStr = Tok.getString();
863
864 unsigned Opt = StringSwitch(OptStr.slice(0, OptStr.size()))
865 .Case("sy", ARM_MB::SY)
866 .Case("st", ARM_MB::ST)
867 .Case("ish", ARM_MB::ISH)
868 .Case("ishst", ARM_MB::ISHST)
869 .Case("nsh", ARM_MB::NSH)
870 .Case("nshst", ARM_MB::NSHST)
871 .Case("osh", ARM_MB::OSH)
872 .Case("oshst", ARM_MB::OSHST)
873 .Default(~0U);
874
875 if (Opt == ~0U)
876 return true;
877
878 Parser.Lex(); // Eat identifier token.
879 Operands.push_back(ARMOperand::CreateMemBarrierOpt((ARM_MB::MemBOpt)Opt, S));
822880 return false;
823881 }
824882
187187
188188 @ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3]
189189 nop
190
191 @ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5]
192 dmb sy
193
194 @ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5]
195 dmb st
196
197 @ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
198 dmb ish
199
200 @ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5]
201 dmb ishst
202
203 @ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5]
204 dmb nsh
205
206 @ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5]
207 dmb nshst
208
209 @ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5]
210 dmb osh
211
212 @ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5]
213 dmb oshst
214
215 @ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5]
216 dsb sy
217
218 @ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5]
219 dsb st
220
221 @ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5]
222 dsb ish
223
224 @ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5]
225 dsb ishst
226
227 @ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
228 dsb nsh
229
230 @ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5]
231 dsb nshst
232
233 @ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5]
234 dsb osh
235
236 @ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5]
237 dsb oshst
238
9090 pkhtb r0, r0, r1, asr #18
9191 @ CHECK: pkhtb r0, r0, r1, asr #22 @ encoding: [0xa1,0x50,0xc0,0xea]
9292 pkhtb r0, r0, r1, asr #22
93
94 @ CHECK: dmb st @ encoding: [0x5e,0x8f,0xbf,0xf3]
95 dmb st
96 @ CHECK: dmb sy @ encoding: [0x5f,0x8f,0xbf,0xf3]
97 dmb sy
98 @ CHECK: dmb ishst @ encoding: [0x5a,0x8f,0xbf,0xf3]
99 dmb ishst
100 @ CHECK: dmb ish @ encoding: [0x5b,0x8f,0xbf,0xf3]
101 dmb ish
10293
10394 @ CHECK: str.w r0, [r1, #4092] @ encoding: [0xfc,0x0f,0xc1,0xf8]
10495 str.w r0, [r1, #4092]
226217 @ CHECK: wfi.w @ encoding: [0xaf,0xf3,0x03,0x80]
227218 wfi.w
228219
220 @ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f]
221 dmb sy
222 @ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f]
223 dmb st
224 @ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f]
225 dmb ish
226 @ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f]
227 dmb ishst
228 @ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f]
229 dmb nsh
230 @ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f]
231 dmb nshst
232 @ CHECK: dmb osh @ encoding: [0xbf,0xf3,0x53,0x8f]
233 dmb osh
234 @ CHECK: dmb oshst @ encoding: [0xbf,0xf3,0x52,0x8f]
235 dmb oshst
236
237 @ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f]
238 dsb sy
239 @ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f]
240 dsb st
241 @ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f]
242 dsb ish
243 @ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f]
244 dsb ishst
245 @ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f]
246 dsb nsh
247 @ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f]
248 dsb nshst
249 @ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f]
250 dsb osh
251 @ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f]
252 dsb oshst
253