llvm.org GIT mirror llvm / 700ed80
Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo to TargetFrameLowering, where it belongs. Incidentally, this allows us to delete some duplicated (and slightly different!) code in TRI. There are potentially other layering problems that can be cleaned up as a result, or in a similar manner. The refactoring was OK'd by Anton Korobeynikov on llvmdev. Note: this touches the target interfaces, so out-of-tree targets may be affected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8 Eli Bendersky 6 years ago
56 changed file(s) with 558 addition(s) and 587 deletion(s). Raw diff Collapse all Expand all
195195 ///
196196 virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
197197 }
198
199 /// eliminateCallFramePseudoInstr - This method is called during prolog/epilog
200 /// code insertion to eliminate call frame setup and destroy pseudo
201 /// instructions (but only if the Target is using them). It is responsible
202 /// for eliminating these instructions, replacing them with concrete
203 /// instructions. This method need only be implemented if using call frame
204 /// setup/destroy pseudo instructions.
205 ///
206 virtual void
207 eliminateCallFramePseudoInstr(MachineFunction &MF,
208 MachineBasicBlock &MBB,
209 MachineBasicBlock::iterator MI) const {
210 llvm_unreachable("Call Frame Pseudo Instructions do not exist on this "
211 "target!");
212 }
198213 };
199214
200215 } // End llvm namespace
730730 virtual bool isFrameOffsetLegal(const MachineInstr *MI,
731731 int64_t Offset) const {
732732 llvm_unreachable("isFrameOffsetLegal does not exist on this target");
733 }
734
735 /// eliminateCallFramePseudoInstr - This method is called during prolog/epilog
736 /// code insertion to eliminate call frame setup and destroy pseudo
737 /// instructions (but only if the Target is using them). It is responsible
738 /// for eliminating these instructions, replacing them with concrete
739 /// instructions. This method need only be implemented if using call frame
740 /// setup/destroy pseudo instructions.
741 ///
742 virtual void
743 eliminateCallFramePseudoInstr(MachineFunction &MF,
744 MachineBasicBlock &MBB,
745 MachineBasicBlock::iterator MI) const {
746 llvm_unreachable("Call Frame Pseudo Instructions do not exist on this "
747 "target!");
748733 }
749734
750735
138138 /// variables for the function's frame information and eliminate call frame
139139 /// pseudo instructions.
140140 void PEI::calculateCallsInformation(MachineFunction &Fn) {
141 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
142141 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
143142 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
144143 MachineFrameInfo *MFI = Fn.getFrameInfo();
185184 // here. The sub/add sp instruction pairs are still inserted, but we don't
186185 // need to track the SP adjustment for frame index elimination.
187186 if (TFI->canSimplifyCallFramePseudos(Fn))
188 RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
187 TFI->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
189188 }
190189 }
191190
746745
747746 MachineBasicBlock::iterator PrevI = BB->end();
748747 if (I != BB->begin()) PrevI = prior(I);
749 TRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
748 TFI->eliminateCallFramePseudoInstr(Fn, *BB, I);
750749
751750 // Visit the instructions created by eliminateCallFramePseudoInstr().
752751 if (PrevI == BB->end())
643643 // variable-sized objects that prevent reservation of a call frame.
644644 return !(hasFP(MF) && MFI->hasVarSizedObjects());
645645 }
646
647 void
648 AArch64FrameLowering::eliminateCallFramePseudoInstr(
649 MachineFunction &MF,
650 MachineBasicBlock &MBB,
651 MachineBasicBlock::iterator MI) const {
652 const AArch64InstrInfo &TII =
653 *static_cast(MF.getTarget().getInstrInfo());
654 DebugLoc dl = MI->getDebugLoc();
655 int Opcode = MI->getOpcode();
656 bool IsDestroy = Opcode == TII.getCallFrameDestroyOpcode();
657 uint64_t CalleePopAmount = IsDestroy ? MI->getOperand(1).getImm() : 0;
658
659 if (!hasReservedCallFrame(MF)) {
660 unsigned Align = getStackAlignment();
661
662 int64_t Amount = MI->getOperand(0).getImm();
663 Amount = RoundUpToAlignment(Amount, Align);
664 if (!IsDestroy) Amount = -Amount;
665
666 // N.b. if CalleePopAmount is valid but zero (i.e. callee would pop, but it
667 // doesn't have to pop anything), then the first operand will be zero too so
668 // this adjustment is a no-op.
669 if (CalleePopAmount == 0) {
670 // FIXME: in-function stack adjustment for calls is limited to 12-bits
671 // because there's no guaranteed temporary register available. Mostly call
672 // frames will be allocated at the start of a function so this is OK, but
673 // it is a limitation that needs dealing with.
674 assert(Amount > -0xfff && Amount < 0xfff && "call frame too large");
675 emitSPUpdate(MBB, MI, dl, TII, AArch64::NoRegister, Amount);
676 }
677 } else if (CalleePopAmount != 0) {
678 // If the calling convention demands that the callee pops arguments from the
679 // stack, we want to add it back if we have a reserved call frame.
680 assert(CalleePopAmount < 0xfff && "call frame too large");
681 emitSPUpdate(MBB, MI, dl, TII, AArch64::NoRegister, -CalleePopAmount);
682 }
683
684 MBB.erase(MI);
685 }
7070 const std::vector &CSI,
7171 const TargetRegisterInfo *TRI) const;
7272
73 void eliminateCallFramePseudoInstr(MachineFunction &MF,
74 MachineBasicBlock &MBB,
75 MachineBasicBlock::iterator MI) const;
76
7377 /// If the register is X30 (i.e. LR) and the return address is used in the
7478 /// function then the callee-save store doesn't actually kill the register,
7579 /// otherwise it does.
151151 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset / OffsetScale);
152152 }
153153
154 void
155 AArch64RegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF,
156 MachineBasicBlock &MBB,
157 MachineBasicBlock::iterator MI) const {
158 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
159 DebugLoc dl = MI->getDebugLoc();
160 int Opcode = MI->getOpcode();
161 bool IsDestroy = Opcode == TII.getCallFrameDestroyOpcode();
162 uint64_t CalleePopAmount = IsDestroy ? MI->getOperand(1).getImm() : 0;
163
164 if (!TFI->hasReservedCallFrame(MF)) {
165 unsigned Align = TFI->getStackAlignment();
166
167 int64_t Amount = MI->getOperand(0).getImm();
168 Amount = RoundUpToAlignment(Amount, Align);
169 if (!IsDestroy) Amount = -Amount;
170
171 // N.b. if CalleePopAmount is valid but zero (i.e. callee would pop, but it
172 // doesn't have to pop anything), then the first operand will be zero too so
173 // this adjustment is a no-op.
174 if (CalleePopAmount == 0) {
175 // FIXME: in-function stack adjustment for calls is limited to 12-bits
176 // because there's no guaranteed temporary register available. Mostly call
177 // frames will be allocated at the start of a function so this is OK, but
178 // it is a limitation that needs dealing with.
179 assert(Amount > -0xfff && Amount < 0xfff && "call frame too large");
180 emitSPUpdate(MBB, MI, dl, TII, AArch64::NoRegister, Amount);
181 }
182 } else if (CalleePopAmount != 0) {
183 // If the calling convention demands that the callee pops arguments from the
184 // stack, we want to add it back if we have a reserved call frame.
185 assert(CalleePopAmount < 0xfff && "call frame too large");
186 emitSPUpdate(MBB, MI, dl, TII, AArch64::NoRegister, -CalleePopAmount);
187 }
188
189 MBB.erase(MI);
190 }
191
192154 unsigned
193155 AArch64RegisterInfo::getFrameRegister(const MachineFunction &MF) const {
194156 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
4343 unsigned FIOperandNum,
4444 RegScavenger *Rs = NULL) const;
4545
46 void eliminateCallFramePseudoInstr(MachineFunction &MF,
47 MachineBasicBlock &MBB,
48 MachineBasicBlock::iterator MI) const;
49
5046 /// getCrossCopyRegClass - Returns a legal register class to copy a register
5147 /// in the specified class to or from. Returns original class if it is
5248 /// possible to copy between a two registers of the specified class.
400400 return true;
401401 }
402402
403 static void
404 emitSPUpdate(bool isARM,
405 MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
406 DebugLoc dl, const ARMBaseInstrInfo &TII,
407 int NumBytes,
408 ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0) {
409 if (isARM)
410 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
411 Pred, PredReg, TII);
412 else
413 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
414 Pred, PredReg, TII);
415 }
416
417
418 void ARMBaseRegisterInfo::
419 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
420 MachineBasicBlock::iterator I) const {
421 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
422 if (!TFI->hasReservedCallFrame(MF)) {
423 // If we have alloca, convert as follows:
424 // ADJCALLSTACKDOWN -> sub, sp, sp, amount
425 // ADJCALLSTACKUP -> add, sp, sp, amount
426 MachineInstr *Old = I;
427 DebugLoc dl = Old->getDebugLoc();
428 unsigned Amount = Old->getOperand(0).getImm();
429 if (Amount != 0) {
430 // We need to keep the stack aligned properly. To do this, we round the
431 // amount of space needed for the outgoing arguments up to the next
432 // alignment boundary.
433 unsigned Align = TFI->getStackAlignment();
434 Amount = (Amount+Align-1)/Align*Align;
435
436 ARMFunctionInfo *AFI = MF.getInfo();
437 assert(!AFI->isThumb1OnlyFunction() &&
438 "This eliminateCallFramePseudoInstr does not support Thumb1!");
439 bool isARM = !AFI->isThumbFunction();
440
441 // Replace the pseudo instruction with a new instruction...
442 unsigned Opc = Old->getOpcode();
443 int PIdx = Old->findFirstPredOperandIdx();
444 ARMCC::CondCodes Pred = (PIdx == -1)
445 ? ARMCC::AL : (ARMCC::CondCodes)Old->getOperand(PIdx).getImm();
446 if (Opc == ARM::ADJCALLSTACKDOWN || Opc == ARM::tADJCALLSTACKDOWN) {
447 // Note: PredReg is operand 2 for ADJCALLSTACKDOWN.
448 unsigned PredReg = Old->getOperand(2).getReg();
449 emitSPUpdate(isARM, MBB, I, dl, TII, -Amount, Pred, PredReg);
450 } else {
451 // Note: PredReg is operand 3 for ADJCALLSTACKUP.
452 unsigned PredReg = Old->getOperand(3).getReg();
453 assert(Opc == ARM::ADJCALLSTACKUP || Opc == ARM::tADJCALLSTACKUP);
454 emitSPUpdate(isARM, MBB, I, dl, TII, Amount, Pred, PredReg);
455 }
456 }
457 }
458 MBB.erase(I);
459 }
460
461403 int64_t ARMBaseRegisterInfo::
462404 getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const {
463405 const MCInstrDesc &Desc = MI->getDesc();
167167
168168 virtual bool requiresVirtualBaseRegisters(const MachineFunction &MF) const;
169169
170 virtual void eliminateCallFramePseudoInstr(MachineFunction &MF,
171 MachineBasicBlock &MBB,
172 MachineBasicBlock::iterator I) const;
173
174170 virtual void eliminateFrameIndex(MachineBasicBlock::iterator II,
175171 int SPAdj, unsigned FIOperandNum,
176172 RegScavenger *RS = NULL) const;
118118 emitSPUpdate(bool isARM,
119119 MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
120120 DebugLoc dl, const ARMBaseInstrInfo &TII,
121 int NumBytes, unsigned MIFlags = MachineInstr::NoFlags) {
121 int NumBytes, unsigned MIFlags = MachineInstr::NoFlags,
122 ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0) {
122123 if (isARM)
123124 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
124 ARMCC::AL, 0, TII, MIFlags);
125 Pred, PredReg, TII, MIFlags);
125126 else
126127 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
127 ARMCC::AL, 0, TII, MIFlags);
128 Pred, PredReg, TII, MIFlags);
128129 }
129130
130131 void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
14291430 AFI->setLRIsSpilledForFarJump(true);
14301431 }
14311432 }
1433
1434
1435 void ARMFrameLowering::
1436 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
1437 MachineBasicBlock::iterator I) const {
1438 const ARMBaseInstrInfo &TII =
1439 *static_cast(MF.getTarget().getInstrInfo());
1440 if (!hasReservedCallFrame(MF)) {
1441 // If we have alloca, convert as follows:
1442 // ADJCALLSTACKDOWN -> sub, sp, sp, amount
1443 // ADJCALLSTACKUP -> add, sp, sp, amount
1444 MachineInstr *Old = I;
1445 DebugLoc dl = Old->getDebugLoc();
1446 unsigned Amount = Old->getOperand(0).getImm();
1447 if (Amount != 0) {
1448 // We need to keep the stack aligned properly. To do this, we round the
1449 // amount of space needed for the outgoing arguments up to the next
1450 // alignment boundary.
1451 unsigned Align = getStackAlignment();
1452 Amount = (Amount+Align-1)/Align*Align;
1453
1454 ARMFunctionInfo *AFI = MF.getInfo();
1455 assert(!AFI->isThumb1OnlyFunction() &&
1456 "This eliminateCallFramePseudoInstr does not support Thumb1!");
1457 bool isARM = !AFI->isThumbFunction();
1458
1459 // Replace the pseudo instruction with a new instruction...
1460 unsigned Opc = Old->getOpcode();
1461 int PIdx = Old->findFirstPredOperandIdx();
1462 ARMCC::CondCodes Pred = (PIdx == -1)
1463 ? ARMCC::AL : (ARMCC::CondCodes)Old->getOperand(PIdx).getImm();
1464 if (Opc == ARM::ADJCALLSTACKDOWN || Opc == ARM::tADJCALLSTACKDOWN) {
1465 // Note: PredReg is operand 2 for ADJCALLSTACKDOWN.
1466 unsigned PredReg = Old->getOperand(2).getReg();
1467 emitSPUpdate(isARM, MBB, I, dl, TII, -Amount, MachineInstr::NoFlags,
1468 Pred, PredReg);
1469 } else {
1470 // Note: PredReg is operand 3 for ADJCALLSTACKUP.
1471 unsigned PredReg = Old->getOperand(3).getReg();
1472 assert(Opc == ARM::ADJCALLSTACKUP || Opc == ARM::tADJCALLSTACKUP);
1473 emitSPUpdate(isARM, MBB, I, dl, TII, Amount, MachineInstr::NoFlags,
1474 Pred, PredReg);
1475 }
1476 }
1477 }
1478 MBB.erase(I);
1479 }
1480
6969 unsigned LdrOpc, bool isVarArg, bool NoGap,
7070 bool(*Func)(unsigned, bool),
7171 unsigned NumAlignedDPRCS2Regs) const;
72
73 virtual void eliminateCallFramePseudoInstr(
74 MachineFunction &MF,
75 MachineBasicBlock &MBB,
76 MachineBasicBlock::iterator MI) const;
7277 };
7378
7479 } // End llvm namespace
4040 int NumBytes, unsigned MIFlags = MachineInstr::NoFlags) {
4141 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
4242 MRI, MIFlags);
43 }
44
45
46 void Thumb1FrameLowering::
47 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
48 MachineBasicBlock::iterator I) const {
49 const Thumb1InstrInfo &TII =
50 *static_cast(MF.getTarget().getInstrInfo());
51 const Thumb1RegisterInfo *RegInfo =
52 static_cast(MF.getTarget().getRegisterInfo());
53 if (!hasReservedCallFrame(MF)) {
54 // If we have alloca, convert as follows:
55 // ADJCALLSTACKDOWN -> sub, sp, sp, amount
56 // ADJCALLSTACKUP -> add, sp, sp, amount
57 MachineInstr *Old = I;
58 DebugLoc dl = Old->getDebugLoc();
59 unsigned Amount = Old->getOperand(0).getImm();
60 if (Amount != 0) {
61 // We need to keep the stack aligned properly. To do this, we round the
62 // amount of space needed for the outgoing arguments up to the next
63 // alignment boundary.
64 unsigned Align = getStackAlignment();
65 Amount = (Amount+Align-1)/Align*Align;
66
67 // Replace the pseudo instruction with a new instruction...
68 unsigned Opc = Old->getOpcode();
69 if (Opc == ARM::ADJCALLSTACKDOWN || Opc == ARM::tADJCALLSTACKDOWN) {
70 emitSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount);
71 } else {
72 assert(Opc == ARM::ADJCALLSTACKUP || Opc == ARM::tADJCALLSTACKUP);
73 emitSPUpdate(MBB, I, TII, dl, *RegInfo, Amount);
74 }
75 }
76 }
77 MBB.erase(I);
4378 }
4479
4580 void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
4444 const TargetRegisterInfo *TRI) const;
4545
4646 bool hasReservedCallFrame(const MachineFunction &MF) const;
47
48 void eliminateCallFramePseudoInstr(MachineFunction &MF,
49 MachineBasicBlock &MBB,
50 MachineBasicBlock::iterator MI) const;
4751 };
4852
4953 } // End llvm namespace
295295 }
296296 }
297297
298 static void emitSPUpdate(MachineBasicBlock &MBB,
299 MachineBasicBlock::iterator &MBBI,
300 const TargetInstrInfo &TII, DebugLoc dl,
301 const Thumb1RegisterInfo &MRI,
302 int NumBytes) {
303 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
304 MRI);
305 }
306
307 void Thumb1RegisterInfo::
308 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
309 MachineBasicBlock::iterator I) const {
310 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
311
312 if (!TFI->hasReservedCallFrame(MF)) {
313 // If we have alloca, convert as follows:
314 // ADJCALLSTACKDOWN -> sub, sp, sp, amount
315 // ADJCALLSTACKUP -> add, sp, sp, amount
316 MachineInstr *Old = I;
317 DebugLoc dl = Old->getDebugLoc();
318 unsigned Amount = Old->getOperand(0).getImm();
319 if (Amount != 0) {
320 // We need to keep the stack aligned properly. To do this, we round the
321 // amount of space needed for the outgoing arguments up to the next
322 // alignment boundary.
323 unsigned Align = TFI->getStackAlignment();
324 Amount = (Amount+Align-1)/Align*Align;
325
326 // Replace the pseudo instruction with a new instruction...
327 unsigned Opc = Old->getOpcode();
328 if (Opc == ARM::ADJCALLSTACKDOWN || Opc == ARM::tADJCALLSTACKDOWN) {
329 emitSPUpdate(MBB, I, TII, dl, *this, -Amount);
330 } else {
331 assert(Opc == ARM::ADJCALLSTACKUP || Opc == ARM::tADJCALLSTACKUP);
332 emitSPUpdate(MBB, I, TII, dl, *this, Amount);
333 }
334 }
335 }
336 MBB.erase(I);
337 }
338
339298 /// emitThumbConstant - Emit a series of instructions to materialize a
340299 /// constant.
341300 static void emitThumbConstant(MachineBasicBlock &MBB,
4242 unsigned PredReg = 0,
4343 unsigned MIFlags = MachineInstr::NoFlags) const;
4444
45 /// Code Generation virtual methods...
46 void eliminateCallFramePseudoInstr(MachineFunction &MF,
47 MachineBasicBlock &MBB,
48 MachineBasicBlock::iterator I) const;
49
5045 // rewrite MI to access 'Offset' bytes from the FP. Update Offset to be
5146 // however much remains to be handled. Return 'true' if no further
5247 // work is required.
326326 return true;
327327 }
328328
329 void HexagonFrameLowering::
330 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
331 MachineBasicBlock::iterator I) const {
332 MachineInstr &MI = *I;
333
334 if (MI.getOpcode() == Hexagon::ADJCALLSTACKDOWN) {
335 // Hexagon_TODO: add code
336 } else if (MI.getOpcode() == Hexagon::ADJCALLSTACKUP) {
337 // Hexagon_TODO: add code
338 } else {
339 llvm_unreachable("Cannot handle this call frame pseudo instruction");
340 }
341 MBB.erase(I);
342 }
343
329344 int HexagonFrameLowering::getFrameIndexOffset(const MachineFunction &MF,
330345 int FI) const {
331346 return MF.getFrameInfo()->getObjectOffset(FI);
3434 MachineBasicBlock::iterator MI,
3535 const std::vector &CSI,
3636 const TargetRegisterInfo *TRI) const;
37
38 void eliminateCallFramePseudoInstr(MachineFunction &MF,
39 MachineBasicBlock &MBB,
40 MachineBasicBlock::iterator I) const;
41
3742 virtual bool
3843 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
3944 MachineBasicBlock::iterator MI,
114114 }
115115 llvm_unreachable("Callee saved register classes requested for unknown "
116116 "architecture version");
117 }
118
119 void HexagonRegisterInfo::
120 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
121 MachineBasicBlock::iterator I) const {
122 MachineInstr &MI = *I;
123
124 if (MI.getOpcode() == Hexagon::ADJCALLSTACKDOWN) {
125 // Hexagon_TODO: add code
126 } else if (MI.getOpcode() == Hexagon::ADJCALLSTACKUP) {
127 // Hexagon_TODO: add code
128 } else {
129 llvm_unreachable("Cannot handle this call frame pseudo instruction");
130 }
131 MBB.erase(I);
132117 }
133118
134119 void HexagonRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
5555
5656 BitVector getReservedRegs(const MachineFunction &MF) const;
5757
58 void eliminateCallFramePseudoInstr(MachineFunction &MF,
59 MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator I) const;
61
6258 void eliminateFrameIndex(MachineBasicBlock::iterator II,
6359 int SPAdj, unsigned FIOperandNum,
6460 RegScavenger *RS = NULL) const;
425425 }
426426 }
427427
428 // Eliminate ADJCALLSTACKDOWN/ADJCALLSTACKUP pseudo instructions
429 void MBlazeFrameLowering::
430 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
431 MachineBasicBlock::iterator I) const {
432 const MBlazeInstrInfo &TII =
433 *static_cast(MF.getTarget().getInstrInfo());
434 if (!hasReservedCallFrame(MF)) {
435 // If we have a frame pointer, turn the adjcallstackup instruction into a
436 // 'addi r1, r1, -' and the adjcallstackdown instruction into
437 // 'addi r1, r1, '
438 MachineInstr *Old = I;
439 int Amount = Old->getOperand(0).getImm() + 4;
440 if (Amount != 0) {
441 // We need to keep the stack aligned properly. To do this, we round the
442 // amount of space needed for the outgoing arguments up to the next
443 // alignment boundary.
444 unsigned Align = getStackAlignment();
445 Amount = (Amount+Align-1)/Align*Align;
446
447 MachineInstr *New;
448 if (Old->getOpcode() == MBlaze::ADJCALLSTACKDOWN) {
449 New = BuildMI(MF,Old->getDebugLoc(), TII.get(MBlaze::ADDIK),MBlaze::R1)
450 .addReg(MBlaze::R1).addImm(-Amount);
451 } else {
452 assert(Old->getOpcode() == MBlaze::ADJCALLSTACKUP);
453 New = BuildMI(MF,Old->getDebugLoc(), TII.get(MBlaze::ADDIK),MBlaze::R1)
454 .addReg(MBlaze::R1).addImm(Amount);
455 }
456
457 // Replace the pseudo instruction with a new instruction...
458 MBB.insert(I, New);
459 }
460 }
461
462 // Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
463 MBB.erase(I);
464 }
465
466
428467 void MBlazeFrameLowering::
429468 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
430469 RegScavenger *RS) const {
3838 void emitPrologue(MachineFunction &MF) const;
3939 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
4040
41 void eliminateCallFramePseudoInstr(MachineFunction &MF,
42 MachineBasicBlock &MBB,
43 MachineBasicBlock::iterator I) const;
44
4145 bool hasFP(const MachineFunction &MF) const;
4246
4347 int getFrameIndexOffset(const MachineFunction &MF, int FI) const;
8282 return Reserved;
8383 }
8484
85 // This function eliminate ADJCALLSTACKDOWN/ADJCALLSTACKUP pseudo instructions
86 void MBlazeRegisterInfo::
87 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
88 MachineBasicBlock::iterator I) const {
89 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
90
91 if (!TFI->hasReservedCallFrame(MF)) {
92 // If we have a frame pointer, turn the adjcallstackup instruction into a
93 // 'addi r1, r1, -' and the adjcallstackdown instruction into
94 // 'addi r1, r1, '
95 MachineInstr *Old = I;
96 int Amount = Old->getOperand(0).getImm() + 4;
97 if (Amount != 0) {
98 // We need to keep the stack aligned properly. To do this, we round the
99 // amount of space needed for the outgoing arguments up to the next
100 // alignment boundary.
101 unsigned Align = TFI->getStackAlignment();
102 Amount = (Amount+Align-1)/Align*Align;
103
104 MachineInstr *New;
105 if (Old->getOpcode() == MBlaze::ADJCALLSTACKDOWN) {
106 New = BuildMI(MF,Old->getDebugLoc(),TII.get(MBlaze::ADDIK),MBlaze::R1)
107 .addReg(MBlaze::R1).addImm(-Amount);
108 } else {
109 assert(Old->getOpcode() == MBlaze::ADJCALLSTACKUP);
110 New = BuildMI(MF,Old->getDebugLoc(),TII.get(MBlaze::ADDIK),MBlaze::R1)
111 .addReg(MBlaze::R1).addImm(Amount);
112 }
113
114 // Replace the pseudo instruction with a new instruction...
115 MBB.insert(I, New);
116 }
117 }
118
119 // Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
120 MBB.erase(I);
121 }
122
12385 // FrameIndex represent objects inside a abstract stack.
12486 // We must replace FrameIndex with an stack/frame pointer
12587 // direct reference.
4949
5050 BitVector getReservedRegs(const MachineFunction &MF) const;
5151
52 void eliminateCallFramePseudoInstr(MachineFunction &MF,
53 MachineBasicBlock &MBB,
54 MachineBasicBlock::iterator I) const;
55
5652 /// Stack Frame Processing Methods
5753 void eliminateFrameIndex(MachineBasicBlock::iterator II,
5854 int SPAdj, unsigned FIOperandNum,
221221 return true;
222222 }
223223
224 void MSP430FrameLowering::
225 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
226 MachineBasicBlock::iterator I) const {
227 const MSP430InstrInfo &TII =
228 *static_cast(MF.getTarget().getInstrInfo());
229 unsigned StackAlign = getStackAlignment();
230
231 if (!hasReservedCallFrame(MF)) {
232 // If the stack pointer can be changed after prologue, turn the
233 // adjcallstackup instruction into a 'sub SPW, ' and the
234 // adjcallstackdown instruction into 'add SPW, '
235 // TODO: consider using push / pop instead of sub + store / add
236 MachineInstr *Old = I;
237 uint64_t Amount = Old->getOperand(0).getImm();
238 if (Amount != 0) {
239 // We need to keep the stack aligned properly. To do this, we round the
240 // amount of space needed for the outgoing arguments up to the next
241 // alignment boundary.
242 Amount = (Amount+StackAlign-1)/StackAlign*StackAlign;
243
244 MachineInstr *New = 0;
245 if (Old->getOpcode() == TII.getCallFrameSetupOpcode()) {
246 New = BuildMI(MF, Old->getDebugLoc(),
247 TII.get(MSP430::SUB16ri), MSP430::SPW)
248 .addReg(MSP430::SPW).addImm(Amount);
249 } else {
250 assert(Old->getOpcode() == TII.getCallFrameDestroyOpcode());
251 // factor out the amount the callee already popped.
252 uint64_t CalleeAmt = Old->getOperand(1).getImm();
253 Amount -= CalleeAmt;
254 if (Amount)
255 New = BuildMI(MF, Old->getDebugLoc(),
256 TII.get(MSP430::ADD16ri), MSP430::SPW)
257 .addReg(MSP430::SPW).addImm(Amount);
258 }
259
260 if (New) {
261 // The SRW implicit def is dead.
262 New->getOperand(3).setIsDead();
263
264 // Replace the pseudo instruction with a new instruction...
265 MBB.insert(I, New);
266 }
267 }
268 } else if (I->getOpcode() == TII.getCallFrameDestroyOpcode()) {
269 // If we are performing frame pointer elimination and if the callee pops
270 // something off the stack pointer, add it back.
271 if (uint64_t CalleeAmt = I->getOperand(1).getImm()) {
272 MachineInstr *Old = I;
273 MachineInstr *New =
274 BuildMI(MF, Old->getDebugLoc(), TII.get(MSP430::SUB16ri),
275 MSP430::SPW).addReg(MSP430::SPW).addImm(CalleeAmt);
276 // The SRW implicit def is dead.
277 New->getOperand(3).setIsDead();
278
279 MBB.insert(I, New);
280 }
281 }
282
283 MBB.erase(I);
284 }
285
224286 void
225287 MSP430FrameLowering::processFunctionBeforeFrameFinalized(MachineFunction &MF)
226288 const {
227 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
228
229289 // Create a frame entry for the FPW register that must be saved.
230 if (TFI->hasFP(MF)) {
290 if (hasFP(MF)) {
231291 int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4, true);
232292 (void)FrameIdx;
233293 assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() &&
3434 void emitPrologue(MachineFunction &MF) const;
3535 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
3636
37 void eliminateCallFramePseudoInstr(MachineFunction &MF,
38 MachineBasicBlock &MBB,
39 MachineBasicBlock::iterator I) const;
40
3741 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
3842 MachineBasicBlock::iterator MI,
3943 const std::vector &CSI,
100100 return &MSP430::GR16RegClass;
101101 }
102102
103 void MSP430RegisterInfo::
104 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
105 MachineBasicBlock::iterator I) const {
106 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
107
108 if (!TFI->hasReservedCallFrame(MF)) {
109 // If the stack pointer can be changed after prologue, turn the
110 // adjcallstackup instruction into a 'sub SPW, ' and the
111 // adjcallstackdown instruction into 'add SPW, '
112 // TODO: consider using push / pop instead of sub + store / add
113 MachineInstr *Old = I;
114 uint64_t Amount = Old->getOperand(0).getImm();
115 if (Amount != 0) {
116 // We need to keep the stack aligned properly. To do this, we round the
117 // amount of space needed for the outgoing arguments up to the next
118 // alignment boundary.
119 Amount = (Amount+StackAlign-1)/StackAlign*StackAlign;
120
121 MachineInstr *New = 0;
122 if (Old->getOpcode() == TII.getCallFrameSetupOpcode()) {
123 New = BuildMI(MF, Old->getDebugLoc(),
124 TII.get(MSP430::SUB16ri), MSP430::SPW)
125 .addReg(MSP430::SPW).addImm(Amount);
126 } else {
127 assert(Old->getOpcode() == TII.getCallFrameDestroyOpcode());
128 // factor out the amount the callee already popped.
129 uint64_t CalleeAmt = Old->getOperand(1).getImm();
130 Amount -= CalleeAmt;
131 if (Amount)
132 New = BuildMI(MF, Old->getDebugLoc(),
133 TII.get(MSP430::ADD16ri), MSP430::SPW)
134 .addReg(MSP430::SPW).addImm(Amount);
135 }
136
137 if (New) {
138 // The SRW implicit def is dead.
139 New->getOperand(3).setIsDead();
140
141 // Replace the pseudo instruction with a new instruction...
142 MBB.insert(I, New);
143 }
144 }
145 } else if (I->getOpcode() == TII.getCallFrameDestroyOpcode()) {
146 // If we are performing frame pointer elimination and if the callee pops
147 // something off the stack pointer, add it back.
148 if (uint64_t CalleeAmt = I->getOperand(1).getImm()) {
149 MachineInstr *Old = I;
150 MachineInstr *New =
151 BuildMI(MF, Old->getDebugLoc(), TII.get(MSP430::SUB16ri),
152 MSP430::SPW).addReg(MSP430::SPW).addImm(CalleeAmt);
153 // The SRW implicit def is dead.
154 New->getOperand(3).setIsDead();
155
156 MBB.insert(I, New);
157 }
158 }
159
160 MBB.erase(I);
161 }
162
163103 void
164104 MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
165105 int SPAdj, unsigned FIOperandNum,
4141 const TargetRegisterClass*
4242 getPointerRegClass(const MachineFunction &MF, unsigned Kind = 0) const;
4343
44 void eliminateCallFramePseudoInstr(MachineFunction &MF,
45 MachineBasicBlock &MBB,
46 MachineBasicBlock::iterator I) const;
47
4844 void eliminateFrameIndex(MachineBasicBlock::iterator II,
4945 int SPAdj, unsigned FIOperandNum,
5046 RegScavenger *RS = NULL) const;
138138 return true;
139139 }
140140
141 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions
142 void Mips16FrameLowering::
143 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
144 MachineBasicBlock::iterator I) const {
145 if (!hasReservedCallFrame(MF)) {
146 int64_t Amount = I->getOperand(0).getImm();
147
148 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
149 Amount = -Amount;
150
151 const Mips16InstrInfo &TII =
152 *static_cast(MF.getTarget().getInstrInfo());
153
154 TII.adjustStackPtr(Mips::SP, Amount, MBB, I);
155 }
156
157 MBB.erase(I);
158 }
159
141160 bool
142161 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
143162 const MachineFrameInfo *MFI = MF.getFrameInfo();
2626 void emitPrologue(MachineFunction &MF) const;
2727 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
2828
29 void eliminateCallFramePseudoInstr(MachineFunction &MF,
30 MachineBasicBlock &MBB,
31 MachineBasicBlock::iterator I) const;
32
2933 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
3034 MachineBasicBlock::iterator MI,
3135 const std::vector &CSI,
7171 return true;
7272 }
7373
74 // This function eliminate ADJCALLSTACKDOWN,
75 // ADJCALLSTACKUP pseudo instructions
76 void Mips16RegisterInfo::
77 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
78 MachineBasicBlock::iterator I) const {
79 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
80
81 if (!TFI->hasReservedCallFrame(MF)) {
82 int64_t Amount = I->getOperand(0).getImm();
83
84 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
85 Amount = -Amount;
86
87 const Mips16InstrInfo *II = static_cast(&TII);
88
89 II->adjustStackPtr(Mips::SP, Amount, MBB, I);
90 }
91
92 MBB.erase(I);
93 }
94
9574 void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
9675 unsigned OpNo, int FrameIndex,
9776 uint64_t StackSize,
2424 Mips16RegisterInfo(const MipsSubtarget &Subtarget,
2525 const Mips16InstrInfo &TII);
2626
27 void eliminateCallFramePseudoInstr(MachineFunction &MF,
28 MachineBasicBlock &MBB,
29 MachineBasicBlock::iterator I) const;
30
3127 bool requiresRegisterScavenging(const MachineFunction &MF) const;
3228
3329 bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
248248 return isInt<16>(MFI->getMaxCallFrameSize()) && !MFI->hasVarSizedObjects();
249249 }
250250
251 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions
252 void MipsSEFrameLowering::
253 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
254 MachineBasicBlock::iterator I) const {
255 const MipsSEInstrInfo &TII =
256 *static_cast(MF.getTarget().getInstrInfo());
257
258 if (!hasReservedCallFrame(MF)) {
259 int64_t Amount = I->getOperand(0).getImm();
260
261 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
262 Amount = -Amount;
263
264 unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
265 TII.adjustStackPtr(SP, Amount, MBB, I);
266 }
267
268 MBB.erase(I);
269 }
270
251271 void MipsSEFrameLowering::
252272 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
253273 RegScavenger *RS) const {
2727 void emitPrologue(MachineFunction &MF) const;
2828 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
2929
30 void eliminateCallFramePseudoInstr(MachineFunction &MF,
31 MachineBasicBlock &MBB,
32 MachineBasicBlock::iterator I) const;
33
3034 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
3135 MachineBasicBlock::iterator MI,
3236 const std::vector &CSI,
5151 bool MipsSERegisterInfo::
5252 requiresFrameIndexScavenging(const MachineFunction &MF) const {
5353 return true;
54 }
55
56 // This function eliminate ADJCALLSTACKDOWN,
57 // ADJCALLSTACKUP pseudo instructions
58 void MipsSERegisterInfo::
59 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator I) const {
61 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
62
63 if (!TFI->hasReservedCallFrame(MF)) {
64 int64_t Amount = I->getOperand(0).getImm();
65
66 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
67 Amount = -Amount;
68
69 const MipsSEInstrInfo *II = static_cast(&TII);
70 unsigned SP = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
71
72 II->adjustStackPtr(SP, Amount, MBB, I);
73 }
74
75 MBB.erase(I);
7654 }
7755
7856 void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
3030
3131 bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
3232
33 void eliminateCallFramePseudoInstr(MachineFunction &MF,
34 MachineBasicBlock &MBB,
35 MachineBasicBlock::iterator I) const;
36
3733 private:
3834 virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
3935 int FrameIndex, uint64_t StackSize,
7373 void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF,
7474 MachineBasicBlock &MBB) const {
7575 }
76
77 // This function eliminates ADJCALLSTACKDOWN,
78 // ADJCALLSTACKUP pseudo instructions
79 void NVPTXFrameLowering::
80 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
81 MachineBasicBlock::iterator I) const {
82 // Simply discard ADJCALLSTACKDOWN,
83 // ADJCALLSTACKUP instructions.
84 MBB.erase(I);
85 }
86
3232 virtual void emitPrologue(MachineFunction &MF) const;
3333 virtual void emitEpilogue(MachineFunction &MF,
3434 MachineBasicBlock &MBB) const;
35
36 void eliminateCallFramePseudoInstr(MachineFunction &MF,
37 MachineBasicBlock &MBB,
38 MachineBasicBlock::iterator I) const;
3539 };
3640
3741 } // End llvm namespace
149149 return 0;
150150 }
151151
152 // This function eliminates ADJCALLSTACKDOWN,
153 // ADJCALLSTACKUP pseudo instructions
154 void NVPTXRegisterInfo::
155 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
156 MachineBasicBlock::iterator I) const {
157 // Simply discard ADJCALLSTACKDOWN,
158 // ADJCALLSTACKUP instructions.
159 MBB.erase(I);
160 }
5757 int SPAdj, unsigned FIOperandNum,
5858 RegScavenger *RS=NULL) const;
5959
60 void eliminateCallFramePseudoInstr(MachineFunction &MF,
61 MachineBasicBlock &MBB,
62 MachineBasicBlock::iterator I) const;
63
6460 virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const;
6561 virtual unsigned getFrameRegister(const MachineFunction &MF) const;
6662 virtual unsigned getRARegister() const;
11231123 .addReg(MoveReg));
11241124 }
11251125
1126 void PPCFrameLowering::
1127 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
1128 MachineBasicBlock::iterator I) const {
1129 const PPCInstrInfo &TII =
1130 *static_cast(MF.getTarget().getInstrInfo());
1131 if (MF.getTarget().Options.GuaranteedTailCallOpt &&
1132 I->getOpcode() == PPC::ADJCALLSTACKUP) {
1133 // Add (actually subtract) back the amount the callee popped on return.
1134 if (int CalleeAmt = I->getOperand(1).getImm()) {
1135 bool is64Bit = Subtarget.isPPC64();
1136 CalleeAmt *= -1;
1137 unsigned StackReg = is64Bit ? PPC::X1 : PPC::R1;
1138 unsigned TmpReg = is64Bit ? PPC::X0 : PPC::R0;
1139 unsigned ADDIInstr = is64Bit ? PPC::ADDI8 : PPC::ADDI;
1140 unsigned ADDInstr = is64Bit ? PPC::ADD8 : PPC::ADD4;
1141 unsigned LISInstr = is64Bit ? PPC::LIS8 : PPC::LIS;
1142 unsigned ORIInstr = is64Bit ? PPC::ORI8 : PPC::ORI;
1143 MachineInstr *MI = I;
1144 DebugLoc dl = MI->getDebugLoc();
1145
1146 if (isInt<16>(CalleeAmt)) {
1147 BuildMI(MBB, I, dl, TII.get(ADDIInstr), StackReg)
1148 .addReg(StackReg, RegState::Kill)
1149 .addImm(CalleeAmt);
1150 } else {
1151 MachineBasicBlock::iterator MBBI = I;
1152 BuildMI(MBB, MBBI, dl, TII.get(LISInstr), TmpReg)
1153 .addImm(CalleeAmt >> 16);
1154 BuildMI(MBB, MBBI, dl, TII.get(ORIInstr), TmpReg)
1155 .addReg(TmpReg, RegState::Kill)
1156 .addImm(CalleeAmt & 0xFFFF);
1157 BuildMI(MBB, MBBI, dl, TII.get(ADDInstr), StackReg)
1158 .addReg(StackReg, RegState::Kill)
1159 .addReg(TmpReg);
1160 }
1161 }
1162 }
1163 // Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
1164 MBB.erase(I);
1165 }
1166
11261167 bool
11271168 PPCFrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
11281169 MachineBasicBlock::iterator MI,
4949 MachineBasicBlock::iterator MI,
5050 const std::vector &CSI,
5151 const TargetRegisterInfo *TRI) const;
52
53 void eliminateCallFramePseudoInstr(MachineFunction &MF,
54 MachineBasicBlock &MBB,
55 MachineBasicBlock::iterator I) const;
5256
5357 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
5458 MachineBasicBlock::iterator MI,
33313331
33323332 // When performing tail call optimization the callee pops its arguments off
33333333 // the stack. Account for this here so these bytes can be pushed back on in
3334 // PPCRegisterInfo::eliminateCallFramePseudoInstr.
3334 // PPCFrameLowering::eliminateCallFramePseudoInstr.
33353335 int BytesCalleePops =
33363336 (CallConv == CallingConv::Fast &&
33373337 getTargetMachine().Options.GuaranteedTailCallOpt) ? NumBytes : 0;
221221 // Stack Frame Processing methods
222222 //===----------------------------------------------------------------------===//
223223
224 void PPCRegisterInfo::
225 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
226 MachineBasicBlock::iterator I) const {
227 if (MF.getTarget().Options.GuaranteedTailCallOpt &&
228 I->getOpcode() == PPC::ADJCALLSTACKUP) {
229 // Add (actually subtract) back the amount the callee popped on return.
230 if (int CalleeAmt = I->getOperand(1).getImm()) {
231 bool is64Bit = Subtarget.isPPC64();
232 CalleeAmt *= -1;
233 unsigned StackReg = is64Bit ? PPC::X1 : PPC::R1;
234 unsigned TmpReg = is64Bit ? PPC::X0 : PPC::R0;
235 unsigned ADDIInstr = is64Bit ? PPC::ADDI8 : PPC::ADDI;
236 unsigned ADDInstr = is64Bit ? PPC::ADD8 : PPC::ADD4;
237 unsigned LISInstr = is64Bit ? PPC::LIS8 : PPC::LIS;
238 unsigned ORIInstr = is64Bit ? PPC::ORI8 : PPC::ORI;
239 MachineInstr *MI = I;
240 DebugLoc dl = MI->getDebugLoc();
241
242 if (isInt<16>(CalleeAmt)) {
243 BuildMI(MBB, I, dl, TII.get(ADDIInstr), StackReg)
244 .addReg(StackReg, RegState::Kill)
245 .addImm(CalleeAmt);
246 } else {
247 MachineBasicBlock::iterator MBBI = I;
248 BuildMI(MBB, MBBI, dl, TII.get(LISInstr), TmpReg)
249 .addImm(CalleeAmt >> 16);
250 BuildMI(MBB, MBBI, dl, TII.get(ORIInstr), TmpReg)
251 .addReg(TmpReg, RegState::Kill)
252 .addImm(CalleeAmt & 0xFFFF);
253 BuildMI(MBB, MBBI, dl, TII.get(ADDInstr), StackReg)
254 .addReg(StackReg, RegState::Kill)
255 .addReg(TmpReg);
256 }
257 }
258 }
259 // Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
260 MBB.erase(I);
261 }
262
263224 /// findScratchRegister - Find a 'free' PPC register. Try for a call-clobbered
264225 /// register first and then a spilled callee-saved register if that fails.
265226 static
5555
5656 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const;
5757
58 void eliminateCallFramePseudoInstr(MachineFunction &MF,
59 MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator I) const;
61
6258 void lowerDynamicAlloc(MachineBasicBlock::iterator II,
6359 int SPAdj, RegScavenger *RS) const;
6460 void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex,
6666 }
6767 }
6868
69 void SparcFrameLowering::
70 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
71 MachineBasicBlock::iterator I) const {
72 MachineInstr &MI = *I;
73 DebugLoc dl = MI.getDebugLoc();
74 int Size = MI.getOperand(0).getImm();
75 if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
76 Size = -Size;
77 const SparcInstrInfo &TII =
78 *static_cast(MF.getTarget().getInstrInfo());
79 if (Size)
80 BuildMI(MBB, I, dl, TII.get(SP::ADDri), SP::O6).addReg(SP::O6).addImm(Size);
81 MBB.erase(I);
82 }
83
84
6985 void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
7086 MachineBasicBlock &MBB) const {
7187 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
3131 void emitPrologue(MachineFunction &MF) const;
3232 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
3333
34 void eliminateCallFramePseudoInstr(MachineFunction &MF,
35 MachineBasicBlock &MBB,
36 MachineBasicBlock::iterator I) const;
37
3438 bool hasFP(const MachineFunction &MF) const { return false; }
3539 };
3640
5555 return Reserved;
5656 }
5757
58 void SparcRegisterInfo::
59 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator I) const {
61 MachineInstr &MI = *I;
62 DebugLoc dl = MI.getDebugLoc();
63 int Size = MI.getOperand(0).getImm();
64 if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
65 Size = -Size;
66 if (Size)
67 BuildMI(MBB, I, dl, TII.get(SP::ADDri), SP::O6).addReg(SP::O6).addImm(Size);
68 MBB.erase(I);
69 }
70
7158 void
7259 SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
7360 int SPAdj, unsigned FIOperandNum,
3535
3636 BitVector getReservedRegs(const MachineFunction &MF) const;
3737
38 void eliminateCallFramePseudoInstr(MachineFunction &MF,
39 MachineBasicBlock &MBB,
40 MachineBasicBlock::iterator I) const;
41
4238 void eliminateFrameIndex(MachineBasicBlock::iterator II,
4339 int SPAdj, unsigned FIOperandNum,
4440 RegScavenger *RS = NULL) const;
5454 MMI.callsUnwindInit() || MMI.callsEHReturn());
5555 }
5656
57 static unsigned getSUBriOpcode(unsigned isLP64, int64_t Imm) {
58 if (isLP64) {
57 static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
58 if (IsLP64) {
5959 if (isInt<8>(Imm))
6060 return X86::SUB64ri8;
6161 return X86::SUB64ri32;
17551755 MF.verify();
17561756 #endif
17571757 }
1758
1759 void X86FrameLowering::
1760 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
1761 MachineBasicBlock::iterator I) const {
1762 const X86InstrInfo &TII = *TM.getInstrInfo();
1763 const X86RegisterInfo &RegInfo = *TM.getRegisterInfo();
1764 unsigned StackPtr = RegInfo.getStackRegister();
1765 bool reseveCallFrame = hasReservedCallFrame(MF);
1766 int Opcode = I->getOpcode();
1767 bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
1768 bool IsLP64 = STI.isTarget64BitLP64();
1769 DebugLoc DL = I->getDebugLoc();
1770 uint64_t Amount = !reseveCallFrame ? I->getOperand(0).getImm() : 0;
1771 uint64_t CalleeAmt = isDestroy ? I->getOperand(1).getImm() : 0;
1772 I = MBB.erase(I);
1773
1774 if (!reseveCallFrame) {
1775 // If the stack pointer can be changed after prologue, turn the
1776 // adjcallstackup instruction into a 'sub ESP, ' and the
1777 // adjcallstackdown instruction into 'add ESP, '
1778 // TODO: consider using push / pop instead of sub + store / add
1779 if (Amount == 0)
1780 return;
1781
1782 // We need to keep the stack aligned properly. To do this, we round the
1783 // amount of space needed for the outgoing arguments up to the next
1784 // alignment boundary.
1785 unsigned StackAlign = TM.getFrameLowering()->getStackAlignment();
1786 Amount = (Amount + StackAlign - 1) / StackAlign * StackAlign;
1787
1788 MachineInstr *New = 0;
1789 if (Opcode == TII.getCallFrameSetupOpcode()) {
1790 New = BuildMI(MF, DL, TII.get(getSUBriOpcode(IsLP64, Amount)),
1791 StackPtr)
1792 .addReg(StackPtr)
1793 .addImm(Amount);
1794 } else {
1795 assert(Opcode == TII.getCallFrameDestroyOpcode());
1796
1797 // Factor out the amount the callee already popped.
1798 Amount -= CalleeAmt;
1799
1800 if (Amount) {
1801 unsigned Opc = getADDriOpcode(IsLP64, Amount);
1802 New = BuildMI(MF, DL, TII.get(Opc), StackPtr)
1803 .addReg(StackPtr).addImm(Amount);
1804 }
1805 }
1806
1807 if (New) {
1808 // The EFLAGS implicit def is dead.
1809 New->getOperand(3).setIsDead();
1810
1811 // Replace the pseudo instruction with a new instruction.
1812 MBB.insert(I, New);
1813 }
1814
1815 return;
1816 }
1817
1818 if (Opcode == TII.getCallFrameDestroyOpcode() && CalleeAmt) {
1819 // If we are performing frame pointer elimination and if the callee pops
1820 // something off the stack pointer, add it back. We do this until we have
1821 // more advanced stack pointer tracking ability.
1822 unsigned Opc = getSUBriOpcode(IsLP64, CalleeAmt);
1823 MachineInstr *New = BuildMI(MF, DL, TII.get(Opc), StackPtr)
1824 .addReg(StackPtr).addImm(CalleeAmt);
1825
1826 // The EFLAGS implicit def is dead.
1827 New->getOperand(3).setIsDead();
1828
1829 // We are not tracking the stack pointer adjustment by the callee, so make
1830 // sure we restore the stack pointer immediately after the call, there may
1831 // be spill code inserted between the CALL and ADJCALLSTACKUP instructions.
1832 MachineBasicBlock::iterator B = MBB.begin();
1833 while (I != B && !llvm::prior(I)->isCall())
1834 --I;
1835 MBB.insert(I, New);
1836 }
1837 }
1838
6464 int getFrameIndexReference(const MachineFunction &MF, int FI,
6565 unsigned &FrameReg) const;
6666 uint32_t getCompactUnwindEncoding(MachineFunction &MF) const;
67
68 void eliminateCallFramePseudoInstr(MachineFunction &MF,
69 MachineBasicBlock &MBB,
70 MachineBasicBlock::iterator MI) const;
6771 };
6872
6973 } // End llvm namespace
444444 return true;
445445 }
446446 return false;
447 }
448
449 static unsigned getSUBriOpcode(unsigned is64Bit, int64_t Imm) {
450 if (is64Bit) {
451 if (isInt<8>(Imm))
452 return X86::SUB64ri8;
453 return X86::SUB64ri32;
454 } else {
455 if (isInt<8>(Imm))
456 return X86::SUB32ri8;
457 return X86::SUB32ri;
458 }
459 }
460
461 static unsigned getADDriOpcode(unsigned is64Bit, int64_t Imm) {
462 if (is64Bit) {
463 if (isInt<8>(Imm))
464 return X86::ADD64ri8;
465 return X86::ADD64ri32;
466 } else {
467 if (isInt<8>(Imm))
468 return X86::ADD32ri8;
469 return X86::ADD32ri;
470 }
471 }
472
473 void X86RegisterInfo::
474 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
475 MachineBasicBlock::iterator I) const {
476 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
477 bool reseveCallFrame = TFI->hasReservedCallFrame(MF);
478 int Opcode = I->getOpcode();
479 bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
480 DebugLoc DL = I->getDebugLoc();
481 uint64_t Amount = !reseveCallFrame ? I->getOperand(0).getImm() : 0;
482 uint64_t CalleeAmt = isDestroy ? I->getOperand(1).getImm() : 0;
483 I = MBB.erase(I);
484
485 if (!reseveCallFrame) {
486 // If the stack pointer can be changed after prologue, turn the
487 // adjcallstackup instruction into a 'sub ESP, ' and the
488 // adjcallstackdown instruction into 'add ESP, '
489 // TODO: consider using push / pop instead of sub + store / add
490 if (Amount == 0)
491 return;
492
493 // We need to keep the stack aligned properly. To do this, we round the
494 // amount of space needed for the outgoing arguments up to the next
495 // alignment boundary.
496 unsigned StackAlign = TM.getFrameLowering()->getStackAlignment();
497 Amount = (Amount + StackAlign - 1) / StackAlign * StackAlign;
498
499 MachineInstr *New = 0;
500 if (Opcode == TII.getCallFrameSetupOpcode()) {
501 New = BuildMI(MF, DL, TII.get(getSUBriOpcode(Is64Bit, Amount)),
502 StackPtr)
503 .addReg(StackPtr)
504 .addImm(Amount);
505 } else {
506 assert(Opcode == TII.getCallFrameDestroyOpcode());
507
508 // Factor out the amount the callee already popped.
509 Amount -= CalleeAmt;
510
511 if (Amount) {
512 unsigned Opc = getADDriOpcode(Is64Bit, Amount);
513 New = BuildMI(MF, DL, TII.get(Opc), StackPtr)
514 .addReg(StackPtr).addImm(Amount);
515 }
516 }
517
518 if (New) {
519 // The EFLAGS implicit def is dead.
520 New->getOperand(3).setIsDead();
521
522 // Replace the pseudo instruction with a new instruction.
523 MBB.insert(I, New);
524 }
525
526 return;
527 }
528
529 if (Opcode == TII.getCallFrameDestroyOpcode() && CalleeAmt) {
530 // If we are performing frame pointer elimination and if the callee pops
531 // something off the stack pointer, add it back. We do this until we have
532 // more advanced stack pointer tracking ability.
533 unsigned Opc = getSUBriOpcode(Is64Bit, CalleeAmt);
534 MachineInstr *New = BuildMI(MF, DL, TII.get(Opc), StackPtr)
535 .addReg(StackPtr).addImm(CalleeAmt);
536
537 // The EFLAGS implicit def is dead.
538 New->getOperand(3).setIsDead();
539
540 // We are not tracking the stack pointer adjustment by the callee, so make
541 // sure we restore the stack pointer immediately after the call, there may
542 // be spill code inserted between the CALL and ADJCALLSTACKUP instructions.
543 MachineBasicBlock::iterator B = MBB.begin();
544 while (I != B && !llvm::prior(I)->isCall())
545 --I;
546 MBB.insert(I, New);
547 }
548447 }
549448
550449 void
116116 bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
117117 int &FrameIdx) const;
118118
119 void eliminateCallFramePseudoInstr(MachineFunction &MF,
120 MachineBasicBlock &MBB,
121 MachineBasicBlock::iterator MI) const;
122
123119 void eliminateFrameIndex(MachineBasicBlock::iterator MI,
124120 int SPAdj, unsigned FIOperandNum,
125121 RegScavenger *RS = NULL) const;
331331 return true;
332332 }
333333
334 // This function eliminates ADJCALLSTACKDOWN,
335 // ADJCALLSTACKUP pseudo instructions
336 void XCoreFrameLowering::
337 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
338 MachineBasicBlock::iterator I) const {
339 const XCoreInstrInfo &TII =
340 *static_cast(MF.getTarget().getInstrInfo());
341 if (!hasReservedCallFrame(MF)) {
342 // Turn the adjcallstackdown instruction into 'extsp ' and the
343 // adjcallstackup instruction into 'ldaw sp, sp[]'
344 MachineInstr *Old = I;
345 uint64_t Amount = Old->getOperand(0).getImm();
346 if (Amount != 0) {
347 // We need to keep the stack aligned properly. To do this, we round the
348 // amount of space needed for the outgoing arguments up to the next
349 // alignment boundary.
350 unsigned Align = getStackAlignment();
351 Amount = (Amount+Align-1)/Align*Align;
352
353 assert(Amount%4 == 0);
354 Amount /= 4;
355
356 bool isU6 = isImmU6(Amount);
357 if (!isU6 && !isImmU16(Amount)) {
358 // FIX could emit multiple instructions in this case.
359 #ifndef NDEBUG
360 errs() << "eliminateCallFramePseudoInstr size too big: "
361 << Amount << "\n";
362 #endif
363 llvm_unreachable(0);
364 }
365
366 MachineInstr *New;
367 if (Old->getOpcode() == XCore::ADJCALLSTACKDOWN) {
368 int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
369 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode))
370 .addImm(Amount);
371 } else {
372 assert(Old->getOpcode() == XCore::ADJCALLSTACKUP);
373 int Opcode = isU6 ? XCore::LDAWSP_ru6_RRegs : XCore::LDAWSP_lru6_RRegs;
374 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode), XCore::SP)
375 .addImm(Amount);
376 }
377
378 // Replace the pseudo instruction with a new instruction...
379 MBB.insert(I, New);
380 }
381 }
382
383 MBB.erase(I);
384 }
385
334386 void
335387 XCoreFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
336388 RegScavenger *RS) const {
3838 const std::vector &CSI,
3939 const TargetRegisterInfo *TRI) const;
4040
41 void eliminateCallFramePseudoInstr(MachineFunction &MF,
42 MachineBasicBlock &MBB,
43 MachineBasicBlock::iterator I) const;
44
4145 bool hasFP(const MachineFunction &MF) const;
4246
4347 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
9898 bool
9999 XCoreRegisterInfo::useFPForScavengingIndex(const MachineFunction &MF) const {
100100 return false;
101 }
102
103 // This function eliminates ADJCALLSTACKDOWN,
104 // ADJCALLSTACKUP pseudo instructions
105 void XCoreRegisterInfo::
106 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
107 MachineBasicBlock::iterator I) const {
108 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
109
110 if (!TFI->hasReservedCallFrame(MF)) {
111 // Turn the adjcallstackdown instruction into 'extsp ' and the
112 // adjcallstackup instruction into 'ldaw sp, sp[]'
113 MachineInstr *Old = I;
114 uint64_t Amount = Old->getOperand(0).getImm();
115 if (Amount != 0) {
116 // We need to keep the stack aligned properly. To do this, we round the
117 // amount of space needed for the outgoing arguments up to the next
118 // alignment boundary.
119 unsigned Align = TFI->getStackAlignment();
120 Amount = (Amount+Align-1)/Align*Align;
121
122 assert(Amount%4 == 0);
123 Amount /= 4;
124
125 bool isU6 = isImmU6(Amount);
126 if (!isU6 && !isImmU16(Amount)) {
127 // FIX could emit multiple instructions in this case.
128 #ifndef NDEBUG
129 errs() << "eliminateCallFramePseudoInstr size too big: "
130 << Amount << "\n";
131 #endif
132 llvm_unreachable(0);
133 }
134
135 MachineInstr *New;
136 if (Old->getOpcode() == XCore::ADJCALLSTACKDOWN) {
137 int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
138 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode))
139 .addImm(Amount);
140 } else {
141 assert(Old->getOpcode() == XCore::ADJCALLSTACKUP);
142 int Opcode = isU6 ? XCore::LDAWSP_ru6_RRegs : XCore::LDAWSP_lru6_RRegs;
143 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode), XCore::SP)
144 .addImm(Amount);
145 }
146
147 // Replace the pseudo instruction with a new instruction...
148 MBB.insert(I, New);
149 }
150 }
151
152 MBB.erase(I);
153101 }
154102
155103 void
5353
5454 bool useFPForScavengingIndex(const MachineFunction &MF) const;
5555
56 void eliminateCallFramePseudoInstr(MachineFunction &MF,
57 MachineBasicBlock &MBB,
58 MachineBasicBlock::iterator I) const;
59
6056 void eliminateFrameIndex(MachineBasicBlock::iterator II,
6157 int SPAdj, unsigned FIOperandNum,
6258 RegScavenger *RS = NULL) const;