llvm.org GIT mirror llvm / 6f36fa9
Write llvm-tblgen backends as functions instead of sub-classes. The TableGenBackend base class doesn't do much, and will be removed completely soon. Patch by Sean Silva! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158311 91177308-0d34-0410-b5e6-96231b3b80d8 Jakob Stoklund Olesen 7 years ago
34 changed file(s) with 936 addition(s) and 1106 deletion(s). Raw diff Collapse all Expand all
3737
3838 };
3939
40 /// emitSourceFileHeader - Output a LLVM style file header to the specified
41 /// ostream.
42 void emitSourceFileHeader(StringRef Desc, raw_ostream &OS);
43
4044 } // End llvm namespace
4145
4246 #endif
1818
1919 void TableGenBackend::EmitSourceFileHeader(StringRef Desc,
2020 raw_ostream &OS) const {
21 emitSourceFileHeader(Desc, OS);
22 }
23
24 void llvm::emitSourceFileHeader(StringRef Desc, raw_ostream &OS) {
2125 OS << "//===- TableGen'erated file -------------------------------------*-"
2226 " C++ -*-===//\n//\n// " << Desc << "\n//\n// Automatically generate"
2327 "d file, do not edit!\n//\n//===------------------------------------"
2428 "----------------------------------===//\n\n";
2529 }
26
9595 //
9696 //===----------------------------------------------------------------------===//
9797
98 #include "AsmMatcherEmitter.h"
9998 #include "CodeGenTarget.h"
10099 #include "StringToOffsetTable.h"
101100 #include "llvm/ADT/OwningPtr.h"
110109 #include "llvm/TableGen/Error.h"
111110 #include "llvm/TableGen/Record.h"
112111 #include "llvm/TableGen/StringMatcher.h"
112 #include "llvm/TableGen/TableGenBackend.h"
113 #include
113114 #include
114115 #include
115116 using namespace llvm;
121122 namespace {
122123 class AsmMatcherInfo;
123124 struct SubtargetFeatureInfo;
125
126 class AsmMatcherEmitter {
127 RecordKeeper &Records;
128 public:
129 AsmMatcherEmitter(RecordKeeper &R) : Records(R) {}
130
131 void run(raw_ostream &o);
132 };
124133
125134 /// ClassInfo - Helper class for storing the information about a particular
126135 /// class of operands which can be matched.
641650 }
642651 };
643652
644 }
653 } // End anonymous namespace
645654
646655 void MatchableInfo::dump() {
647656 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n";
23522361
23532362 // Write the output.
23542363
2355 EmitSourceFileHeader("Assembly Matcher Source Fragment", OS);
2356
23572364 // Information for the class declaration.
23582365 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n";
23592366 OS << "#undef GET_ASSEMBLER_HEADER\n";
26582665
26592666 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";
26602667 }
2668
2669 namespace llvm {
2670
2671 void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS) {
2672 emitSourceFileHeader("Assembly Matcher Source Fragment", OS);
2673 AsmMatcherEmitter(RK).run(OS);
2674 }
2675
2676 } // End llvm namespace
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utils/TableGen/AsmMatcherEmitter.h less more
None //===- AsmMatcherEmitter.h - Generate an assembly matcher -------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend emits a target specifier matcher for converting parsed
10 // assembly operands in the MCInst structures.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef ASMMATCHER_EMITTER_H
15 #define ASMMATCHER_EMITTER_H
16
17 #include "llvm/TableGen/TableGenBackend.h"
18 #include
19
20 namespace llvm {
21 class AsmMatcherEmitter : public TableGenBackend {
22 RecordKeeper &Records;
23 public:
24 AsmMatcherEmitter(RecordKeeper &R) : Records(R) {}
25
26 // run - Output the matcher, returning true on failure.
27 void run(raw_ostream &o);
28 };
29 }
30 #endif
1111 //
1212 //===----------------------------------------------------------------------===//
1313
14 #include "AsmWriterEmitter.h"
1514 #include "AsmWriterInst.h"
1615 #include "CodeGenTarget.h"
1716 #include "StringToOffsetTable.h"
2120 #include "llvm/Support/MathExtras.h"
2221 #include "llvm/TableGen/Error.h"
2322 #include "llvm/TableGen/Record.h"
23 #include "llvm/TableGen/TableGenBackend.h"
2424 #include
25 #include
26 #include
27 #include
2528 using namespace llvm;
29
30 namespace {
31 class AsmWriterEmitter {
32 RecordKeeper &Records;
33 std::map CGIAWIMap;
34 std::vector NumberedInstructions;
35 public:
36 AsmWriterEmitter(RecordKeeper &R) : Records(R) {}
37
38 void run(raw_ostream &o);
39
40 private:
41 void EmitPrintInstruction(raw_ostream &o);
42 void EmitGetRegisterName(raw_ostream &o);
43 void EmitPrintAliasInstruction(raw_ostream &O);
44
45 AsmWriterInst *getAsmWriterInstByID(unsigned ID) const {
46 assert(ID < NumberedInstructions.size());
47 std::map::const_iterator I =
48 CGIAWIMap.find(NumberedInstructions[ID]);
49 assert(I != CGIAWIMap.end() && "Didn't find inst!");
50 return I->second;
51 }
52 void FindUniqueOperandCommands(std::vector &UOC,
53 std::vector &InstIdxs,
54 std::vector &InstOpsUsed) const;
55 };
56 } // end anonymous namespace
2657
2758 static void PrintCases(std::vector
2859 AsmWriterOperand> > &OpsToPrint, raw_ostream &O) {
927958 }
928959
929960 void AsmWriterEmitter::run(raw_ostream &O) {
930 EmitSourceFileHeader("Assembly Writer Source Fragment", O);
931
932961 EmitPrintInstruction(O);
933962 EmitGetRegisterName(O);
934963 EmitPrintAliasInstruction(O);
935964 }
936965
966
967 namespace llvm {
968
969 void EmitAsmWriter(RecordKeeper &RK, raw_ostream &OS) {
970 emitSourceFileHeader("Assembly Writer Source Fragment", OS);
971 AsmWriterEmitter(RK).run(OS);
972 }
973
974 } // End llvm namespace
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utils/TableGen/AsmWriterEmitter.h less more
None //===- AsmWriterEmitter.h - Generate an assembly writer ---------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend is responsible for emitting an assembly printer for the
10 // code generator.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef ASMWRITER_EMITTER_H
15 #define ASMWRITER_EMITTER_H
16
17 #include "llvm/TableGen/TableGenBackend.h"
18 #include
19 #include
20 #include
21
22 namespace llvm {
23 class AsmWriterInst;
24 class CodeGenInstruction;
25
26 class AsmWriterEmitter : public TableGenBackend {
27 RecordKeeper &Records;
28 std::map CGIAWIMap;
29 std::vector NumberedInstructions;
30 public:
31 AsmWriterEmitter(RecordKeeper &R) : Records(R) {}
32
33 // run - Output the asmwriter, returning true on failure.
34 void run(raw_ostream &o);
35
36 private:
37 void EmitPrintInstruction(raw_ostream &o);
38 void EmitGetRegisterName(raw_ostream &o);
39 void EmitPrintAliasInstruction(raw_ostream &O);
40
41 AsmWriterInst *getAsmWriterInstByID(unsigned ID) const {
42 assert(ID < NumberedInstructions.size());
43 std::map::const_iterator I =
44 CGIAWIMap.find(NumberedInstructions[ID]);
45 assert(I != CGIAWIMap.end() && "Didn't find inst!");
46 return I->second;
47 }
48 void FindUniqueOperandCommands(std::vector &UOC,
49 std::vector &InstIdxs,
50 std::vector &InstOpsUsed) const;
51 };
52 }
53 #endif
1111 //
1212 //===----------------------------------------------------------------------===//
1313
14 #include "CallingConvEmitter.h"
1514 #include "CodeGenTarget.h"
1615 #include "llvm/TableGen/Record.h"
16 #include "llvm/TableGen/TableGenBackend.h"
17 #include
1718 using namespace llvm;
1819
20 namespace {
21 class CallingConvEmitter {
22 RecordKeeper &Records;
23 public:
24 explicit CallingConvEmitter(RecordKeeper &R) : Records(R) {}
25
26 void run(raw_ostream &o);
27
28 private:
29 void EmitCallingConv(Record *CC, raw_ostream &O);
30 void EmitAction(Record *Action, unsigned Indent, raw_ostream &O);
31 unsigned Counter;
32 };
33 } // End anonymous namespace
34
1935 void CallingConvEmitter::run(raw_ostream &O) {
20 EmitSourceFileHeader("Calling Convention Implementation Fragment", O);
2136
2237 std::vector CCs = Records.getAllDerivedDefinitions("CallingConv");
2338
209224 }
210225 }
211226 }
227
228 namespace llvm {
229
230 void EmitCallingConv(RecordKeeper &RK, raw_ostream &OS) {
231 emitSourceFileHeader("Calling Convention Implementation Fragment", OS);
232 CallingConvEmitter(RK).run(OS);
233 }
234
235 } // End llvm namespace
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utils/TableGen/CallingConvEmitter.h less more
None //===- CallingConvEmitter.h - Generate calling conventions ------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend is responsible for emitting descriptions of the calling
10 // conventions supported by this target.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef CALLINGCONV_EMITTER_H
15 #define CALLINGCONV_EMITTER_H
16
17 #include "llvm/TableGen/TableGenBackend.h"
18 #include
19
20 namespace llvm {
21 class CallingConvEmitter : public TableGenBackend {
22 RecordKeeper &Records;
23 public:
24 explicit CallingConvEmitter(RecordKeeper &R) : Records(R) {}
25
26 // run - Output the asmwriter, returning true on failure.
27 void run(raw_ostream &o);
28
29 private:
30 void EmitCallingConv(Record *CC, raw_ostream &O);
31 void EmitAction(Record *Action, unsigned Indent, raw_ostream &O);
32 unsigned Counter;
33 };
34 }
35 #endif
1212 //
1313 //===----------------------------------------------------------------------===//
1414
15 #include "CodeEmitterGen.h"
1615 #include "CodeGenTarget.h"
1716 #include "llvm/TableGen/Record.h"
1817 #include "llvm/ADT/StringExtras.h"
1918 #include "llvm/Support/CommandLine.h"
2019 #include "llvm/Support/Debug.h"
20 #include "llvm/TableGen/TableGenBackend.h"
2121 #include
22 #include
23 #include
2224 using namespace llvm;
2325
2426 // FIXME: Somewhat hackish to use a command line option for this. There should
2830 MCEmitter("mc-emitter",
2931 cl::desc("Generate CodeEmitter for use with the MC library."),
3032 cl::init(false));
33
34 namespace {
35
36 class CodeEmitterGen {
37 RecordKeeper &Records;
38 public:
39 CodeEmitterGen(RecordKeeper &R) : Records(R) {}
40
41 void run(raw_ostream &o);
42 private:
43 void emitMachineOpEmitter(raw_ostream &o, const std::string &Namespace);
44 void emitGetValueBit(raw_ostream &o, const std::string &Namespace);
45 void reverseBits(std::vector &Insts);
46 int getVariableBit(const std::string &VarName, BitsInit *BI, int bit);
47 std::string getInstructionCase(Record *R, CodeGenTarget &Target);
48 void AddCodeToMergeInOperand(Record *R, BitsInit *BI,
49 const std::string &VarName,
50 unsigned &NumberedOp,
51 std::string &Case, CodeGenTarget &Target);
52
53 };
3154
3255 void CodeEmitterGen::reverseBits(std::vector &Insts) {
3356 for (std::vector::iterator I = Insts.begin(), E = Insts.end();
213236 // For little-endian instruction bit encodings, reverse the bit order
214237 if (Target.isLittleEndianEncoding()) reverseBits(Insts);
215238
216 EmitSourceFileHeader("Machine Code Emitter", o);
217239
218240 const std::vector &NumberedInstructions =
219241 Target.getInstructionsByEnumValue();
303325 << " return Value;\n"
304326 << "}\n\n";
305327 }
328
329 } // End anonymous namespace
330
331 namespace llvm {
332
333 void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS) {
334 emitSourceFileHeader("Machine Code Emitter", OS);
335 CodeEmitterGen(RK).run(OS);
336 }
337
338 } // End llvm namespace
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utils/TableGen/CodeEmitterGen.h less more
None //===- CodeEmitterGen.h - Code Emitter Generator ----------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // FIXME: document
10 //
11 //===----------------------------------------------------------------------===//
12
13 #ifndef CODEMITTERGEN_H
14 #define CODEMITTERGEN_H
15
16 #include "llvm/TableGen/TableGenBackend.h"
17 #include
18 #include
19
20 namespace llvm {
21
22 class RecordVal;
23 class BitsInit;
24 class CodeGenTarget;
25
26 class CodeEmitterGen : public TableGenBackend {
27 RecordKeeper &Records;
28 public:
29 CodeEmitterGen(RecordKeeper &R) : Records(R) {}
30
31 // run - Output the code emitter
32 void run(raw_ostream &o);
33 private:
34 void emitMachineOpEmitter(raw_ostream &o, const std::string &Namespace);
35 void emitGetValueBit(raw_ostream &o, const std::string &Namespace);
36 void reverseBits(std::vector &Insts);
37 int getVariableBit(const std::string &VarName, BitsInit *BI, int bit);
38 std::string getInstructionCase(Record *R, CodeGenTarget &Target);
39 void
40 AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName,
41 unsigned &NumberedOp,
42 std::string &Case, CodeGenTarget &Target);
43
44 };
45
46 } // End llvm namespace
47
48 #endif
1010 //
1111 //===----------------------------------------------------------------------===//
1212
13 #include "DAGISelEmitter.h"
13 #include "CodeGenDAGPatterns.h"
1414 #include "DAGISelMatcher.h"
15 #include "llvm/Support/Debug.h"
1516 #include "llvm/TableGen/Record.h"
16 #include "llvm/Support/Debug.h"
17 #include "llvm/TableGen/TableGenBackend.h"
1718 using namespace llvm;
19
20 namespace {
21 /// DAGISelEmitter - The top-level class which coordinates construction
22 /// and emission of the instruction selector.
23 class DAGISelEmitter {
24 CodeGenDAGPatterns CGP;
25 public:
26 explicit DAGISelEmitter(RecordKeeper &R) : CGP(R) {}
27 void run(raw_ostream &OS);
28 };
29 } // End anonymous namespace
1830
1931 //===----------------------------------------------------------------------===//
2032 // DAGISelEmitter Helper methods
103115 return LHS->ID < RHS->ID;
104116 }
105117 };
106 }
118 } // End anonymous namespace
107119
108120
109121 void DAGISelEmitter::run(raw_ostream &OS) {
110 EmitSourceFileHeader("DAG Instruction Selector for the " +
122 emitSourceFileHeader("DAG Instruction Selector for the " +
111123 CGP.getTargetInfo().getName() + " target", OS);
112124
113125 OS << "// *** NOTE: This file is #included into the middle of the target\n"
152164 EmitMatcherTable(TheMatcher, CGP, OS);
153165 delete TheMatcher;
154166 }
167
168 namespace llvm {
169
170 void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS) {
171 DAGISelEmitter(RK).run(OS);
172 }
173
174 } // End llvm namespace
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utils/TableGen/DAGISelEmitter.h less more
None //===- DAGISelEmitter.h - Generate an instruction selector ------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend emits a DAG instruction selector.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #ifndef DAGISEL_EMITTER_H
14 #define DAGISEL_EMITTER_H
15
16 #include "llvm/TableGen/TableGenBackend.h"
17 #include "CodeGenDAGPatterns.h"
18
19 namespace llvm {
20
21 /// DAGISelEmitter - The top-level class which coordinates construction
22 /// and emission of the instruction selector.
23 ///
24 class DAGISelEmitter : public TableGenBackend {
25 CodeGenDAGPatterns CGP;
26 public:
27 explicit DAGISelEmitter(RecordKeeper &R) : CGP(R) {}
28
29 // run - Output the isel, returning true on failure.
30 void run(raw_ostream &OS);
31 };
32
33 } // End llvm namespace
34
35 #endif
1414 //
1515 //===----------------------------------------------------------------------===//
1616
17 #include "CodeGenTarget.h"
18 #include "llvm/ADT/DenseSet.h"
1719 #include "llvm/TableGen/Record.h"
18 #include "CodeGenTarget.h"
19 #include "DFAPacketizerEmitter.h"
20 #include "llvm/TableGen/TableGenBackend.h"
2021 #include
21
22 #include
23 #include
2224 using namespace llvm;
25
26 //
27 // class DFAPacketizerEmitter: class that generates and prints out the DFA
28 // for resource tracking.
29 //
30 namespace {
31 class DFAPacketizerEmitter {
32 private:
33 std::string TargetName;
34 //
35 // allInsnClasses is the set of all possible resources consumed by an
36 // InstrStage.
37 //
38 DenseSet allInsnClasses;
39 RecordKeeper &Records;
40
41 public:
42 DFAPacketizerEmitter(RecordKeeper &R);
43
44 //
45 // collectAllInsnClasses: Populate allInsnClasses which is a set of units
46 // used in each stage.
47 //
48 void collectAllInsnClasses(const std::string &Name,
49 Record *ItinData,
50 unsigned &NStages,
51 raw_ostream &OS);
52
53 void run(raw_ostream &OS);
54 };
55 } // End anonymous namespace.
2356
2457 //
2558 //
265298 int State::currentStateNum = 0;
266299 int Transition::currentTransitionNum = 0;
267300
268 DFAGen::DFAGen(RecordKeeper &R):
301 DFAPacketizerEmitter::DFAPacketizerEmitter(RecordKeeper &R):
269302 TargetName(CodeGenTarget(R).getName()),
270303 allInsnClasses(), Records(R) {}
271304
345378 // collectAllInsnClasses - Populate allInsnClasses which is a set of units
346379 // used in each stage.
347380 //
348 void DFAGen::collectAllInsnClasses(const std::string &Name,
381 void DFAPacketizerEmitter::collectAllInsnClasses(const std::string &Name,
349382 Record *ItinData,
350383 unsigned &NStages,
351384 raw_ostream &OS) {
401434 //
402435 // Run the worklist algorithm to generate the DFA.
403436 //
404 void DFAGen::run(raw_ostream &OS) {
405 EmitSourceFileHeader("Target DFA Packetizer Tables", OS);
437 void DFAPacketizerEmitter::run(raw_ostream &OS) {
406438
407439 // Collect processor iteraries.
408440 std::vector ProcItinList =
509541 // Print out the table.
510542 D.writeTableAndAPI(OS, TargetName);
511543 }
544
545 namespace llvm {
546
547 void EmitDFAPacketizer(RecordKeeper &RK, raw_ostream &OS) {
548 emitSourceFileHeader("Target DFA Packetizer Tables", OS);
549 DFAPacketizerEmitter(RK).run(OS);
550 }
551
552 } // End llvm namespace
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utils/TableGen/DFAPacketizerEmitter.h less more
None //===- DFAPacketizerEmitter.h - Packetization DFA for a VLIW machine-------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This class parses the Schedule.td file and produces an API that can be used
10 // to reason about whether an instruction can be added to a packet on a VLIW
11 // architecture. The class internally generates a deterministic finite
12 // automaton (DFA) that models all possible mappings of machine instructions
13 // to functional units as instructions are added to a packet.
14 //
15 //===----------------------------------------------------------------------===//
16
17 #include "llvm/ADT/DenseSet.h"
18 #include "llvm/TableGen/TableGenBackend.h"
19 #include
20 #include
21
22 namespace llvm {
23 //
24 // class DFAGen: class that generates and prints out the DFA for resource
25 // tracking.
26 //
27 class DFAGen : public TableGenBackend {
28 private:
29 std::string TargetName;
30 //
31 // allInsnClasses is the set of all possible resources consumed by an
32 // InstrStage.
33 //
34 DenseSet allInsnClasses;
35 RecordKeeper &Records;
36
37 public:
38 DFAGen(RecordKeeper &R);
39
40 //
41 // collectAllInsnClasses: Populate allInsnClasses which is a set of units
42 // used in each stage.
43 //
44 void collectAllInsnClasses(const std::string &Name,
45 Record *ItinData,
46 unsigned &NStages,
47 raw_ostream &OS);
48
49 void run(raw_ostream &OS);
50 };
51 }
66 //
77 //===----------------------------------------------------------------------===//
88
9 #include "DisassemblerEmitter.h"
109 #include "CodeGenTarget.h"
1110 #include "X86DisassemblerTables.h"
1211 #include "X86RecognizableInstr.h"
13 #include "FixedLenDecoderEmitter.h"
1412 #include "llvm/TableGen/Error.h"
1513 #include "llvm/TableGen/Record.h"
14 #include "llvm/TableGen/TableGenBackend.h"
1615
1716 using namespace llvm;
1817 using namespace llvm::X86Disassembler;
9392 /// X86RecognizableInstr.cpp contains the implementation for a single
9493 /// instruction.
9594
96 void DisassemblerEmitter::run(raw_ostream &OS) {
95 namespace llvm {
96
97 extern void EmitFixedLenDecoder(RecordKeeper &RK, raw_ostream &OS,
98 std::string PredicateNamespace,
99 std::string GPrefix,
100 std::string GPostfix,
101 std::string ROK,
102 std::string RFail,
103 std::string L);
104
105 void EmitDisassembler(RecordKeeper &Records, raw_ostream &OS) {
97106 CodeGenTarget Target(Records);
98
99 OS << "/*===- TableGen'erated file "
100 << "---------------------------------------*- C -*-===*\n"
101 << " *\n"
102 << " * " << Target.getName() << " Disassembler\n"
103 << " *\n"
104 << " * Automatically generated file, do not edit!\n"
105 << " *\n"
106 << " *===---------------------------------------------------------------"
107 << "-------===*/\n";
107 emitSourceFileHeader(" * " + Target.getName() + " Disassembler", OS);
108108
109109 // X86 uses a custom disassembler.
110110 if (Target.getName() == "X86") {
111111 DisassemblerTables Tables;
112
112
113113 const std::vector &numberedInstructions =
114114 Target.getInstructionsByEnumValue();
115
115
116116 for (unsigned i = 0, e = numberedInstructions.size(); i != e; ++i)
117117 RecognizableInstr::processInstr(Tables, *numberedInstructions[i], i);
118118
129129 // ARM and Thumb have a CHECK() macro to deal with DecodeStatuses.
130130 if (Target.getName() == "ARM" ||
131131 Target.getName() == "Thumb") {
132 FixedLenDecoderEmitter(Records,
133 "ARM",
134 "if (!Check(S, ", ")) return MCDisassembler::Fail;",
135 "S", "MCDisassembler::Fail",
136 " MCDisassembler::DecodeStatus S = MCDisassembler::Success;\n(void)S;").run(OS);
132 EmitFixedLenDecoder(Records, OS, "ARM",
133 "if (!Check(S, ", ")) return MCDisassembler::Fail;",
134 "S", "MCDisassembler::Fail",
135 " MCDisassembler::DecodeStatus S = "
136 "MCDisassembler::Success;\n(void)S;");
137137 return;
138138 }
139139
140 FixedLenDecoderEmitter(Records, Target.getName()).run(OS);
140 EmitFixedLenDecoder(Records, OS, Target.getName(),
141 "if (", " == MCDisassembler::Fail)"
142 " return MCDisassembler::Fail;",
143 "MCDisassembler::Success", "MCDisassembler::Fail", "");
141144 }
145
146 } // End llvm namespace
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utils/TableGen/DisassemblerEmitter.h less more
None //===- DisassemblerEmitter.h - Disassembler Generator -----------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #ifndef DISASSEMBLEREMITTER_H
10 #define DISASSEMBLEREMITTER_H
11
12 #include "llvm/TableGen/TableGenBackend.h"
13
14 namespace llvm {
15
16 class DisassemblerEmitter : public TableGenBackend {
17 RecordKeeper &Records;
18 public:
19 DisassemblerEmitter(RecordKeeper &R) : Records(R) {}
20
21 /// run - Output the disassembler.
22 void run(raw_ostream &o);
23 };
24
25 } // end llvm namespace
26
27 #endif
1212 //
1313 //===----------------------------------------------------------------------===//
1414
15 #include "EDEmitter.h"
16
1715 #include "AsmWriterInst.h"
1816 #include "CodeGenTarget.h"
19
20 #include "llvm/TableGen/Record.h"
2117 #include "llvm/MC/EDInstInfo.h"
2218 #include "llvm/Support/ErrorHandling.h"
2319 #include "llvm/Support/Format.h"
2420 #include "llvm/Support/raw_ostream.h"
25
21 #include "llvm/TableGen/Record.h"
22 #include "llvm/TableGen/TableGenBackend.h"
2623 #include
2724 #include
2825
2926 using namespace llvm;
27
28 // TODO: There's a suspiciously large amount of "table" data in this
29 // backend which should probably be in the TableGen file itself.
3030
3131 ///////////////////////////////////////////////////////////
3232 // Support classes for emitting nested C data structures //
3333 ///////////////////////////////////////////////////////////
3434
35 // TODO: These classes are probably generally useful to other backends;
36 // add them to TableGen's "helper" API's.
37
3538 namespace {
36
37 class EnumEmitter {
38 private:
39 std::string Name;
40 std::vector Entries;
41 public:
42 EnumEmitter(const char *N) : Name(N) {
43 }
44 int addEntry(const char *e) {
45 Entries.push_back(std::string(e));
46 return Entries.size() - 1;
47 }
48 void emit(raw_ostream &o, unsigned int &i) {
49 o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
50 i += 2;
51
52 unsigned int index = 0;
53 unsigned int numEntries = Entries.size();
54 for (index = 0; index < numEntries; ++index) {
55 o.indent(i) << Entries[index];
56 if (index < (numEntries - 1))
57 o << ",";
58 o << "\n";
39 class EnumEmitter {
40 private:
41 std::string Name;
42 std::vector Entries;
43 public:
44 EnumEmitter(const char *N) : Name(N) {
45 }
46 int addEntry(const char *e) {
47 Entries.push_back(std::string(e));
48 return Entries.size() - 1;
49 }
50 void emit(raw_ostream &o, unsigned int &i) {
51 o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
52 i += 2;
53
54 unsigned int index = 0;
55 unsigned int numEntries = Entries.size();
56 for (index = 0; index < numEntries; ++index) {
57 o.indent(i) << Entries[index];
58 if (index < (numEntries - 1))
59 o << ",";
60 o << "\n";
61 }
62
63 i -= 2;
64 o.indent(i) << "};" << "\n";
65 }
66
67 void emitAsFlags(raw_ostream &o, unsigned int &i) {
68 o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
69 i += 2;
70
71 unsigned int index = 0;
72 unsigned int numEntries = Entries.size();
73 unsigned int flag = 1;
74 for (index = 0; index < numEntries; ++index) {
75 o.indent(i) << Entries[index] << " = " << format("0x%x", flag);
76 if (index < (numEntries - 1))
77 o << ",";
78 o << "\n";
79 flag <<= 1;
80 }
81
82 i -= 2;
83 o.indent(i) << "};" << "\n";
84 }
85 };
86 } // End anonymous namespace
87
88 namespace {
89 class ConstantEmitter {
90 public:
91 virtual ~ConstantEmitter() { }
92 virtual void emit(raw_ostream &o, unsigned int &i) = 0;
93 };
94 } // End anonymous namespace
95
96 namespace {
97 class LiteralConstantEmitter : public ConstantEmitter {
98 private:
99 bool IsNumber;
100 union {
101 int Number;
102 const char* String;
103 };
104 public:
105 LiteralConstantEmitter(int number = 0) :
106 IsNumber(true),
107 Number(number) {
108 }
109 void set(const char *string) {
110 IsNumber = false;
111 Number = 0;
112 String = string;
113 }
114 bool is(const char *string) {
115 return !strcmp(String, string);
116 }
117 void emit(raw_ostream &o, unsigned int &i) {
118 if (IsNumber)
119 o << Number;
120 else
121 o << String;
122 }
123 };
124 } // End anonymous namespace
125
126 namespace {
127 class CompoundConstantEmitter : public ConstantEmitter {
128 private:
129 unsigned int Padding;
130 std::vector Entries;
131 public:
132 CompoundConstantEmitter(unsigned int padding = 0) : Padding(padding) {
133 }
134 CompoundConstantEmitter &addEntry(ConstantEmitter *e) {
135 Entries.push_back(e);
136
137 return *this;
138 }
139 ~CompoundConstantEmitter() {
140 while (Entries.size()) {
141 ConstantEmitter *entry = Entries.back();
142 Entries.pop_back();
143 delete entry;
144 }
145 }
146 void emit(raw_ostream &o, unsigned int &i) {
147 o << "{" << "\n";
148 i += 2;
149
150 unsigned int index;
151 unsigned int numEntries = Entries.size();
152
153 unsigned int numToPrint;
154
155 if (Padding) {
156 if (numEntries > Padding) {
157 fprintf(stderr, "%u entries but %u padding\n", numEntries, Padding);
158 llvm_unreachable("More entries than padding");
59159 }
60
61 i -= 2;
62 o.indent(i) << "};" << "\n";
63 }
64
65 void emitAsFlags(raw_ostream &o, unsigned int &i) {
66 o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
67 i += 2;
68
69 unsigned int index = 0;
70 unsigned int numEntries = Entries.size();
71 unsigned int flag = 1;
72 for (index = 0; index < numEntries; ++index) {
73 o.indent(i) << Entries[index] << " = " << format("0x%x", flag);
74 if (index < (numEntries - 1))
75 o << ",";
76 o << "\n";
77 flag <<= 1;
78 }
79
80 i -= 2;
81 o.indent(i) << "};" << "\n";
82 }
83 };
84
85 class ConstantEmitter {
86 public:
87 virtual ~ConstantEmitter() { }
88 virtual void emit(raw_ostream &o, unsigned int &i) = 0;
89 };
90
91 class LiteralConstantEmitter : public ConstantEmitter {
92 private:
93 bool IsNumber;
94 union {
95 int Number;
96 const char* String;
97 };
98 public:
99 LiteralConstantEmitter(int number = 0) :
100 IsNumber(true),
101 Number(number) {
102 }
103 void set(const char *string) {
104 IsNumber = false;
105 Number = 0;
106 String = string;
107 }
108 bool is(const char *string) {
109 return !strcmp(String, string);
110 }
111 void emit(raw_ostream &o, unsigned int &i) {
112 if (IsNumber)
113 o << Number;
160 numToPrint = Padding;
161 } else {
162 numToPrint = numEntries;
163 }
164
165 for (index = 0; index < numToPrint; ++index) {
166 o.indent(i);
167 if (index < numEntries)
168 Entries[index]->emit(o, i);
114169 else
115 o << String;
116 }
117 };
118
119 class CompoundConstantEmitter : public ConstantEmitter {
120 private:
121 unsigned int Padding;
122 std::vector Entries;
123 public:
124 CompoundConstantEmitter(unsigned int padding = 0) : Padding(padding) {
125 }
126 CompoundConstantEmitter &addEntry(ConstantEmitter *e) {
127 Entries.push_back(e);
128
129 return *this;
130 }
131 ~CompoundConstantEmitter() {
132 while (Entries.size()) {
133 ConstantEmitter *entry = Entries.back();
134 Entries.pop_back();
135 delete entry;
136 }
137 }
138 void emit(raw_ostream &o, unsigned int &i) {
139 o << "{" << "\n";
140 i += 2;
141
142 unsigned int index;
143 unsigned int numEntries = Entries.size();
144
145 unsigned int numToPrint;
146
147 if (Padding) {
148 if (numEntries > Padding) {
149 fprintf(stderr, "%u entries but %u padding\n", numEntries, Padding);
150 llvm_unreachable("More entries than padding");
151 }
152 numToPrint = Padding;
153 } else {
154 numToPrint = numEntries;
155 }
156
157 for (index = 0; index < numToPrint; ++index) {
158 o.indent(i);
159 if (index < numEntries)
160 Entries[index]->emit(o, i);
161 else
162 o << "-1";
163
164 if (index < (numToPrint - 1))
165 o << ",";
166 o << "\n";
167 }
168
169 i -= 2;
170 o.indent(i) << "}";
171 }
172 };
173
174 class FlagsConstantEmitter : public ConstantEmitter {
175 private:
176 std::vector Flags;
177 public:
178 FlagsConstantEmitter() {
179 }
180 FlagsConstantEmitter &addEntry(const char *f) {
181 Flags.push_back(std::string(f));
182 return *this;
183 }
184 void emit(raw_ostream &o, unsigned int &i) {
185 unsigned int index;
186 unsigned int numFlags = Flags.size();
187 if (numFlags == 0)
188 o << "0";
189
190 for (index = 0; index < numFlags; ++index) {
191 o << Flags[index].c_str();
192 if (index < (numFlags - 1))
193 o << " | ";
194 }
195 }
196 };
197 }
198
199 EDEmitter::EDEmitter(RecordKeeper &R) : Records(R) {
200 }
170 o << "-1";
171
172 if (index < (numToPrint - 1))
173 o << ",";
174 o << "\n";
175 }
176
177 i -= 2;
178 o.indent(i) << "}";
179 }
180 };
181 } // End anonymous namespace
182
183 namespace {
184 class FlagsConstantEmitter : public ConstantEmitter {
185 private:
186 std::vector Flags;
187 public:
188 FlagsConstantEmitter() {
189 }
190 FlagsConstantEmitter &addEntry(const char *f) {
191 Flags.push_back(std::string(f));
192 return *this;
193 }
194 void emit(raw_ostream &o, unsigned int &i) {
195 unsigned int index;
196 unsigned int numFlags = Flags.size();
197 if (numFlags == 0)
198 o << "0";
199
200 for (index = 0; index < numFlags; ++index) {
201 o << Flags[index].c_str();
202 if (index < (numFlags - 1))
203 o << " | ";
204 }
205 }
206 };
207 } // End anonymous namespace
201208
202209 /// populateOperandOrder - Accepts a CodeGenInstruction and generates its
203210 /// AsmWriterInst for the desired assembly syntax, giving an ordered list of
212219 /// representing an index in the operand descriptor array.
213220 /// @arg inst - The instruction to use when looking up the operands
214221 /// @arg syntax - The syntax to use, according to LLVM's enumeration
215 void populateOperandOrder(CompoundConstantEmitter *operandOrder,
216 const CodeGenInstruction &inst,
217 unsigned syntax) {
222 static void populateOperandOrder(CompoundConstantEmitter *operandOrder,
223 const CodeGenInstruction &inst,
224 unsigned syntax) {
218225 unsigned int numArgs = 0;
219226
220227 AsmWriterInst awInst(inst, syntax, -1, -1);
974981 o << "\n";
975982 }
976983
977 void EDEmitter::run(raw_ostream &o) {
984 namespace llvm {
985
986 void EmitEnhancedDisassemblerInfo(RecordKeeper &RK, raw_ostream &OS) {
987 emitSourceFileHeader("Enhanced Disassembler Info", OS);
978988 unsigned int i = 0;
979989
980990 CompoundConstantEmitter infoArray;
981 CodeGenTarget target(Records);
991 CodeGenTarget target(RK);
982992
983993 populateInstInfo(infoArray, target);
984994
985 emitCommonEnums(o, i);
986
987 o << "static const llvm::EDInstInfo instInfo" << target.getName() << "[] = ";
988 infoArray.emit(o, i);
989 o << ";" << "\n";
990 }
995 emitCommonEnums(OS, i);
996
997 OS << "static const llvm::EDInstInfo instInfo"
998 << target.getName() << "[] = ";
999 infoArray.emit(OS, i);
1000 OS << ";" << "\n";
1001 }
1002
1003 } // End llvm namespace
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utils/TableGen/EDEmitter.h less more
None //===- EDEmitter.h - Generate instruction descriptions for ED ---*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend is responsible for emitting a description of each
10 // instruction in a format that the semantic disassembler can use to tokenize
11 // and parse instructions.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #ifndef SEMANTIC_INFO_EMITTER_H
16 #define SEMANTIC_INFO_EMITTER_H
17
18 #include "llvm/TableGen/TableGenBackend.h"
19
20 namespace llvm {
21
22 class EDEmitter : public TableGenBackend {
23 RecordKeeper &Records;
24 public:
25 EDEmitter(RecordKeeper &R);
26
27 // run - Output the instruction table.
28 void run(raw_ostream &o);
29 };
30
31 } // End llvm namespace
32
33 #endif
1616 //
1717 //===----------------------------------------------------------------------===//
1818
19 #include "FastISelEmitter.h"
20 #include "llvm/TableGen/Error.h"
21 #include "llvm/TableGen/Record.h"
19 #include "CodeGenDAGPatterns.h"
2220 #include "llvm/ADT/SmallString.h"
2321 #include "llvm/Support/Debug.h"
2422 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/TableGen/Error.h"
24 #include "llvm/TableGen/Record.h"
25 #include "llvm/TableGen/TableGenBackend.h"
2526 using namespace llvm;
2627
27 namespace {
2828
2929 /// InstructionMemo - This class holds additional information about an
3030 /// instruction needed to emit code for it.
3131 ///
32 namespace {
3233 struct InstructionMemo {
3334 std::string Name;
3435 const CodeGenRegisterClass *RC;
3536 std::string SubRegNo;
3637 std::vector* PhysRegs;
3738 };
38
39 } // End anonymous namespace
40
3941 /// ImmPredicateSet - This uniques predicates (represented as a string) and
4042 /// gives them unique (small) integer ID's that start at 0.
43 namespace {
4144 class ImmPredicateSet {
4245 DenseMap ImmIDs;
4346 std::vector PredsByName;
6265 iterator end() const { return PredsByName.end(); }
6366
6467 };
68 } // End anonymous namespace
6569
6670 /// OperandsSignature - This class holds a description of a list of operand
6771 /// types. It has utility methods for emitting text based on the operands.
6872 ///
73 namespace {
6974 struct OperandsSignature {
7075 class OpKind {
7176 enum { OK_Reg, OK_FP, OK_Imm, OK_Invalid = -1 };
351356 Operands[i].printManglingSuffix(OS, ImmPredicates, StripImmCodes);
352357 }
353358 };
354
359 } // End anonymous namespace
360
361 namespace {
355362 class FastISelMap {
356363 typedef std::map PredMap;
357364 typedef std::map RetPredMap;
374381 void printImmediatePredicates(raw_ostream &OS);
375382 void printFunctionDefinitions(raw_ostream &OS);
376383 };
377
378 }
384 } // End anonymous namespace
379385
380386 static std::string getOpcodeName(Record *Op, CodeGenDAGPatterns &CGP) {
381387 return CGP.getSDNodeInfo(Op).getEnumName();
849855 // TODO: SignaturesWithConstantForms should be empty here.
850856 }
851857
852 void FastISelEmitter::run(raw_ostream &OS) {
858 namespace llvm {
859
860 void EmitFastISel(RecordKeeper &RK, raw_ostream &OS) {
861 CodeGenDAGPatterns CGP(RK);
853862 const CodeGenTarget &Target = CGP.getTargetInfo();
863 emitSourceFileHeader("\"Fast\" Instruction Selector for the " +
864 Target.getName() + " target", OS);
854865
855866 // Determine the target's namespace name.
856867 std::string InstNS = Target.getInstNamespace() + "::";
857868 assert(InstNS.size() > 2 && "Can't determine target-specific namespace!");
858
859 EmitSourceFileHeader("\"Fast\" Instruction Selector for the " +
860 Target.getName() + " target", OS);
861869
862870 FastISelMap F(InstNS);
863871 F.collectPatterns(CGP);
865873 F.printFunctionDefinitions(OS);
866874 }
867875
868 FastISelEmitter::FastISelEmitter(RecordKeeper &R)
869 : CGP(R) {
870 }
871
876 } // End llvm namespace
+0
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utils/TableGen/FastISelEmitter.h less more
None //===- FastISelEmitter.h - Generate an instruction selector -----*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend emits a "fast" instruction selector.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #ifndef FASTISEL_EMITTER_H
14 #define FASTISEL_EMITTER_H
15
16 #include "CodeGenDAGPatterns.h"
17 #include "llvm/TableGen/TableGenBackend.h"
18
19 namespace llvm {
20
21 class CodeGenTarget;
22
23 /// FastISelEmitter - The top-level class which coordinates construction
24 /// and emission of the instruction selector.
25 ///
26 class FastISelEmitter : public TableGenBackend {
27 CodeGenDAGPatterns CGP;
28 public:
29 explicit FastISelEmitter(RecordKeeper &R);
30
31 // run - Output the isel, returning true on failure.
32 void run(raw_ostream &OS);
33 };
34
35 } // End llvm namespace
36
37 #endif
1313
1414 #define DEBUG_TYPE "decoder-emitter"
1515
16 #include "FixedLenDecoderEmitter.h"
1716 #include "CodeGenTarget.h"
1817 #include "llvm/TableGen/Record.h"
1918 #include "llvm/ADT/APInt.h"
2019 #include "llvm/ADT/StringExtras.h"
20 #include "llvm/Support/DataTypes.h"
2121 #include "llvm/Support/Debug.h"
2222 #include "llvm/Support/raw_ostream.h"
23 #include "llvm/TableGen/TableGenBackend.h"
2324
2425 #include
2526 #include
2627 #include
2728
2829 using namespace llvm;
30
31 namespace {
32 struct EncodingField {
33 unsigned Base, Width, Offset;
34 EncodingField(unsigned B, unsigned W, unsigned O)
35 : Base(B), Width(W), Offset(O) { }
36 };
37 } // End anonymous namespace
38
39 namespace {
40 struct OperandInfo {
41 std::vector Fields;
42 std::string Decoder;
43
44 OperandInfo(std::string D)
45 : Decoder(D) { }
46
47 void addField(unsigned Base, unsigned Width, unsigned Offset) {
48 Fields.push_back(EncodingField(Base, Width, Offset));
49 }
50
51 unsigned numFields() const { return Fields.size(); }
52
53 typedef std::vector::const_iterator const_iterator;
54
55 const_iterator begin() const { return Fields.begin(); }
56 const_iterator end() const { return Fields.end(); }
57 };
58 } // End anonymous namespace
59
60 namespace {
61 class FixedLenDecoderEmitter {
62 public:
63
64 // Defaults preserved here for documentation, even though they aren't
65 // strictly necessary given the way that this is currently being called.
66 FixedLenDecoderEmitter(RecordKeeper &R,
67 std::string PredicateNamespace,
68 std::string GPrefix = "if (",
69 std::string GPostfix = " == MCDisassembler::Fail)"
70 " return MCDisassembler::Fail;",
71 std::string ROK = "MCDisassembler::Success",
72 std::string RFail = "MCDisassembler::Fail",
73 std::string L = "") :
74 Target(R),
75 PredicateNamespace(PredicateNamespace),
76 GuardPrefix(GPrefix), GuardPostfix(GPostfix),
77 ReturnOK(ROK), ReturnFail(RFail), Locals(L) {}
78
79 // run - Output the code emitter
80 void run(raw_ostream &o);
81
82 private:
83 CodeGenTarget Target;
84 public:
85 std::string PredicateNamespace;
86 std::string GuardPrefix, GuardPostfix;
87 std::string ReturnOK, ReturnFail;
88 std::string Locals;
89 };
90 } // End anonymous namespace
2991
3092 // The set (BIT_TRUE, BIT_FALSE, BIT_UNSET) represents a ternary logic system
3193 // for a bit value.
82144 }
83145
84146 // Forward declaration.
147 namespace {
85148 class FilterChooser;
149 } // End anonymous namespace
86150
87151 // Representation of the instruction to work on.
88152 typedef std::vector insn_t;
123187 /// decoder could try to decode the even/odd register numbering and assign to
124188 /// VST4q8a or VST4q8b, but for the time being, the decoder chooses the "a"
125189 /// version and return the Opcode since the two have the same Asm format string.
190 namespace {
126191 class Filter {
127192 protected:
128193 const FilterChooser *Owner;// points to the FilterChooser who owns this filter
179244 // the filter distinguishes more categories of instructions.
180245 unsigned usefulness() const;
181246 }; // End of class Filter
247 } // End anonymous namespace
182248
183249 // These are states of our finite state machines used in FilterChooser's
184250 // filterProcessor() which produces the filter candidates to use.
205271 /// It is useful to think of a Filter as governing the switch stmts of the
206272 /// decoding tree. And each case is delegated to an inferior FilterChooser to
207273 /// decide what further remaining bits to look at.
274 namespace {
208275 class FilterChooser {
209276 protected:
210277 friend class Filter;
384451 // the instruction at this level or the instruction is not decodeable.
385452 bool emit(raw_ostream &o, unsigned &Indentation) const;
386453 };
454 } // End anonymous namespace
387455
388456 ///////////////////////////
389457 // //
15721640
15731641 o << "\n} // End llvm namespace \n";
15741642 }
1643
1644 namespace llvm {
1645
1646 void EmitFixedLenDecoder(RecordKeeper &RK, raw_ostream &OS,
1647 std::string PredicateNamespace,
1648 std::string GPrefix,
1649 std::string GPostfix,
1650 std::string ROK,
1651 std::string RFail,
1652 std::string L) {
1653 FixedLenDecoderEmitter(RK, PredicateNamespace, GPrefix, GPostfix,
1654 ROK, RFail, L).run(OS);
1655 }
1656
1657 } // End llvm namespace
+0
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utils/TableGen/FixedLenDecoderEmitter.h less more
None //===------------ FixedLenDecoderEmitter.h - Decoder Generator --*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // It contains the tablegen backend that emits the decoder functions for
10 // targets with fixed length instruction set.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef FixedLenDECODEREMITTER_H
15 #define FixedLenDECODEREMITTER_H
16
17 #include "CodeGenTarget.h"
18
19 #include "llvm/TableGen/TableGenBackend.h"
20 #include "llvm/Support/DataTypes.h"
21
22 namespace llvm {
23
24 struct EncodingField {
25 unsigned Base, Width, Offset;
26 EncodingField(unsigned B, unsigned W, unsigned O)
27 : Base(B), Width(W), Offset(O) { }
28 };
29
30 struct OperandInfo {
31 std::vector Fields;
32 std::string Decoder;
33
34 OperandInfo(std::string D)
35 : Decoder(D) { }
36
37 void addField(unsigned Base, unsigned Width, unsigned Offset) {
38 Fields.push_back(EncodingField(Base, Width, Offset));
39 }
40
41 unsigned numFields() const { return Fields.size(); }
42
43 typedef std::vector::const_iterator const_iterator;
44
45 const_iterator begin() const { return Fields.begin(); }
46 const_iterator end() const { return Fields.end(); }
47 };
48
49 class FixedLenDecoderEmitter : public TableGenBackend {
50 public:
51 FixedLenDecoderEmitter(RecordKeeper &R,
52 std::string PredicateNamespace,
53 std::string GPrefix = "if (",
54 std::string GPostfix = " == MCDisassembler::Fail)"
55 " return MCDisassembler::Fail;",
56 std::string ROK = "MCDisassembler::Success",
57 std::string RFail = "MCDisassembler::Fail",
58 std::string L = "") :
59 Target(R),
60 PredicateNamespace(PredicateNamespace),
61 GuardPrefix(GPrefix), GuardPostfix(GPostfix),
62 ReturnOK(ROK), ReturnFail(RFail), Locals(L) {}
63
64 // run - Output the code emitter
65 void run(raw_ostream &o);
66
67 private:
68 CodeGenTarget Target;
69 public:
70 std::string PredicateNamespace;
71 std::string GuardPrefix, GuardPostfix;
72 std::string ReturnOK, ReturnFail;
73 std::string Locals;
74 };
75
76 } // end llvm namespace
77
78 #endif
1111 //
1212 //===----------------------------------------------------------------------===//
1313
14 #include "InstrInfoEmitter.h"
14
15 #include "CodeGenDAGPatterns.h"
1516 #include "CodeGenTarget.h"
1617 #include "SequenceToOffsetTable.h"
18 #include "llvm/ADT/StringExtras.h"
1719 #include "llvm/TableGen/Record.h"
18 #include "llvm/ADT/StringExtras.h"
20 #include "llvm/TableGen/TableGenBackend.h"
1921 #include
2022 #include
23 #include
24 #include
2125 using namespace llvm;
26
27 namespace {
28 class InstrInfoEmitter {
29 RecordKeeper &Records;
30 CodeGenDAGPatterns CDP;
31 std::map ItinClassMap;
32
33 public:
34 InstrInfoEmitter(RecordKeeper &R) : Records(R), CDP(R) { }
35
36 // run - Output the instruction set description.
37 void run(raw_ostream &OS);
38
39 private:
40 void emitEnums(raw_ostream &OS);
41
42 typedef std::map, unsigned> OperandInfoMapTy;
43 void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
44 Record *InstrInfo,
45 std::map, unsigned> &EL,
46 const OperandInfoMapTy &OpInfo,
47 raw_ostream &OS);
48
49 // Itinerary information.
50 void GatherItinClasses();
51 unsigned getItinClassNumber(const Record *InstRec);
52
53 // Operand information.
54 void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs);
55 std::vector GetOperandInfo(const CodeGenInstruction &Inst);
56 };
57 } // End anonymous namespace
2258
2359 static void PrintDefList(const std::vector &Uses,
2460 unsigned Num, raw_ostream &OS) {
162198
163199 // run - Emit the main instruction description records for the target...
164200 void InstrInfoEmitter::run(raw_ostream &OS) {
201 emitSourceFileHeader("Target Instruction Enum Values", OS);
165202 emitEnums(OS);
166203
167204 GatherItinClasses();
168205
169 EmitSourceFileHeader("Target Instruction Descriptors", OS);
206 emitSourceFileHeader("Target Instruction Descriptors", OS);
170207
171208 OS << "\n#ifdef GET_INSTRINFO_MC_DESC\n";
172209 OS << "#undef GET_INSTRINFO_MC_DESC\n";
361398
362399 // emitEnums - Print out enum values for all of the instructions.
363400 void InstrInfoEmitter::emitEnums(raw_ostream &OS) {
364 EmitSourceFileHeader("Target Instruction Enum Values", OS);
365401
366402 OS << "\n#ifdef GET_INSTRINFO_ENUM\n";
367403 OS << "#undef GET_INSTRINFO_ENUM\n";
393429
394430 OS << "#endif // GET_INSTRINFO_ENUM\n\n";
395431 }
432
433 namespace llvm {
434
435 void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS) {
436 InstrInfoEmitter(RK).run(OS);
437 }
438
439 } // End llvm namespace
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utils/TableGen/InstrInfoEmitter.h less more
None //===- InstrInfoEmitter.h - Generate a Instruction Set Desc. ----*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend is responsible for emitting a description of the target
10 // instruction set for the code generator.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef INSTRINFO_EMITTER_H
15 #define INSTRINFO_EMITTER_H
16
17 #include "CodeGenDAGPatterns.h"
18 #include "llvm/TableGen/TableGenBackend.h"
19 #include
20 #include
21
22 namespace llvm {
23
24 class StringInit;
25 class IntInit;
26 class ListInit;
27 class CodeGenInstruction;
28
29 class InstrInfoEmitter : public TableGenBackend {
30 RecordKeeper &Records;
31 CodeGenDAGPatterns CDP;
32 std::map ItinClassMap;
33
34 public:
35 InstrInfoEmitter(RecordKeeper &R) : Records(R), CDP(R) { }
36
37 // run - Output the instruction set description.
38 void run(raw_ostream &OS);
39
40 private:
41 void emitEnums(raw_ostream &OS);
42
43 typedef std::map, unsigned> OperandInfoMapTy;
44 void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
45 Record *InstrInfo,
46 std::map, unsigned> &EL,
47 const OperandInfoMapTy &OpInfo,
48 raw_ostream &OS);
49
50 // Itinerary information.
51 void GatherItinClasses();
52 unsigned getItinClassNumber(const Record *InstRec);
53
54 // Operand information.
55 void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs);
56 std::vector GetOperandInfo(const CodeGenInstruction &Inst);
57 };
58
59 } // End llvm namespace
60
61 #endif
1010 //
1111 //===----------------------------------------------------------------------===//
1212
13 #include "CodeGenIntrinsics.h"
1314 #include "CodeGenTarget.h"
14 #include "IntrinsicEmitter.h"
1515 #include "SequenceToOffsetTable.h"
16 #include "llvm/ADT/StringExtras.h"
1617 #include "llvm/TableGen/Record.h"
1718 #include "llvm/TableGen/StringMatcher.h"
18 #include "llvm/ADT/StringExtras.h"
19 #include "llvm/TableGen/TableGenBackend.h"
1920 #include
2021 using namespace llvm;
22
23 namespace {
24 class IntrinsicEmitter {
25 RecordKeeper &Records;
26 bool TargetOnly;
27 std::string TargetPrefix;
28
29 public:
30 IntrinsicEmitter(RecordKeeper &R, bool T)
31 : Records(R), TargetOnly(T) {}
32
33 void run(raw_ostream &OS);
34
35 void EmitPrefix(raw_ostream &OS);
36
37 void EmitEnumInfo(const std::vector &Ints,
38 raw_ostream &OS);
39
40 void EmitFnNameRecognizer(const std::vector &Ints,
41 raw_ostream &OS);
42 void EmitIntrinsicToNameTable(const std::vector &Ints,
43 raw_ostream &OS);
44 void EmitIntrinsicToOverloadTable(const std::vector &Ints,
45 raw_ostream &OS);
46 void EmitVerifier(const std::vector &Ints,
47 raw_ostream &OS);
48 void EmitGenerator(const std::vector &Ints,
49 raw_ostream &OS);
50 void EmitAttributes(const std::vector &Ints,
51 raw_ostream &OS);
52 void EmitModRefBehavior(const std::vector &Ints,
53 raw_ostream &OS);
54 void EmitIntrinsicToGCCBuiltinMap(const std::vector &Ints,
55 raw_ostream &OS);
56 void EmitSuffix(raw_ostream &OS);
57 };
58 } // End anonymous namespace
2159
2260 //===----------------------------------------------------------------------===//
2361 // IntrinsicEmitter Implementation
2462 //===----------------------------------------------------------------------===//
2563
2664 void IntrinsicEmitter::run(raw_ostream &OS) {
27 EmitSourceFileHeader("Intrinsic Function Source Fragment", OS);
28
65 emitSourceFileHeader("Intrinsic Function Source Fragment", OS);
66
2967 std::vector Ints = LoadIntrinsics(Records, TargetOnly);
30
68
3169 if (TargetOnly && !Ints.empty())
3270 TargetPrefix = Ints[0].TargetPrefix;
3371
337375 EncodeFixedType(Int.IS.ParamTypeDefs[i], ArgCodes, TypeSig);
338376 }
339377
340 void printIITEntry(raw_ostream &OS, unsigned char X) {
378 static void printIITEntry(raw_ostream &OS, unsigned char X) {
341379 OS << (unsigned)X;
342380 }
343381
423461 OS << "#endif\n\n"; // End of GET_INTRINSIC_GENERATOR_GLOBAL
424462 }
425463
464 enum ModRefKind {
465 MRK_none,
466 MRK_readonly,
467 MRK_readnone
468 };
469
470 static ModRefKind getModRefKind(const CodeGenIntrinsic &intrinsic) {
471 switch (intrinsic.ModRef) {
472 case CodeGenIntrinsic::NoMem:
473 return MRK_readnone;
474 case CodeGenIntrinsic::ReadArgMem:
475 case CodeGenIntrinsic::ReadMem:
476 return MRK_readonly;
477 case CodeGenIntrinsic::ReadWriteArgMem:
478 case CodeGenIntrinsic::ReadWriteMem:
479 return MRK_none;
480 }
481 llvm_unreachable("bad mod-ref kind");
482 }
483
426484 namespace {
427 enum ModRefKind {
428 MRK_none,
429 MRK_readonly,
430 MRK_readnone
431 };
432
433 ModRefKind getModRefKind(const CodeGenIntrinsic &intrinsic) {
434 switch (intrinsic.ModRef) {
435 case CodeGenIntrinsic::NoMem:
436 return MRK_readnone;
437 case CodeGenIntrinsic::ReadArgMem:
438 case CodeGenIntrinsic::ReadMem:
439 return MRK_readonly;
440 case CodeGenIntrinsic::ReadWriteArgMem:
441 case CodeGenIntrinsic::ReadWriteMem:
442 return MRK_none;
443 }
444 llvm_unreachable("bad mod-ref kind");
445 }
446
447 struct AttributeComparator {
448 bool operator()(const CodeGenIntrinsic *L, const CodeGenIntrinsic *R) const {
449 // Sort throwing intrinsics after non-throwing intrinsics.
450 if (L->canThrow != R->canThrow)
451 return R->canThrow;
452
453 if (L->isNoReturn != R->isNoReturn)
454 return R->isNoReturn;
455
456 // Try to order by readonly/readnone attribute.
457 ModRefKind LK = getModRefKind(*L);
458 ModRefKind RK = getModRefKind(*R);
459 if (LK != RK) return (LK > RK);
460
461 // Order by argument attributes.
462 // This is reliable because each side is already sorted internally.
463 return (L->ArgumentAttributes < R->ArgumentAttributes);
464 }
465 };
466 }
485 struct AttributeComparator {
486 bool operator()(const CodeGenIntrinsic *L, const CodeGenIntrinsic *R) const {
487 // Sort throwing intrinsics after non-throwing intrinsics.
488 if (L->canThrow != R->canThrow)
489 return R->canThrow;
490
491 if (L->isNoReturn != R->isNoReturn)
492 return R->isNoReturn;
493
494 // Try to order by readonly/readnone attribute.
495 ModRefKind LK = getModRefKind(*L);
496 ModRefKind RK = getModRefKind(*R);
497 if (LK != RK) return (LK > RK);
498
499 // Order by argument attributes.
500 // This is reliable because each side is already sorted internally.
501 return (L->ArgumentAttributes < R->ArgumentAttributes);
502 }
503 };
504 } // End anonymous namespace
467505
468506 /// EmitAttributes - This emits the Intrinsic::getAttributes method.
469507 void IntrinsicEmitter::
704742 OS << "}\n";
705743 OS << "#endif\n\n";
706744 }
745
746 namespace llvm {
747
748 void EmitIntrinsics(RecordKeeper &RK, raw_ostream &OS, bool TargetOnly = false) {
749 IntrinsicEmitter(RK, TargetOnly).run(OS);
750 }
751
752 } // End llvm namespace
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utils/TableGen/IntrinsicEmitter.h less more
None //===- IntrinsicEmitter.h - Generate intrinsic information ------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend emits information about intrinsic functions.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #ifndef INTRINSIC_EMITTER_H
14 #define INTRINSIC_EMITTER_H
15
16 #include "CodeGenIntrinsics.h"
17 #include "llvm/TableGen/TableGenBackend.h"
18
19 namespace llvm {
20 class IntrinsicEmitter : public TableGenBackend {
21 RecordKeeper &Records;
22 bool TargetOnly;
23 std::string TargetPrefix;
24
25 public:
26 IntrinsicEmitter(RecordKeeper &R, bool T = false)
27 : Records(R), TargetOnly(T) {}
28
29 void run(raw_ostream &OS);
30
31 void EmitPrefix(raw_ostream &OS);
32
33 void EmitEnumInfo(const std::vector &Ints,
34 raw_ostream &OS);
35
36 void EmitFnNameRecognizer(const std::vector &Ints,
37 raw_ostream &OS);
38 void EmitIntrinsicToNameTable(const std::vector &Ints,
39 raw_ostream &OS);
40 void EmitIntrinsicToOverloadTable(const std::vector &Ints,
41 raw_ostream &OS);
42 void EmitVerifier(const std::vector &Ints,
43 raw_ostream &OS);
44 void EmitGenerator(const std::vector &Ints,
45 raw_ostream &OS);
46 void EmitAttributes(const std::vector &Ints,
47 raw_ostream &OS);
48 void EmitModRefBehavior(const std::vector &Ints,
49 raw_ostream &OS);
50 void EmitIntrinsicToGCCBuiltinMap(const std::vector &Ints,
51 raw_ostream &OS);
52 void EmitSuffix(raw_ostream &OS);
53 };
54
55 } // End llvm namespace
56
57 #endif
58
59
60
88
99 #define DEBUG_TYPE "pseudo-lowering"
1010 #include "CodeGenInstruction.h"
11 #include "PseudoLoweringEmitter.h"
11 #include "CodeGenTarget.h"
12 #include "llvm/ADT/IndexedMap.h"
13 #include "llvm/ADT/SmallVector.h"
14 #include "llvm/ADT/StringMap.h"
15 #include "llvm/Support/Debug.h"
16 #include "llvm/Support/ErrorHandling.h"
1217 #include "llvm/TableGen/Error.h"
1318 #include "llvm/TableGen/Record.h"
14 #include "llvm/ADT/IndexedMap.h"
15 #include "llvm/ADT/StringMap.h"
16 #include "llvm/Support/ErrorHandling.h"
17 #include "llvm/Support/Debug.h"
19 #include "llvm/TableGen/TableGenBackend.h"
1820 #include
1921 using namespace llvm;
22
23 namespace {
24 class PseudoLoweringEmitter {
25 struct OpData {
26 enum MapKind { Operand, Imm, Reg };
27 MapKind Kind;
28 union {
29 unsigned Operand; // Operand number mapped to.
30 uint64_t Imm; // Integer immedate value.
31 Record *Reg; // Physical register.
32 } Data;
33 };
34 struct PseudoExpansion {
35 CodeGenInstruction Source; // The source pseudo instruction definition.
36 CodeGenInstruction Dest; // The destination instruction to lower to.
37 IndexedMap OperandMap;
38
39 PseudoExpansion(CodeGenInstruction &s, CodeGenInstruction &d,
40 IndexedMap &m) :
41 Source(s), Dest(d), OperandMap(m) {}
42 };
43
44 RecordKeeper &Records;
45
46 // It's overkill to have an instance of the full CodeGenTarget object,
47 // but it loads everything on demand, not in the constructor, so it's
48 // lightweight in performance, so it works out OK.
49 CodeGenTarget Target;
50
51 SmallVector Expansions;
52
53 unsigned addDagOperandMapping(Record *Rec, DagInit *Dag,
54 CodeGenInstruction &Insn,
55 IndexedMap &OperandMap,
56 unsigned BaseIdx);
57 void evaluateExpansion(Record *Pseudo);
58 void emitLoweringEmitter(raw_ostream &o);
59 public:
60 PseudoLoweringEmitter(RecordKeeper &R) : Records(R), Target(R) {}
61
62 /// run - Output the pseudo-lowerings.
63 void run(raw_ostream &o);
64 };
65 } // End anonymous namespace
2066
2167 // FIXME: This pass currently can only expand a pseudo to a single instruction.
2268 // The pseudo expansion really should take a list of dags, not just
149195
150196 void PseudoLoweringEmitter::emitLoweringEmitter(raw_ostream &o) {
151197 // Emit file header.
152 EmitSourceFileHeader("Pseudo-instruction MC lowering Source Fragment", o);
198 emitSourceFileHeader("Pseudo-instruction MC lowering Source Fragment", o);
153199
154200 o << "bool " << Target.getName() + "AsmPrinter" << "::\n"
155201 << "emitPseudoExpansionLowering(MCStreamer &OutStreamer,\n"
241287 emitLoweringEmitter(o);
242288 }
243289
290 namespace llvm {
291
292 void EmitPseudoLowering(RecordKeeper &RK, raw_ostream &OS) {
293 PseudoLoweringEmitter(RK).run(OS);
294 }
295
296 } // End llvm namespace
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utils/TableGen/PseudoLoweringEmitter.h less more
None //===- PseudoLoweringEmitter.h - PseudoLowering Generator -------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #ifndef PSEUDOLOWERINGEMITTER_H
10 #define PSEUDOLOWERINGEMITTER_H
11
12 #include "CodeGenInstruction.h"
13 #include "CodeGenTarget.h"
14 #include "llvm/TableGen/TableGenBackend.h"
15 #include "llvm/ADT/IndexedMap.h"
16 #include "llvm/ADT/SmallVector.h"
17
18 namespace llvm {
19
20 class PseudoLoweringEmitter : public TableGenBackend {
21 struct OpData {
22 enum MapKind { Operand, Imm, Reg };
23 MapKind Kind;
24 union {
25 unsigned Operand; // Operand number mapped to.
26 uint64_t Imm; // Integer immedate value.
27 Record *Reg; // Physical register.
28 } Data;
29 };
30 struct PseudoExpansion {
31 CodeGenInstruction Source; // The source pseudo instruction definition.
32 CodeGenInstruction Dest; // The destination instruction to lower to.
33 IndexedMap OperandMap;
34
35 PseudoExpansion(CodeGenInstruction &s, CodeGenInstruction &d,
36 IndexedMap &m) :
37 Source(s), Dest(d), OperandMap(m) {}
38 };
39
40 RecordKeeper &Records;
41
42 // It's overkill to have an instance of the full CodeGenTarget object,
43 // but it loads everything on demand, not in the constructor, so it's
44 // lightweight in performance, so it works out OK.
45 CodeGenTarget Target;
46
47 SmallVector Expansions;
48
49 unsigned addDagOperandMapping(Record *Rec, DagInit *Dag,
50 CodeGenInstruction &Insn,
51 IndexedMap &OperandMap,
52 unsigned BaseIdx);
53 void evaluateExpansion(Record *Pseudo);
54 void emitLoweringEmitter(raw_ostream &o);
55 public:
56 PseudoLoweringEmitter(RecordKeeper &R) : Records(R), Target(R) {}
57
58 /// run - Output the pseudo-lowerings.
59 void run(raw_ostream &o);
60 };
61
62 } // end llvm namespace
63
64 #endif
1212 //
1313 //===----------------------------------------------------------------------===//
1414
15 #include "RegisterInfoEmitter.h"
15 #include "CodeGenRegisters.h"
1616 #include "CodeGenTarget.h"
17 #include "CodeGenRegisters.h"
1817 #include "SequenceToOffsetTable.h"
18 #include "llvm/ADT/BitVector.h"
19 #include "llvm/ADT/STLExtras.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/ADT/Twine.h"
22 #include "llvm/Support/Format.h"
1923 #include "llvm/TableGen/Error.h"
2024 #include "llvm/TableGen/Record.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/StringExtras.h"
23 #include "llvm/ADT/STLExtras.h"
24 #include "llvm/ADT/Twine.h"
25 #include "llvm/Support/Format.h"
25 #include "llvm/TableGen/TableGenBackend.h"
2626 #include
2727 #include
28 #include
2829 using namespace llvm;
30
31 namespace {
32 class RegisterInfoEmitter {
33 RecordKeeper &Records;
34 public:
35 RegisterInfoEmitter(RecordKeeper &R) : Records(R) {}
36
37 // runEnums - Print out enum values for all of the registers.
38 void runEnums(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
39
40 // runMCDesc - Print out MC register descriptions.
41 void runMCDesc(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
42
43 // runTargetHeader - Emit a header fragment for the register info emitter.
44 void runTargetHeader(raw_ostream &o, CodeGenTarget &Target,
45 CodeGenRegBank &Bank);
46
47 // runTargetDesc - Output the target register and register file descriptions.
48 void runTargetDesc(raw_ostream &o, CodeGenTarget &Target,
49 CodeGenRegBank &Bank);
50
51 // run - Output the register file description.
52 void run(raw_ostream &o);
53
54 private:
55 void EmitRegMapping(raw_ostream &o,
56 const std::vector &Regs, bool isCtor);
57 void EmitRegMappingTables(raw_ostream &o,
58 const std::vector &Regs,
59 bool isCtor);
60 void EmitRegClasses(raw_ostream &OS, CodeGenTarget &Target);
61
62 void EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
63 const std::string &ClassName);
64 };
65 } // End anonymous namespace
2966
3067 // runEnums - Print out enum values for all of the registers.
3168 void RegisterInfoEmitter::runEnums(raw_ostream &OS,
3774
3875 std::string Namespace = Registers[0]->TheDef->getValueAsString("Namespace");
3976
40 EmitSourceFileHeader("Target Register Enum Values", OS);
77 emitSourceFileHeader("Target Register Enum Values", OS);
4178
4279 OS << "\n#ifdef GET_REGINFO_ENUM\n";
4380 OS << "#undef GET_REGINFO_ENUM\n";
489526 void
490527 RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
491528 CodeGenRegBank &RegBank) {
492 EmitSourceFileHeader("MC Register Information", OS);
529 emitSourceFileHeader("MC Register Information", OS);
493530
494531 OS << "\n#ifdef GET_REGINFO_MC_DESC\n";
495532 OS << "#undef GET_REGINFO_MC_DESC\n";
773810 void
774811 RegisterInfoEmitter::runTargetHeader(raw_ostream &OS, CodeGenTarget &Target,
775812 CodeGenRegBank &RegBank) {
776 EmitSourceFileHeader("Register Information Header Fragment", OS);
813 emitSourceFileHeader("Register Information Header Fragment", OS);
777814
778815 OS << "\n#ifdef GET_REGINFO_HEADER\n";
779816 OS << "#undef GET_REGINFO_HEADER\n";
829866 void
830867 RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
831868 CodeGenRegBank &RegBank){
832 EmitSourceFileHeader("Target Register and Register Classes Information", OS);
869 emitSourceFileHeader("Target Register and Register Classes Information", OS);
833870
834871 OS << "\n#ifdef GET_REGINFO_TARGET_DESC\n";
835872 OS << "#undef GET_REGINFO_TARGET_DESC\n";
11851222 runTargetHeader(OS, Target, RegBank);
11861223 runTargetDesc(OS, Target, RegBank);
11871224 }
1225
1226 namespace llvm {
1227
1228 void EmitRegisterInfo(RecordKeeper &RK, raw_ostream &OS) {
1229 RegisterInfoEmitter(RK).run(OS);
1230 }
1231
1232 } // End llvm namespace
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utils/TableGen/RegisterInfoEmitter.h less more
None //===- RegisterInfoEmitter.h - Generate a Register File Desc. ---*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend is responsible for emitting a description of a target
10 // register file for a code generator. It uses instances of the Register,
11 // RegisterAliases, and RegisterClass classes to gather this information.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #ifndef REGISTER_INFO_EMITTER_H
16 #define REGISTER_INFO_EMITTER_H
17
18 #include "llvm/TableGen/TableGenBackend.h"
19 #include
20
21 namespace llvm {
22
23 class CodeGenRegBank;
24 struct CodeGenRegister;
25 class CodeGenTarget;
26
27 class RegisterInfoEmitter : public TableGenBackend {
28 RecordKeeper &Records;
29 public:
30 RegisterInfoEmitter(RecordKeeper &R) : Records(R) {}
31
32 // runEnums - Print out enum values for all of the registers.
33 void runEnums(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
34
35 // runMCDesc - Print out MC register descriptions.
36 void runMCDesc(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
37
38 // runTargetHeader - Emit a header fragment for the register info emitter.
39 void runTargetHeader(raw_ostream &o, CodeGenTarget &Target,
40 CodeGenRegBank &Bank);
41
42 // runTargetDesc - Output the target register and register file descriptions.
43 void runTargetDesc(raw_ostream &o, CodeGenTarget &Target,
44 CodeGenRegBank &Bank);
45
46 // run - Output the register file description.
47 void run(raw_ostream &o);
48
49 private:
50 void EmitRegMapping(raw_ostream &o,
51 const std::vector &Regs, bool isCtor);
52 void EmitRegMappingTables(raw_ostream &o,
53 const std::vector &Regs,
54 bool isCtor);
55 void EmitRegClasses(raw_ostream &OS, CodeGenTarget &Target);
56
57 void EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
58 const std::string &ClassName);
59 };
60
61 } // End llvm namespace
62
63 #endif
1010 //
1111 //===----------------------------------------------------------------------===//
1212
13 #include "SubtargetEmitter.h"
1413 #include "CodeGenTarget.h"
14 #include "llvm/ADT/StringExtras.h"
15 #include "llvm/MC/MCInstrItineraries.h"
16 #include "llvm/Support/Debug.h"
1517 #include "llvm/TableGen/Record.h"
16 #include "llvm/ADT/StringExtras.h"
17 #include "llvm/Support/Debug.h"
18 #include "llvm/TableGen/TableGenBackend.h"
1819 #include
20 #include
21 #include
22 #include
1923 using namespace llvm;
24
25 namespace {
26 class SubtargetEmitter {
27
28 RecordKeeper &Records;
29 std::string Target;
30 bool HasItineraries;
31
32 void Enumeration(raw_ostream &OS, const char *ClassName, bool isBits);
33 unsigned FeatureKeyValues(raw_ostream &OS);
34 unsigned CPUKeyValues(raw_ostream &OS);
35 unsigned CollectAllItinClasses(raw_ostream &OS,
36 std::map &ItinClassesMap,
37 std::vector &ItinClassList);
38 void FormItineraryStageString(const std::string &Names,
39 Record *ItinData, std::string &ItinString,
40 unsigned &NStages);
41 void FormItineraryOperandCycleString(Record *ItinData, std::string &ItinString,
42 unsigned &NOperandCycles);
43 void FormItineraryBypassString(const std::string &Names,
44 Record *ItinData,
45 std::string &ItinString, unsigned NOperandCycles);
46 void EmitStageAndOperandCycleData(raw_ostream &OS, unsigned NItinClasses,
47 std::map &ItinClassesMap,
48 std::vector &ItinClassList,
49 std::vector > &ProcList);
50 void EmitItineraryProp(raw_ostream &OS, const Record *R, const char *Name,
51 char Separator);
52 void EmitProcessorData(raw_ostream &OS,
53 std::vector &ItinClassList,
54 std::vector > &ProcList);
55 void EmitProcessorLookup(raw_ostream &OS);
56 void EmitData(raw_ostream &OS);
57 void ParseFeaturesFunction(raw_ostream &OS, unsigned NumFeatures,
58 unsigned NumProcs);
59
60 public:
61 SubtargetEmitter(RecordKeeper &R) : Records(R), HasItineraries(false) {}
62
63 void run(raw_ostream &o);
64
65 };
66 } // End anonymous namespace
2067
2168 //
2269 // Enumeration - Emit the specified class as an enumeration.
684731 void SubtargetEmitter::run(raw_ostream &OS) {
685732 Target = CodeGenTarget(Records).getName();
686733
687 EmitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
734 emitSourceFileHeader("Subtarget Enumeration Source Fragment", OS);
688735
689736 OS << "\n#ifdef GET_SUBTARGETINFO_ENUM\n";
690737 OS << "#undef GET_SUBTARGETINFO_ENUM\n";
801848
802849 OS << "#endif // GET_SUBTARGETINFO_CTOR\n\n";
803850 }
851
852 namespace llvm {
853
854 void EmitSubtarget(RecordKeeper &RK, raw_ostream &OS) {
855 SubtargetEmitter(RK).run(OS);
856 }
857
858 } // End llvm namespace
+0
-74
utils/TableGen/SubtargetEmitter.h less more
None //===- SubtargetEmitter.h - Generate subtarget enumerations -----*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This tablegen backend emits subtarget enumerations.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #ifndef SUBTARGET_EMITTER_H
14 #define SUBTARGET_EMITTER_H
15
16 #include "llvm/TableGen/TableGenBackend.h"
17 #include "llvm/MC/MCInstrItineraries.h"
18 #include
19 #include
20 #include
21
22
23 namespace llvm {
24
25 class SubtargetEmitter : public TableGenBackend {
26
27 RecordKeeper &Records;
28 std::string Target;
29 bool HasItineraries;
30
31 void Enumeration(raw_ostream &OS, const char *ClassName, bool isBits);
32 unsigned FeatureKeyValues(raw_ostream &OS);
33 unsigned CPUKeyValues(raw_ostream &OS);
34 unsigned CollectAllItinClasses(raw_ostream &OS,
35 std::map &ItinClassesMap,
36 std::vector &ItinClassList);
37 void FormItineraryStageString(const std::string &Names,
38 Record *ItinData, std::string &ItinString,
39 unsigned &NStages);
40 void FormItineraryOperandCycleString(Record *ItinData, std::string &ItinString,
41 unsigned &NOperandCycles);
42 void FormItineraryBypassString(const std::string &Names,
43 Record *ItinData,
44 std::string &ItinString, unsigned NOperandCycles);
45 void EmitStageAndOperandCycleData(raw_ostream &OS, unsigned NItinClasses,
46 std::map &ItinClassesMap,
47 std::vector &ItinClassList,
48 std::vector > &ProcList);
49 void EmitItineraryProp(raw_ostream &OS, const Record *R, const char *Name,
50 char Separator);
51 void EmitProcessorData(raw_ostream &OS,
52 std::vector &ItinClassList,
53 std::vector > &ProcList);
54 void EmitProcessorLookup(raw_ostream &OS);
55 void EmitData(raw_ostream &OS);
56 void ParseFeaturesFunction(raw_ostream &OS, unsigned NumFeatures,
57 unsigned NumProcs);
58
59 public:
60 SubtargetEmitter(RecordKeeper &R) : Records(R), HasItineraries(false) {}
61
62 // run - Output the subtarget enumerations, returning true on failure.
63 void run(raw_ostream &o);
64
65 };
66
67
68 } // End llvm namespace
69
70 #endif
71
72
73
1010 //
1111 //===----------------------------------------------------------------------===//
1212
13 #include "AsmMatcherEmitter.h"
14 #include "AsmWriterEmitter.h"
15 #include "CallingConvEmitter.h"
16 #include "CodeEmitterGen.h"
17 #include "DAGISelEmitter.h"
18 #include "DFAPacketizerEmitter.h"
19 #include "DisassemblerEmitter.h"
20 #include "EDEmitter.h"
21 #include "FastISelEmitter.h"
22 #include "InstrInfoEmitter.h"
23 #include "IntrinsicEmitter.h"
24 #include "PseudoLoweringEmitter.h"
25 #include "RegisterInfoEmitter.h"
26 #include "SubtargetEmitter.h"
13 #include "TableGenBackends.h" // Declares all backends.
14
2715 #include "SetTheory.h"
28
2916 #include "llvm/Support/CommandLine.h"
3017 #include "llvm/Support/PrettyStackTrace.h"
3118 #include "llvm/Support/Signals.h"
10188 cl::opt
10289 Class("class", cl::desc("Print Enum list for this class"),
10390 cl::value_desc("class name"));
104
91
10592 class LLVMTableGenAction : public TableGenAction {
10693 public:
10794 bool operator()(raw_ostream &OS, RecordKeeper &Records) {
11097 OS << Records; // No argument, dump all contents
11198 break;
11299 case GenEmitter:
113 CodeEmitterGen(Records).run(OS);
100 EmitCodeEmitter(Records, OS);
114101 break;
115102 case GenRegisterInfo:
116 RegisterInfoEmitter(Records).run(OS);
103 EmitRegisterInfo(Records, OS);
117104 break;
118105 case GenInstrInfo:
119 InstrInfoEmitter(Records).run(OS);
106 EmitInstrInfo(Records, OS);
120107 break;
121108 case GenCallingConv:
122 CallingConvEmitter(Records).run(OS);
109 EmitCallingConv(Records, OS);
123110 break;
124111 case GenAsmWriter:
125 AsmWriterEmitter(Records).run(OS);
112 EmitAsmWriter(Records, OS);
126113 break;
127114 case GenAsmMatcher:
128 AsmMatcherEmitter(Records).run(OS);
115 EmitAsmMatcher(Records, OS);
129116 break;
130117 case GenDisassembler:
131 DisassemblerEmitter(Records).run(OS);
118 EmitDisassembler(Records, OS);
132119 break;
133120 case GenPseudoLowering:
134 PseudoLoweringEmitter(Records).run(OS);
121 EmitPseudoLowering(Records, OS);
135122 break;
136123 case GenDAGISel:
137 DAGISelEmitter(Records).run(OS);
124 EmitDAGISel(Records, OS);
138125 break;
139126 case GenDFAPacketizer:
140 DFAGen(Records).run(OS);
127 EmitDFAPacketizer(Records, OS);
141128 break;
142129 case GenFastISel:
143 FastISelEmitter(Records).run(OS);
130 EmitFastISel(Records, OS);
144131 break;
145132 case GenSubtarget:
146 SubtargetEmitter(Records).run(OS);
133 EmitSubtarget(Records, OS);
147134 break;
148135 case GenIntrinsic:
149 IntrinsicEmitter(Records).run(OS);
136 EmitIntrinsics(Records, OS);
150137 break;
151138 case GenTgtIntrinsic:
152 IntrinsicEmitter(Records, true).run(OS);
139 EmitIntrinsics(Records, OS, true);
153140 break;
154141 case GenEDInfo:
155 EDEmitter(Records).run(OS);
142 EmitEnhancedDisassemblerInfo(Records, OS);
156143 break;
157144 case PrintEnums:
158145 {
178165 break;
179166 }
180167 }
181
168
182169 return false;
183170 }
184171 };
0 //===- TableGenBackends.h - Declarations for LLVM TableGen Backends -------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the declarations for all of the LLVM TableGen
10 // backends. A "TableGen backend" is just a function. See below for a
11 // precise description.
12 //
13 //===----------------------------------------------------------------------===//
14
15
16 // A TableGen backend is a function that looks like
17 //
18 // EmitFoo(RecordKeeper &RK, raw_ostream &OS /*, anything else you need */ )
19 //
20 // What you do inside of that function is up to you, but it will usually
21 // involve generating C++ code to the provided raw_ostream.
22 //
23 // The RecordKeeper is just a top-level container for an in-memory
24 // representation of the data encoded in the TableGen file. What a TableGen
25 // backend does is walk around that in-memory representation and generate
26 // stuff based on the information it contains.
27 //
28 // The in-memory representation is a node-graph (think of it like JSON but
29 // with a richer ontology of types), where the nodes are subclasses of
30 // Record. The methods `getClass`, `getDef` are the basic interface to
31 // access the node-graph. RecordKeeper also provides a handy method
32 // `getAllDerivedDefinitions`. Consult "include/llvm/TableGen/Record.h" for
33 // the exact interfaces provided by Record's and RecordKeeper.
34 //
35 // A common pattern for TableGen backends is for the EmitFoo function to
36 // instantiate a class which holds some context for the generation process,
37 // and then have most of the work happen in that class's methods. This
38 // pattern partly has historical roots in the previous TableGen backend API
39 // that involved a class and an invocation like `FooEmitter(RK).run(OS)`.
40 //
41 // Remember to wrap private things in an anonymous namespace. For most
42 // backends, this means that the EmitFoo function is the only thing not in
43 // the anonymous namespace.
44
45
46 // FIXME: Reorganize TableGen so that build dependencies can be more
47 // accurately expressed. Currently, touching any of the emitters (or
48 // anything that they transitively depend on) causes everything dependent
49 // on TableGen to be rebuilt (this includes all the targets!). Perhaps have
50 // a standalone TableGen binary and have the backends be loadable modules
51 // of some sort; then the dependency could be expressed as being on the
52 // module, and all the modules would have a common dependency on the
53 // TableGen binary with as few dependencies as possible on the rest of
54 // LLVM.
55
56
57 namespace llvm {
58
59 class raw_ostream;
60 class RecordKeeper;
61
62 void EmitIntrinsics(RecordKeeper &RK, raw_ostream &OS, bool TargetOnly = false);
63 void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS);
64 void EmitAsmWriter(RecordKeeper &RK, raw_ostream &OS);
65 void EmitCallingConv(RecordKeeper &RK, raw_ostream &OS);
66 void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS);
67 void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS);
68 void EmitDFAPacketizer(RecordKeeper &RK, raw_ostream &OS);
69 void EmitDisassembler(RecordKeeper &RK, raw_ostream &OS);
70 void EmitEnhancedDisassemblerInfo(RecordKeeper &RK, raw_ostream &OS);
71 void EmitFastISel(RecordKeeper &RK, raw_ostream &OS);
72 void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS);
73 void EmitPseudoLowering(RecordKeeper &RK, raw_ostream &OS);
74 void EmitRegisterInfo(RecordKeeper &RK, raw_ostream &OS);
75 void EmitSubtarget(RecordKeeper &RK, raw_ostream &OS);
76
77 } // End llvm namespace