llvm.org GIT mirror llvm / 6e89e13
[multiversion] Switch all of the targets over to use the TargetIRAnalysis access path directly rather than implementing getTTI. This even removes getTTI from the interface. It's more efficient for each target to just register a precise callback that creates their specific TTI. As part of this, all of the targets which are building their subtargets individually per-function now build their TTI instance with the function and thus look up the correct subtarget and cache it. NVPTX, R600, and XCore currently don't leverage this functionality, but its trivial for them to add it now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227735 91177308-0d34-0410-b5e6-96231b3b80d8 Chandler Carruth 5 years ago
23 changed file(s) with 65 addition(s) and 69 deletion(s). Raw diff Collapse all Expand all
190190 /// \brief Get a \c TargetIRAnalysis appropriate for the target.
191191 ///
192192 /// This is used to construct the new pass manager's target IR analysis pass,
193 /// set up appropriately for this target machine.
193 /// set up appropriately for this target machine. Even the old pass manager
194 /// uses this to answer queries about the IR.
194195 virtual TargetIRAnalysis getTargetIRAnalysis();
195
196 /// \brief Get a TTI implementation for the target.
197 ///
198 /// Targets should override this method to provide target-accurate
199 /// information to the mid-level optimizer. If left with the baseline only
200 /// a very conservative set of heuristics will be used.
201 virtual TargetTransformInfo getTTI();
202196
203197 /// CodeGenFileType - These enums are meant to be passed into
204198 /// addPassesToEmitFile to indicate what type of file to emit, and returned by
251245
252246 void initAsmInfo();
253247 public:
254 /// \brief Get a TTI implementation for the target.
255 ///
256 /// This uses the common code generator to produce a TTI implementation.
257 /// Targets may override it to provide more customized TTI implementation
258 /// instead.
259 TargetTransformInfo getTTI() override;
248 /// \brief Get a TargetIRAnalysis implementation for the target.
249 ///
250 /// This analysis will produce a TTI result which uses the common code
251 /// generator to answer queries about the IR.
252 TargetIRAnalysis getTargetIRAnalysis() override;
260253
261254 /// createPassConfig - Create a pass configuration object to be used by
262255 /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
7777 CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
7878 }
7979
80 TargetTransformInfo LLVMTargetMachine::getTTI() {
81 return TargetTransformInfo(BasicTTIImpl(this));
80 TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() {
81 return TargetIRAnalysis(
82 [this](Function &) { return TargetTransformInfo(BasicTTIImpl(this)); });
8283 }
8384
8485 /// addPassesToX helper drives creation and initialization of TargetPassConfig.
195195 };
196196 } // namespace
197197
198 TargetTransformInfo AArch64TargetMachine::getTTI() {
199 return TargetTransformInfo(AArch64TTIImpl(this));
198 TargetIRAnalysis AArch64TargetMachine::getTargetIRAnalysis() {
199 return TargetIRAnalysis([this](Function &F) {
200 return TargetTransformInfo(AArch64TTIImpl(this, F));
201 });
200202 }
201203
202204 TargetPassConfig *AArch64TargetMachine::createPassConfig(PassManagerBase &PM) {
4444 // Pass Pipeline Configuration
4545 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
4646
47 /// \brief Register AArch64 analysis passes with a pass manager.
48 TargetTransformInfo getTTI() override;
47 /// \brief Get the TargetIRAnalysis for this target.
48 TargetIRAnalysis getTargetIRAnalysis() override;
4949
5050 TargetLoweringObjectFile* getObjFileLowering() const override {
5151 return TLOF.get();
4343 };
4444
4545 public:
46 explicit AArch64TTIImpl(const AArch64TargetMachine *TM)
47 : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {}
46 explicit AArch64TTIImpl(const AArch64TargetMachine *TM, Function &F)
47 : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {}
4848
4949 // Provide value semantics. MSVC requires that we spell all of these out.
5050 AArch64TTIImpl(const AArch64TTIImpl &Arg)
215215 return I.get();
216216 }
217217
218 TargetTransformInfo ARMBaseTargetMachine::getTTI() {
219 return TargetTransformInfo(ARMTTIImpl(this));
218 TargetIRAnalysis ARMBaseTargetMachine::getTargetIRAnalysis() {
219 return TargetIRAnalysis(
220 [this](Function &F) { return TargetTransformInfo(ARMTTIImpl(this, F)); });
220221 }
221222
222223
4848 const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
4949 const DataLayout *getDataLayout() const override { return &DL; }
5050
51 /// \brief Register ARM analysis passes with a pass manager.
52 TargetTransformInfo getTTI() override;
51 /// \brief Get the TargetIRAnalysis for this target.
52 TargetIRAnalysis getTargetIRAnalysis() override;
5353
5454 // Pass Pipeline Configuration
5555 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
3636 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
3737
3838 public:
39 explicit ARMTTIImpl(const ARMBaseTargetMachine *TM)
40 : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {}
39 explicit ARMTTIImpl(const ARMBaseTargetMachine *TM, Function &F)
40 : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {}
4141
4242 // Provide value semantics. MSVC requires that we spell all of these out.
4343 ARMTTIImpl(const ARMTTIImpl &Arg)
237237 addPass(createMipsOptimizePICCallPass(getMipsTargetMachine()));
238238 }
239239
240 TargetTransformInfo MipsTargetMachine::getTTI() {
241 if (Subtarget->allowMixed16_32()) {
242 DEBUG(errs() << "No Target Transform Info Pass Added\n");
243 //FIXME: The Basic Target Transform Info
244 // pass needs to become a function pass instead of
245 // being an immutable pass and then this method as it exists now
246 // would be unnecessary.
247 return TargetTransformInfo(getDataLayout());
248 }
249
250 DEBUG(errs() << "Target Transform Info Pass Added\n");
251 return LLVMTargetMachine::getTTI();
240 TargetIRAnalysis MipsTargetMachine::getTargetIRAnalysis() {
241 return TargetIRAnalysis([this](Function &F) {
242 if (Subtarget->allowMixed16_32()) {
243 DEBUG(errs() << "No Target Transform Info Pass Added\n");
244 // FIXME: This is no longer necessary as the TTI returned is per-function.
245 return TargetTransformInfo(getDataLayout());
246 }
247
248 DEBUG(errs() << "Target Transform Info Pass Added\n");
249 return TargetTransformInfo(BasicTTIImpl(this));
250 });
252251 }
253252
254253 // Implemented by targets that want to run passes immediately before
1414 #define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
1515
1616 #include "MipsSubtarget.h"
17 #include "llvm/CodeGen/BasicTTIImpl.h"
1718 #include "llvm/CodeGen/Passes.h"
1819 #include "llvm/CodeGen/SelectionDAGISel.h"
1920 #include "llvm/Target/TargetFrameLowering.h"
4344 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
4445 ~MipsTargetMachine() override;
4546
46 TargetTransformInfo getTTI() override;
47 TargetIRAnalysis getTargetIRAnalysis() override;
4748
4849 const DataLayout *getDataLayout() const override { return &DL; }
4950 const MipsSubtarget *getSubtargetImpl() const override {
136136 return PassConfig;
137137 }
138138
139 TargetTransformInfo NVPTXTargetMachine::getTTI() {
140 return TargetTransformInfo(NVPTXTTIImpl(this));
139 TargetIRAnalysis NVPTXTargetMachine::getTargetIRAnalysis() {
140 return TargetIRAnalysis(
141 [this](Function &) { return TargetTransformInfo(NVPTXTTIImpl(this)); });
141142 }
142143
143144 void NVPTXPassConfig::addIRPasses() {
5555 return TLOF.get();
5656 }
5757
58 TargetTransformInfo getTTI() override;
58 TargetIRAnalysis getTargetIRAnalysis() override;
5959
6060 }; // NVPTXTargetMachine.
6161
274274 addPass(createPPCBranchSelectionPass(), false);
275275 }
276276
277 TargetTransformInfo PPCTargetMachine::getTTI() {
278 return TargetTransformInfo(PPCTTIImpl(this));
279 }
277 TargetIRAnalysis PPCTargetMachine::getTargetIRAnalysis() {
278 return TargetIRAnalysis(
279 [this](Function &F) { return TargetTransformInfo(PPCTTIImpl(this, F)); });
280 }
4444 // Pass Pipeline Configuration
4545 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
4646
47 TargetTransformInfo getTTI() override;
47 TargetIRAnalysis getTargetIRAnalysis() override;
4848
4949 TargetLoweringObjectFile *getObjFileLowering() const override {
5050 return TLOF.get();
3232 const PPCTargetLowering *TLI;
3333
3434 public:
35 explicit PPCTTIImpl(const PPCTargetMachine *TM)
36 : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {}
35 explicit PPCTTIImpl(const PPCTargetMachine *TM, Function &F)
36 : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {}
3737
3838 // Provide value semantics. MSVC requires that we spell all of these out.
3939 PPCTTIImpl(const PPCTTIImpl &Arg)
119119 // AMDGPU Pass Setup
120120 //===----------------------------------------------------------------------===//
121121
122 TargetTransformInfo AMDGPUTargetMachine::getTTI() {
123 return TargetTransformInfo(AMDGPUTTIImpl(this));
122 TargetIRAnalysis AMDGPUTargetMachine::getTargetIRAnalysis() {
123 return TargetIRAnalysis(
124 [this](Function &F) { return TargetTransformInfo(AMDGPUTTIImpl(this)); });
124125 }
125126
126127 void AMDGPUPassConfig::addIRPasses() {
5454 }
5555 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
5656
57 TargetTransformInfo getTTI() override;
57 TargetIRAnalysis getTargetIRAnalysis() override;
5858
5959 TargetLoweringObjectFile *getObjFileLowering() const override {
6060 return TLOF;
172172 }
173173
174174 TargetIRAnalysis TargetMachine::getTargetIRAnalysis() {
175 // While targets are free to just override getTTI and rely on this analysis,
176 // it would be more efficient to override and provide an analysis that could
177 // directly construct that target's TTI without the virtual call.
178 return TargetIRAnalysis([this](Function &) { return getTTI(); });
179 }
180
181 TargetTransformInfo TargetMachine::getTTI() {
182 return TargetTransformInfo(getDataLayout());
175 return TargetIRAnalysis(
176 [this](Function &) { return TargetTransformInfo(getDataLayout()); });
183177 }
184178
185179 static bool canUsePrivateLabel(const MCAsmInfo &AsmInfo,
164164 // X86 TTI query.
165165 //===----------------------------------------------------------------------===//
166166
167 TargetTransformInfo X86TargetMachine::getTTI() {
168 return TargetTransformInfo(X86TTIImpl(this));
167 TargetIRAnalysis X86TargetMachine::getTargetIRAnalysis() {
168 return TargetIRAnalysis(
169 [this](Function &F) { return TargetTransformInfo(X86TTIImpl(this, F)); });
169170 }
170171
171172
3838 const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; }
3939 const X86Subtarget *getSubtargetImpl(const Function &F) const override;
4040
41 TargetTransformInfo getTTI() override;
41 TargetIRAnalysis getTargetIRAnalysis() override;
4242
4343 // Set up the pass pipeline.
4444 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
3434 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
3535
3636 public:
37 explicit X86TTIImpl(const X86TargetMachine *TM)
38 : BaseT(TM), ST(TM->getSubtargetImpl()), TLI(ST->getTargetLowering()) {}
37 explicit X86TTIImpl(const X86TargetMachine *TM, Function &F)
38 : BaseT(TM), ST(TM->getSubtargetImpl(F)), TLI(ST->getTargetLowering()) {}
3939
4040 // Provide value semantics. MSVC requires that we spell all of these out.
4141 X86TTIImpl(const X86TTIImpl &Arg)
8282 RegisterTargetMachine X(TheXCoreTarget);
8383 }
8484
85 TargetTransformInfo XCoreTargetMachine::getTTI() {
86 return TargetTransformInfo(XCoreTTIImpl(this));
85 TargetIRAnalysis XCoreTargetMachine::getTargetIRAnalysis() {
86 return TargetIRAnalysis(
87 [this](Function &) { return TargetTransformInfo(XCoreTTIImpl(this)); });
8788 }
3535 // Pass Pipeline Configuration
3636 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
3737
38 TargetTransformInfo getTTI() override;
38 TargetIRAnalysis getTargetIRAnalysis() override;
3939 TargetLoweringObjectFile *getObjFileLowering() const override {
4040 return TLOF.get();
4141 }