llvm.org GIT mirror llvm / 6d1263a
Convert assert(0) to llvm_unreachable in X86 Target directory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149809 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 8 years ago
8 changed file(s) with 20 addition(s) and 22 deletion(s). Raw diff Collapse all Expand all
5858 void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
5959 raw_ostream &O) {
6060 switch (MI->getOperand(Op).getImm()) {
61 default: assert(0 && "Invalid ssecc argument!");
61 default: llvm_unreachable("Invalid ssecc argument!");
6262 case 0: O << "eq"; break;
6363 case 1: O << "lt"; break;
6464 case 2: O << "le"; break;
4848 void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
4949 raw_ostream &O) {
5050 switch (MI->getOperand(Op).getImm()) {
51 default: assert(0 && "Invalid ssecc argument!");
51 default: llvm_unreachable("Invalid ssecc argument!");
5252 case 0: O << "eq"; break;
5353 case 1: O << "lt"; break;
5454 case 2: O << "le"; break;
3636
3737 static unsigned getFixupKindLog2Size(unsigned Kind) {
3838 switch (Kind) {
39 default: assert(0 && "invalid fixup kind!");
39 default: llvm_unreachable("invalid fixup kind!");
4040 case FK_PCRel_1:
4141 case FK_SecRel_1:
4242 case FK_Data_1: return 0;
1818
1919 #include "X86MCTargetDesc.h"
2020 #include "llvm/Support/DataTypes.h"
21 #include
21 #include "llvm/Support/ErrorHandling.h"
2222
2323 namespace llvm {
2424
449449 /// of the specified instruction.
450450 static inline unsigned getSizeOfImm(uint64_t TSFlags) {
451451 switch (TSFlags & X86II::ImmMask) {
452 default: assert(0 && "Unknown immediate size");
452 default: llvm_unreachable("Unknown immediate size");
453453 case X86II::Imm8:
454454 case X86II::Imm8PCRel: return 1;
455455 case X86II::Imm16:
464464 /// TSFlags indicates that it is pc relative.
465465 static inline unsigned isImmPCRel(uint64_t TSFlags) {
466466 switch (TSFlags & X86II::ImmMask) {
467 default: assert(0 && "Unknown immediate size");
467 default: llvm_unreachable("Unknown immediate size");
468468 case X86II::Imm8PCRel:
469469 case X86II::Imm16PCRel:
470470 case X86II::Imm32PCRel:
487487 ///
488488 static inline int getMemoryOperandNo(uint64_t TSFlags, unsigned Opcode) {
489489 switch (TSFlags & X86II::FormMask) {
490 case X86II::MRMInitReg: assert(0 && "FIXME: Remove this form");
491 default: assert(0 && "Unknown FormMask value in getMemoryOperandNo!");
490 case X86II::MRMInitReg: llvm_unreachable("FIXME: Remove this form");
491 default: llvm_unreachable("Unknown FormMask value in getMemoryOperandNo!");
492492 case X86II::Pseudo:
493493 case X86II::RawFrm:
494494 case X86II::AddRegFrm:
479479 VEX_L = 1;
480480
481481 switch (TSFlags & X86II::Op0Mask) {
482 default: assert(0 && "Invalid prefix!");
482 default: llvm_unreachable("Invalid prefix!");
483483 case X86II::T8: // 0F 38
484484 VEX_5M = 0x2;
485485 break;
530530 // Classify VEX_B, VEX_4V, VEX_R, VEX_X
531531 unsigned CurOp = 0;
532532 switch (TSFlags & X86II::FormMask) {
533 case X86II::MRMInitReg: assert(0 && "FIXME: Remove this!");
533 case X86II::MRMInitReg: llvm_unreachable("FIXME: Remove this!");
534534 case X86II::MRMDestMem: {
535535 // MRMDestMem instructions forms:
536536 // MemAddr, src1(ModR/M)
694694 }
695695
696696 switch (TSFlags & X86II::FormMask) {
697 case X86II::MRMInitReg: assert(0 && "FIXME: Remove this!");
697 case X86II::MRMInitReg: llvm_unreachable("FIXME: Remove this!");
698698 case X86II::MRMSrcReg:
699699 if (MI.getOperand(0).isReg() &&
700700 X86II::isX86_64ExtendedReg(MI.getOperand(0).getReg()))
764764 const MCInst &MI,
765765 raw_ostream &OS) const {
766766 switch (TSFlags & X86II::SegOvrMask) {
767 default: assert(0 && "Invalid segment!");
767 default: llvm_unreachable("Invalid segment!");
768768 case 0:
769769 // No segment override, check for explicit one on memory operand.
770770 if (MemOperand != -1) { // If the instruction has a memory operand.
771771 switch (MI.getOperand(MemOperand+X86::AddrSegmentReg).getReg()) {
772 default: assert(0 && "Unknown segment register!");
772 default: llvm_unreachable("Unknown segment register!");
773773 case 0: break;
774774 case X86::CS: EmitByte(0x2E, CurByte, OS); break;
775775 case X86::SS: EmitByte(0x36, CurByte, OS); break;
820820
821821 bool Need0FPrefix = false;
822822 switch (TSFlags & X86II::Op0Mask) {
823 default: assert(0 && "Invalid prefix!");
823 default: llvm_unreachable("Invalid prefix!");
824824 case 0: break; // No prefix!
825825 case X86II::REP: break; // already handled.
826826 case X86II::TB: // Two-byte opcode prefix
941941 unsigned SrcRegNum = 0;
942942 switch (TSFlags & X86II::FormMask) {
943943 case X86II::MRMInitReg:
944 assert(0 && "FIXME: Remove this form when the JIT moves to MCCodeEmitter!");
944 llvm_unreachable("FIXME: Remove this form when the JIT moves to MCCodeEmitter!");
945945 default: errs() << "FORM: " << (TSFlags & X86II::FormMask) << "\n";
946 assert(0 && "Unknown FormMask value in X86MCCodeEmitter!");
946 llvm_unreachable("Unknown FormMask value in X86MCCodeEmitter!");
947947 case X86II::Pseudo:
948 assert(0 && "Pseudo instruction shouldn't be emitted");
948 llvm_unreachable("Pseudo instruction shouldn't be emitted");
949949 case X86II::RawFrm:
950950 EmitByte(BaseOpcode, CurByte, OS);
951951 break;
141141
142142 if (RelTy == ELF::R_X86_64_PC32 || RelTy == ELF::R_386_PC32)
143143 return SymOffset - (RelOffset + 4);
144 else
145 assert(0 && "computeRelocation unknown for this relocation type");
146144
147 return 0;
145 llvm_unreachable("computeRelocation unknown for this relocation type");
148146 }
1232112321 case X86::TAILJMPd64:
1232212322 case X86::TAILJMPr64:
1232312323 case X86::TAILJMPm64:
12324 assert(0 && "TAILJMP64 would not be touched here.");
12324 llvm_unreachable("TAILJMP64 would not be touched here.");
1232512325 case X86::TCRETURNdi64:
1232612326 case X86::TCRETURNri64:
1232712327 case X86::TCRETURNmi64:
415415 case X86::TAILJMPd64: {
416416 unsigned Opcode;
417417 switch (OutMI.getOpcode()) {
418 default: assert(0 && "Invalid opcode");
418 default: llvm_unreachable("Invalid opcode");
419419 case X86::TAILJMPr: Opcode = X86::JMP32r; break;
420420 case X86::TAILJMPd:
421421 case X86::TAILJMPd64: Opcode = X86::JMP_1; break;