llvm.org GIT mirror llvm / 6cf1b93
MIR: Support MachineMemOperands without associated value This is allowed (though used rarely) and useful to keep your tests short. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271752 91177308-0d34-0410-b5e6-96231b3b80d8 Matthias Braun 4 years ago
4 changed file(s) with 28 addition(s) and 34 deletion(s). Raw diff Collapse all Expand all
17771777 return true;
17781778 lex();
17791779
1780 const char *Word = Flags & MachineMemOperand::MOLoad ? "from" : "into";
1781 if (Token.isNot(MIToken::Identifier) || Token.stringValue() != Word)
1782 return error(Twine("expected '") + Word + "'");
1783 lex();
1784
17851780 MachinePointerInfo Ptr = MachinePointerInfo();
1786 if (parseMachinePointerInfo(Ptr))
1787 return true;
1781 if (Token.is(MIToken::Identifier)) {
1782 const char *Word = Flags & MachineMemOperand::MOLoad ? "from" : "into";
1783 if (Token.stringValue() != Word)
1784 return error(Twine("expected '") + Word + "'");
1785 lex();
1786
1787 if (parseMachinePointerInfo(Ptr))
1788 return true;
1789 }
17881790 unsigned BaseAlignment = Size;
17891791 AAMDNodes AAInfo;
17901792 MDNode *Range = nullptr;
882882 assert(Op.isStore() && "Non load machine operand must be a store");
883883 OS << "store ";
884884 }
885 OS << Op.getSize() << (Op.isLoad() ? " from " : " into ");
885 OS << Op.getSize();
886886 if (const Value *Val = Op.getValue()) {
887 OS << (Op.isLoad() ? " from " : " into ");
887888 printIRValueReference(*Val);
888 } else {
889 const PseudoSourceValue *PVal = Op.getPseudoValue();
889 } else if (const PseudoSourceValue *PVal = Op.getPseudoValue()) {
890 OS << (Op.isLoad() ? " from " : " into ");
890891 assert(PVal && "Expected a pseudo source value");
891892 switch (PVal->kind()) {
892893 case PseudoSourceValue::Stack:
+0
-24
test/CodeGen/MIR/X86/expected-from-in-memory-operand.mir less more
None # RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
1
2 --- |
3
4 define i32 @test(i32* %a) {
5 entry:
6 %b = load i32, i32* %a
7 ret i32 %b
8 }
9
10 ...
11 ---
12 name: test
13 tracksRegLiveness: true
14 liveins:
15 - { reg: '%rdi' }
16 body: |
17 bb.0.entry:
18 liveins: %rdi
19 ; CHECK: [[@LINE+1]]:55: expected 'from'
20 %eax = MOV32rm killed %rdi, 1, _, 0, _ :: (load 4 %ir.a)
21 RETQ %eax
22 ...
23
185185 %0 = load i8*, i8** undef, align 8
186186 ret i8* %0
187187 }
188
189 define void @dummy() {
190 ret void
191 }
188192 ...
189193 ---
190194 name: test
505509 %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8 from `i8** undef`)
506510 RETQ %rax
507511 ...
512 ---
513 # Test memory operand without associated value.
514 # CHECK-LABEL: name: dummy
515 # CHECK: %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8)
516 name: dummy
517 tracksRegLiveness: true
518 body: |
519 bb.0:
520 %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8)
521 RETQ %rax
522 ...