llvm.org GIT mirror llvm / 6cd467b
If node is not available then use FuncInfo.ValueMap to emit debug info for byval parameter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112238 91177308-0d34-0410-b5e6-96231b3b80d8 Devang Patel 10 years ago
1 changed file(s) with 9 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
39463946 return false;
39473947
39483948 unsigned Reg = 0;
3949 if (N.getOpcode() == ISD::CopyFromReg) {
3949 if (N.getNode() && N.getOpcode() == ISD::CopyFromReg) {
39503950 Reg = cast(N.getOperand(1))->getReg();
39513951 if (Reg && TargetRegisterInfo::isVirtualRegister(Reg)) {
39523952 MachineRegisterInfo &RegInfo = MF.getRegInfo();
41104110 return 0;
41114111 DAG.AddDbgValue(SDV, N.getNode(), isParameter);
41124112 } else {
4113 // This isn't useful, but it shows what we're missing.
4114 SDV = DAG.getDbgValue(Variable, UndefValue::get(Address->getType()),
4115 0, dl, SDNodeOrder);
4116 DAG.AddDbgValue(SDV, 0, isParameter);
4113 // If Address is an arugment then try to emits its dbg value using
4114 // virtual register info from the FuncInfo.ValueMap. Otherwise add undef
4115 // to help track missing debug info.
4116 if (!EmitFuncArgumentDbgValue(Address, Variable, 0, N)) {
4117 SDV = DAG.getDbgValue(Variable, UndefValue::get(Address->getType()),
4118 0, dl, SDNodeOrder);
4119 DAG.AddDbgValue(SDV, 0, isParameter);
4120 }
41174121 }
41184122 return 0;
41194123 }