llvm.org GIT mirror llvm / 6c132cb
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well Rename the enum value from X86_64_Win64 to plain Win64. The symbol exposed in the textual IR is changed from 'x86_64_win64cc' to 'win64cc', but the numeric value is kept, keeping support for old bitcode. Differential Revision: https://reviews.llvm.org/D34474 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308208 91177308-0d34-0410-b5e6-96231b3b80d8 Martin Storsjo 2 years ago
31 changed file(s) with 168 addition(s) and 72 deletion(s). Raw diff Collapse all Expand all
142142 /// System V ABI, used on most non-Windows systems.
143143 X86_64_SysV = 78,
144144
145 /// \brief The C convention as implemented on Windows/x86-64. This
146 /// convention differs from the more common \c X86_64_SysV convention
147 /// in a number of ways, most notably in that XMM registers used to pass
148 /// arguments are shadowed by GPRs, and vice versa.
149 X86_64_Win64 = 79,
145 /// \brief The C convention as implemented on Windows/x86-64 and
146 /// AArch64. This convention differs from the more common
147 /// \c X86_64_SysV convention in a number of ways, most notably in
148 /// that XMM registers used to pass arguments are shadowed by GPRs,
149 /// and vice versa.
150 /// On AArch64, this is identical to the normal C (AAPCS) calling
151 /// convention for normal functions, but floats are passed in integer
152 /// registers to variadic functions.
153 Win64 = 79,
150154
151155 /// \brief MSVC calling convention that passes vectors and vector aggregates
152156 /// in SSE registers.
587587 KEYWORD(spir_func);
588588 KEYWORD(intel_ocl_bicc);
589589 KEYWORD(x86_64_sysvcc);
590 KEYWORD(x86_64_win64cc);
590 KEYWORD(win64cc);
591591 KEYWORD(x86_regcallcc);
592592 KEYWORD(webkit_jscc);
593593 KEYWORD(swiftcc);
16691669 /// ::= 'spir_func'
16701670 /// ::= 'spir_kernel'
16711671 /// ::= 'x86_64_sysvcc'
1672 /// ::= 'x86_64_win64cc'
1672 /// ::= 'win64cc'
16731673 /// ::= 'webkit_jscc'
16741674 /// ::= 'anyregcc'
16751675 /// ::= 'preserve_mostcc'
17111711 case lltok::kw_spir_func: CC = CallingConv::SPIR_FUNC; break;
17121712 case lltok::kw_intel_ocl_bicc: CC = CallingConv::Intel_OCL_BI; break;
17131713 case lltok::kw_x86_64_sysvcc: CC = CallingConv::X86_64_SysV; break;
1714 case lltok::kw_x86_64_win64cc: CC = CallingConv::X86_64_Win64; break;
1714 case lltok::kw_win64cc: CC = CallingConv::Win64; break;
17151715 case lltok::kw_webkit_jscc: CC = CallingConv::WebKit_JS; break;
17161716 case lltok::kw_anyregcc: CC = CallingConv::AnyReg; break;
17171717 case lltok::kw_preserve_mostcc:CC = CallingConv::PreserveMost; break;
140140 kw_spir_kernel,
141141 kw_spir_func,
142142 kw_x86_64_sysvcc,
143 kw_x86_64_win64cc,
143 kw_win64cc,
144144 kw_webkit_jscc,
145145 kw_anyregcc,
146146 kw_swiftcc,
364364 case CallingConv::PTX_Kernel: Out << "ptx_kernel"; break;
365365 case CallingConv::PTX_Device: Out << "ptx_device"; break;
366366 case CallingConv::X86_64_SysV: Out << "x86_64_sysvcc"; break;
367 case CallingConv::X86_64_Win64: Out << "x86_64_win64cc"; break;
367 case CallingConv::Win64: Out << "win64cc"; break;
368368 case CallingConv::SPIR_FUNC: Out << "spir_func"; break;
369369 case CallingConv::SPIR_KERNEL: Out << "spir_kernel"; break;
370370 case CallingConv::Swift: Out << "swiftcc"; break;
957957
958958 unsigned GPRSaveSize = AFI->getVarArgsGPRSize();
959959 const AArch64Subtarget &Subtarget = MF.getSubtarget();
960 if (Subtarget.isTargetWindows())
960 bool IsWin64 = Subtarget.isCallingConvWin64(MF.getFunction()->getCallingConv());
961 if (IsWin64)
961962 Offset -= alignTo(GPRSaveSize, 16);
962963
963964 for (unsigned i = 0; i < Count; ++i) {
26542654 if (!Subtarget->isTargetDarwin())
26552655 return CC_AArch64_AAPCS;
26562656 return IsVarArg ? CC_AArch64_DarwinPCS_VarArg : CC_AArch64_DarwinPCS;
2657 case CallingConv::Win64:
2658 return IsVarArg ? CC_AArch64_Win64_VarArg : CC_AArch64_AAPCS;
26572659 }
26582660 }
26592661
26692671 SelectionDAG &DAG, SmallVectorImpl &InVals) const {
26702672 MachineFunction &MF = DAG.getMachineFunction();
26712673 MachineFrameInfo &MFI = MF.getFrameInfo();
2674 bool IsWin64 = Subtarget->isCallingConvWin64(MF.getFunction()->getCallingConv());
26722675
26732676 // Assign locations to all of the incoming arguments.
26742677 SmallVector ArgLocs;
28252828 // varargs
28262829 AArch64FunctionInfo *FuncInfo = MF.getInfo();
28272830 if (isVarArg) {
2828 if (!Subtarget->isTargetDarwin()) {
2831 if (!Subtarget->isTargetDarwin() || IsWin64) {
28292832 // The AAPCS variadic function ABI is identical to the non-variadic
28302833 // one. As a result there may be more arguments in registers and we should
28312834 // save them for future reference.
28722875 MachineFrameInfo &MFI = MF.getFrameInfo();
28732876 AArch64FunctionInfo *FuncInfo = MF.getInfo();
28742877 auto PtrVT = getPointerTy(DAG.getDataLayout());
2878 bool IsWin64 = Subtarget->isCallingConvWin64(MF.getFunction()->getCallingConv());
28752879
28762880 SmallVector MemOps;
28772881
28842888 unsigned GPRSaveSize = 8 * (NumGPRArgRegs - FirstVariadicGPR);
28852889 int GPRIdx = 0;
28862890 if (GPRSaveSize != 0) {
2887 if (Subtarget->isTargetWindows())
2891 if (IsWin64)
28882892 GPRIdx = MFI.CreateFixedObject(GPRSaveSize, -(int)GPRSaveSize, false);
28892893 else
28902894 GPRIdx = MFI.CreateStackObject(GPRSaveSize, 8, false);
28962900 SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64);
28972901 SDValue Store = DAG.getStore(
28982902 Val.getValue(1), DL, Val, FIN,
2899 Subtarget->isTargetWindows()
2903 IsWin64
29002904 ? MachinePointerInfo::getFixedStack(DAG.getMachineFunction(),
29012905 GPRIdx,
29022906 (i - FirstVariadicGPR) * 8)
29092913 FuncInfo->setVarArgsGPRIndex(GPRIdx);
29102914 FuncInfo->setVarArgsGPRSize(GPRSaveSize);
29112915
2912 if (Subtarget->hasFPARMv8() && !Subtarget->isTargetWindows()) {
2916 if (Subtarget->hasFPARMv8() && !IsWin64) {
29132917 static const MCPhysReg FPRArgRegs[] = {
29142918 AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3,
29152919 AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7};
45874591
45884592 SDValue AArch64TargetLowering::LowerVASTART(SDValue Op,
45894593 SelectionDAG &DAG) const {
4590 if (Subtarget->isTargetWindows())
4594 MachineFunction &MF = DAG.getMachineFunction();
4595
4596 if (Subtarget->isCallingConvWin64(MF.getFunction()->getCallingConv()))
45914597 return LowerWin64_VASTART(Op, DAG);
45924598 else if (Subtarget->isTargetDarwin())
45934599 return LowerDarwin_VASTART(Op, DAG);
305305 bool enableEarlyIfConversion() const override;
306306
307307 std::unique_ptr getCustomPBQPConstraints() const override;
308
309 bool isCallingConvWin64(CallingConv::ID CC) const {
310 switch (CC) {
311 case CallingConv::C:
312 return isTargetWindows();
313 case CallingConv::Win64:
314 return true;
315 default:
316 return false;
317 }
318 }
308319 };
309320 } // End llvm namespace
310321
447447 CCIfCC<"CallingConv::Swift", CCDelegateTo>,
448448
449449 // Handle explicit CC selection
450 CCIfCC<"CallingConv::X86_64_Win64", CCDelegateTo>,
450 CCIfCC<"CallingConv::Win64", CCDelegateTo>,
451451 CCIfCC<"CallingConv::X86_64_SysV", CCDelegateTo>,
452452
453453 // Handle Vectorcall CC
10031003 CCIfCC<"CallingConv::HiPE", CCDelegateTo>,
10041004 CCIfCC<"CallingConv::WebKit_JS", CCDelegateTo>,
10051005 CCIfCC<"CallingConv::AnyReg", CCDelegateTo>,
1006 CCIfCC<"CallingConv::X86_64_Win64", CCDelegateTo>,
1006 CCIfCC<"CallingConv::Win64", CCDelegateTo>,
10071007 CCIfCC<"CallingConv::X86_64_SysV", CCDelegateTo>,
10081008 CCIfCC<"CallingConv::X86_VectorCall", CCDelegateTo>,
10091009 CCIfCC<"CallingConv::HHVM", CCDelegateTo>,
11861186 CC != CallingConv::X86_StdCall &&
11871187 CC != CallingConv::X86_ThisCall &&
11881188 CC != CallingConv::X86_64_SysV &&
1189 CC != CallingConv::X86_64_Win64)
1189 CC != CallingConv::Win64)
11901190 return false;
11911191
11921192 // Don't handle popping bytes if they don't fit the ret's immediate.
31703170 case CallingConv::X86_FastCall:
31713171 case CallingConv::X86_StdCall:
31723172 case CallingConv::X86_ThisCall:
3173 case CallingConv::X86_64_Win64:
3173 case CallingConv::Win64:
31743174 case CallingConv::X86_64_SysV:
31753175 break;
31763176 }
26672667 switch (CC) {
26682668 // C calling conventions:
26692669 case CallingConv::C:
2670 case CallingConv::X86_64_Win64:
2670 case CallingConv::Win64:
26712671 case CallingConv::X86_64_SysV:
26722672 // Callee pop conventions:
26732673 case CallingConv::X86_ThisCall:
223223 const TargetRegisterClass *
224224 X86RegisterInfo::getGPRsForTailCall(const MachineFunction &MF) const {
225225 const Function *F = MF.getFunction();
226 if (IsWin64 || (F && F->getCallingConv() == CallingConv::X86_64_Win64))
226 if (IsWin64 || (F && F->getCallingConv() == CallingConv::Win64))
227227 return &X86::GR64_TCW64RegClass;
228228 else if (Is64Bit)
229229 return &X86::GR64_TCRegClass;
333333 if (Is64Bit)
334334 return CSR_64_MostRegs_SaveList;
335335 break;
336 case CallingConv::X86_64_Win64:
336 case CallingConv::Win64:
337337 if (!HasSSE)
338338 return CSR_Win64_NoSSE_SaveList;
339339 return CSR_Win64_SaveList;
449449 if (Is64Bit)
450450 return CSR_64_MostRegs_RegMask;
451451 break;
452 case CallingConv::X86_64_Win64:
452 case CallingConv::Win64:
453453 return CSR_Win64_RegMask;
454454 case CallingConv::X86_64_SysV:
455455 return CSR_64_RegMask;
596596 case CallingConv::Intel_OCL_BI:
597597 return isTargetWin64();
598598 // This convention allows using the Win64 convention on other targets.
599 case CallingConv::X86_64_Win64:
599 case CallingConv::Win64:
600600 return true;
601601 // This convention allows using the SysV convention on Windows targets.
602602 case CallingConv::X86_64_SysV:
30383038 }
30393039
30403040 void visitVAStartInst(VAStartInst &I) override {
3041 if (F.getCallingConv() == CallingConv::X86_64_Win64)
3041 if (F.getCallingConv() == CallingConv::Win64)
30423042 return;
30433043 IRBuilder<> IRB(&I);
30443044 VAStartInstrumentationList.push_back(&I);
30523052 }
30533053
30543054 void visitVACopyInst(VACopyInst &I) override {
3055 if (F.getCallingConv() == CallingConv::X86_64_Win64)
3055 if (F.getCallingConv() == CallingConv::Win64)
30563056 return;
30573057 IRBuilder<> IRB(&I);
30583058 Value *VAListTag = I.getArgOperand(0);
367367 declare x86_64_sysvcc void @f.x86_64_sysvcc()
368368 ; CHECK: declare x86_64_sysvcc void @f.x86_64_sysvcc()
369369 declare cc79 void @f.cc79()
370 ; CHECK: declare x86_64_win64cc void @f.cc79()
371 declare x86_64_win64cc void @f.x86_64_win64cc()
372 ; CHECK: declare x86_64_win64cc void @f.x86_64_win64cc()
370 ; CHECK: declare win64cc void @f.cc79()
371 declare win64cc void @f.x86_64_win64cc()
372 ; CHECK: declare win64cc void @f.x86_64_win64cc()
373373 declare cc80 void @f.cc80()
374374 ; CHECK: declare x86_vectorcallcc void @f.cc80()
375375 declare x86_vectorcallcc void @f.x86_vectorcallcc()
367367 declare x86_64_sysvcc void @f.x86_64_sysvcc()
368368 ; CHECK: declare x86_64_sysvcc void @f.x86_64_sysvcc()
369369 declare cc79 void @f.cc79()
370 ; CHECK: declare x86_64_win64cc void @f.cc79()
371 declare x86_64_win64cc void @f.x86_64_win64cc()
372 ; CHECK: declare x86_64_win64cc void @f.x86_64_win64cc()
370 ; CHECK: declare win64cc void @f.cc79()
371 declare win64cc void @f.x86_64_win64cc()
372 ; CHECK: declare win64cc void @f.x86_64_win64cc()
373373 declare cc80 void @f.cc80()
374374 ; CHECK: declare x86_vectorcallcc void @f.cc80()
375375 declare x86_vectorcallcc void @f.x86_vectorcallcc()
392392 declare x86_64_sysvcc void @f.x86_64_sysvcc()
393393 ; CHECK: declare x86_64_sysvcc void @f.x86_64_sysvcc()
394394 declare cc79 void @f.cc79()
395 ; CHECK: declare x86_64_win64cc void @f.cc79()
396 declare x86_64_win64cc void @f.x86_64_win64cc()
397 ; CHECK: declare x86_64_win64cc void @f.x86_64_win64cc()
395 ; CHECK: declare win64cc void @f.cc79()
396 declare win64cc void @f.x86_64_win64cc()
397 ; CHECK: declare win64cc void @f.x86_64_win64cc()
398398 declare cc80 void @f.cc80()
399399 ; CHECK: declare x86_vectorcallcc void @f.cc80()
400400 declare x86_vectorcallcc void @f.x86_vectorcallcc()
421421 declare x86_64_sysvcc void @f.x86_64_sysvcc()
422422 ; CHECK: declare x86_64_sysvcc void @f.x86_64_sysvcc()
423423 declare cc79 void @f.cc79()
424 ; CHECK: declare x86_64_win64cc void @f.cc79()
425 declare x86_64_win64cc void @f.x86_64_win64cc()
426 ; CHECK: declare x86_64_win64cc void @f.x86_64_win64cc()
424 ; CHECK: declare win64cc void @f.cc79()
425 declare win64cc void @f.x86_64_win64cc()
426 ; CHECK: declare win64cc void @f.x86_64_win64cc()
427427 declare cc80 void @f.cc80()
428428 ; CHECK: declare x86_vectorcallcc void @f.cc80()
429429 declare x86_vectorcallcc void @f.x86_vectorcallcc()
421421 declare x86_64_sysvcc void @f.x86_64_sysvcc()
422422 ; CHECK: declare x86_64_sysvcc void @f.x86_64_sysvcc()
423423 declare cc79 void @f.cc79()
424 ; CHECK: declare x86_64_win64cc void @f.cc79()
425 declare x86_64_win64cc void @f.x86_64_win64cc()
426 ; CHECK: declare x86_64_win64cc void @f.x86_64_win64cc()
424 ; CHECK: declare win64cc void @f.cc79()
425 declare win64cc void @f.x86_64_win64cc()
426 ; CHECK: declare win64cc void @f.x86_64_win64cc()
427427 declare cc80 void @f.cc80()
428428 ; CHECK: declare x86_vectorcallcc void @f.cc80()
429429 declare x86_vectorcallcc void @f.x86_vectorcallcc()
424424 declare x86_64_sysvcc void @f.x86_64_sysvcc()
425425 ; CHECK: declare x86_64_sysvcc void @f.x86_64_sysvcc()
426426 declare cc79 void @f.cc79()
427 ; CHECK: declare x86_64_win64cc void @f.cc79()
428 declare x86_64_win64cc void @f.x86_64_win64cc()
429 ; CHECK: declare x86_64_win64cc void @f.x86_64_win64cc()
427 ; CHECK: declare win64cc void @f.cc79()
428 declare win64cc void @f.win64cc()
429 ; CHECK: declare win64cc void @f.win64cc()
430430 declare cc80 void @f.cc80()
431431 ; CHECK: declare x86_vectorcallcc void @f.cc80()
432432 declare x86_vectorcallcc void @f.x86_vectorcallcc()
0 ; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
1
2 define win64cc void @pass_va(i32 %count, ...) nounwind {
3 entry:
4 ; CHECK: sub sp, sp, #80
5 ; CHECK: add x8, sp, #24
6 ; CHECK: add x0, sp, #24
7 ; CHECK: stp x6, x7, [sp, #64]
8 ; CHECK: stp x4, x5, [sp, #48]
9 ; CHECK: stp x2, x3, [sp, #32]
10 ; CHECK: str x1, [sp, #24]
11 ; CHECK: stp x30, x8, [sp]
12 ; CHECK: bl other_func
13 ; CHECK: ldr x30, [sp], #80
14 ; CHECK: ret
15 %ap = alloca i8*, align 8
16 %ap1 = bitcast i8** %ap to i8*
17 call void @llvm.va_start(i8* %ap1)
18 %ap2 = load i8*, i8** %ap, align 8
19 call void @other_func(i8* %ap2)
20 ret void
21 }
22
23 declare void @other_func(i8*) local_unnamed_addr
24
25 declare void @llvm.va_start(i8*) nounwind
26 declare void @llvm.va_copy(i8*, i8*) nounwind
27
28 ; CHECK-LABEL: f9:
29 ; CHECK: sub sp, sp, #16
30 ; CHECK: add x8, sp, #24
31 ; CHECK: add x0, sp, #24
32 ; CHECK: str x8, [sp, #8]
33 ; CHECK: add sp, sp, #16
34 ; CHECK: ret
35 define win64cc i8* @f9(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, ...) nounwind {
36 entry:
37 %ap = alloca i8*, align 8
38 %ap1 = bitcast i8** %ap to i8*
39 call void @llvm.va_start(i8* %ap1)
40 %ap2 = load i8*, i8** %ap, align 8
41 ret i8* %ap2
42 }
43
44 ; CHECK-LABEL: f8:
45 ; CHECK: sub sp, sp, #16
46 ; CHECK: add x8, sp, #16
47 ; CHECK: add x0, sp, #16
48 ; CHECK: str x8, [sp, #8]
49 ; CHECK: add sp, sp, #16
50 ; CHECK: ret
51 define win64cc i8* @f8(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, ...) nounwind {
52 entry:
53 %ap = alloca i8*, align 8
54 %ap1 = bitcast i8** %ap to i8*
55 call void @llvm.va_start(i8* %ap1)
56 %ap2 = load i8*, i8** %ap, align 8
57 ret i8* %ap2
58 }
59
60 ; CHECK-LABEL: f7:
61 ; CHECK: sub sp, sp, #16
62 ; CHECK: add x8, sp, #8
63 ; CHECK: add x0, sp, #8
64 ; CHECK: stp x8, x7, [sp], #16
65 ; CHECK: ret
66 define win64cc i8* @f7(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, ...) nounwind {
67 entry:
68 %ap = alloca i8*, align 8
69 %ap1 = bitcast i8** %ap to i8*
70 call void @llvm.va_start(i8* %ap1)
71 %ap2 = load i8*, i8** %ap, align 8
72 ret i8* %ap2
73 }
11 ; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
22 ; CHECK-NOT: -{{[1-9][0-9]*}}(%rsp)
33
4 define x86_64_win64cc x86_fp80 @a(i64 %x) nounwind readnone {
4 define win64cc x86_fp80 @a(i64 %x) nounwind readnone {
55 entry:
66 %conv = sitofp i64 %x to x86_fp80 ; [#uses=1]
77 ret x86_fp80 %conv
315315
316316 ; STDERR-NOT: FastISel missed terminator: ret void
317317 ; CHECK-LABEL: win64ccfun
318 define x86_64_win64cc void @win64ccfun(i32 %i) {
318 define win64cc void @win64ccfun(i32 %i) {
319319 ; CHECK: ret
320320 ret void
321321 }
0 ; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
11
2 declare x86_64_win64cc void @win64_callee(i32)
3 declare x86_64_win64cc void (i32)* @win64_indirect()
4 declare x86_64_win64cc void @win64_other(i32)
2 declare win64cc void @win64_callee(i32)
3 declare win64cc void (i32)* @win64_indirect()
4 declare win64cc void @win64_other(i32)
55 declare void @sysv_callee(i32)
66 declare void (i32)* @sysv_indirect()
77 declare void @sysv_other(i32)
88
99 define void @sysv_caller(i32 %p1) {
1010 entry:
11 tail call x86_64_win64cc void @win64_callee(i32 %p1)
11 tail call win64cc void @win64_callee(i32 %p1)
1212 ret void
1313 }
1414
1818 ; CHECK: addq $40, %rsp
1919 ; CHECK: retq
2020
21 define x86_64_win64cc void @win64_caller(i32 %p1) {
21 define win64cc void @win64_caller(i32 %p1) {
2222 entry:
2323 tail call void @sysv_callee(i32 %p1)
2424 ret void
3636 ; CHECK-LABEL: sysv_matched:
3737 ; CHECK: jmp sysv_callee # TAILCALL
3838
39 define x86_64_win64cc void @win64_matched(i32 %p1) {
40 tail call x86_64_win64cc void @win64_callee(i32 %p1)
39 define win64cc void @win64_matched(i32 %p1) {
40 tail call win64cc void @win64_callee(i32 %p1)
4141 ret void
4242 }
4343
4444 ; CHECK-LABEL: win64_matched:
4545 ; CHECK: jmp win64_callee # TAILCALL
4646
47 define x86_64_win64cc void @win64_indirect_caller(i32 %p1) {
48 %1 = call x86_64_win64cc void (i32)* @win64_indirect()
49 call x86_64_win64cc void @win64_other(i32 0)
50 tail call x86_64_win64cc void %1(i32 %p1)
47 define win64cc void @win64_indirect_caller(i32 %p1) {
48 %1 = call win64cc void (i32)* @win64_indirect()
49 call win64cc void @win64_other(i32 0)
50 tail call win64cc void %1(i32 %p1)
5151 ret void
5252 }
5353
1919 }
2020
2121 ; Function Attrs: nounwind uwtable
22 define x86_64_win64cc i64 @peach() unnamed_addr #1 {
22 define win64cc i64 @peach() unnamed_addr #1 {
2323 entry-block:
2424 %0 = call i64 @banana()
2525 ret i64 %0
44 ; Win64 nonvolatile registers get saved.
55
66 ; CHECK-LABEL: bar:
7 define x86_64_win64cc void @bar(i32 %a, i32 %b) {
7 define win64cc void @bar(i32 %a, i32 %b) {
88 ; CHECK-DAG: pushq %rdi
99 ; CHECK-DAG: pushq %rsi
1010 ; CHECK-DAG: movaps %xmm6,
1111 ret i32 %add
1212 }
1313
14 define x86_64_win64cc i32 @f7(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6) nounwind readnone optsize {
14 define win64cc i32 @f7(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6) nounwind readnone optsize {
1515 entry:
1616 ; CHECK: movl 48(%rsp), %eax
1717 ; CHECK: addl 40(%rsp), %eax
5050
5151 ; Make sure we don't call __chkstk or __alloca on non-Windows even if the
5252 ; caller has the Win64 calling convention.
53 define x86_64_win64cc i32 @main4k_win64() nounwind {
53 define win64cc i32 @main4k_win64() nounwind {
5454 entry:
5555 ; WIN_X32: calll __chkstk
5656 ; WIN_X64: callq __chkstk
102102
103103 ; Make sure we don't emit the probe sequence if not on windows even if the
104104 ; caller has the Win64 calling convention.
105 define x86_64_win64cc i32 @main4k_win64() nounwind {
105 define win64cc i32 @main4k_win64() nounwind {
106106 entry:
107107 ; WIN_X64: movq %gs:16, %rcx
108108 ; LINUX-NOT: movq %gs:16, %rcx
114114 declare i32 @bar(i8*) nounwind
115115
116116 ; Within-body inline probe expansion
117 define x86_64_win64cc i32 @main4k_alloca(i64 %n) nounwind {
117 define win64cc i32 @main4k_alloca(i64 %n) nounwind {
118118 entry:
119119 ; WIN_X64: callq bar
120120 ; WIN_X64: movq %gs:16, [[R:%r.*]]
22 ; Verify that the var arg parameters which are passed in registers are stored
33 ; in home stack slots allocated by the caller and that AP is correctly
44 ; calculated.
5 define x86_64_win64cc void @average_va(i32 %count, ...) nounwind {
5 define win64cc void @average_va(i32 %count, ...) nounwind {
66 entry:
77 ; CHECK: pushq
88 ; CHECK: movq %r9, 40(%rsp)
2323 ; CHECK-LABEL: f5:
2424 ; CHECK: pushq
2525 ; CHECK: leaq 56(%rsp),
26 define x86_64_win64cc i8** @f5(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, ...) nounwind {
26 define win64cc i8** @f5(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, ...) nounwind {
2727 entry:
2828 %ap = alloca i8*, align 8
2929 %ap.0 = bitcast i8** %ap to i8*
3434 ; CHECK-LABEL: f4:
3535 ; CHECK: pushq
3636 ; CHECK: leaq 48(%rsp),
37 define x86_64_win64cc i8** @f4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
37 define win64cc i8** @f4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
3838 entry:
3939 %ap = alloca i8*, align 8
4040 %ap.0 = bitcast i8** %ap to i8*
4545 ; CHECK-LABEL: f3:
4646 ; CHECK: pushq
4747 ; CHECK: leaq 40(%rsp),
48 define x86_64_win64cc i8** @f3(i64 %a0, i64 %a1, i64 %a2, ...) nounwind {
48 define win64cc i8** @f3(i64 %a0, i64 %a1, i64 %a2, ...) nounwind {
4949 entry:
5050 %ap = alloca i8*, align 8
5151 %ap.0 = bitcast i8** %ap to i8*
6161 ; CHECK: movq [[REG_copy1]], 8(%rsp)
6262 ; CHECK: movq [[REG_copy1]], (%rsp)
6363 ; CHECK: ret
64 define x86_64_win64cc void @copy1(i64 %a0, ...) nounwind {
64 define win64cc void @copy1(i64 %a0, ...) nounwind {
6565 entry:
6666 %ap = alloca i8*, align 8
6767 %cp = alloca i8*, align 8
7777 ; CHECK: movq [[REG_copy4]], 8(%rsp)
7878 ; CHECK: movq [[REG_copy4]], (%rsp)
7979 ; CHECK: ret
80 define x86_64_win64cc void @copy4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
80 define win64cc void @copy4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
8181 entry:
8282 %ap = alloca i8*, align 8
8383 %cp = alloca i8*, align 8
9595 ; CHECK: movq [[REG_arg4_2]], (%rsp)
9696 ; CHECK: movl 48(%rsp), %eax
9797 ; CHECK: ret
98 define x86_64_win64cc i32 @arg4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
98 define win64cc i32 @arg4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
9999 entry:
100100 %ap = alloca i8*, align 8
101101 %ap.0 = bitcast i8** %ap to i8*
160160 \ within
161161 \ writeonly
162162 \ x86_64_sysvcc
163 \ x86_64_win64cc
163 \ win64cc
164164 \ x86_fastcallcc
165165 \ x86_stdcallcc
166166 \ x86_thiscallcc