llvm.org GIT mirror llvm / 6b9cd72
[SelectionDAG][X86] Support inline assembly returning an mmx register into a type with fewer than 64 bits. It's possible to use the 'y' mmx constraint with a type narrower than 64-bits. This patch supports this by bitcasting the mmx type to 64-bits and then truncating to the desired type. There are probably other missing type combinations we need to support, but this is the case we have a bug report for. Fixes PR41748. Differential Revision: https://reviews.llvm.org/D61582 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360069 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 1 year, 4 months ago
2 changed file(s) with 23 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
319319 DAG.getTargetConstant(1, DL, TLI.getPointerTy(DAG.getDataLayout())));
320320
321321 return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
322 }
323
324 // Handle MMX to a narrower integer type by bitcasting MMX to integer and
325 // then truncating.
326 if (PartEVT == MVT::x86mmx && ValueVT.isInteger() &&
327 ValueVT.bitsLT(PartEVT)) {
328 Val = DAG.getNode(ISD::BITCAST, DL, MVT::i64, Val);
329 return DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
322330 }
323331
324332 report_fatal_error("Unknown mismatch in getCopyFromParts!");
0 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
1 ; RUN: llc < %s -mtriple=x86_64-apple-macosx10.14.0 -mattr=mmx | FileCheck %s
2
3 define i32 @foo(i32 %a) {
4 ; CHECK-LABEL: foo:
5 ; CHECK: ## %bb.0: ## %entry
6 ; CHECK-NEXT: ## InlineAsm Start
7 ; CHECK-NEXT: movd %edi, %mm0
8 ; CHECK-NEXT: ## InlineAsm End
9 ; CHECK-NEXT: movd %mm0, %eax
10 ; CHECK-NEXT: retq
11 entry:
12 %0 = tail call i32 asm sideeffect "movd $1, $0", "=y,r,~{dirflag},~{fpsr},~{flags}"(i32 %a)
13 ret i32 %0
14 }