llvm.org GIT mirror llvm / 6aac92b
CXX_FAST_TLS calling convention: target independent portion. The access function has a short entry and a short exit, the initialization block is only run the first time. To improve the performance, we want to have a short frame at the entry and exit. We explicitly handle most of the CSRs via copies. Only the CSRs that are not handled via copies will be in CSR_SaveList. Frame lowering and prologue/epilogue insertion will generate a short frame in the entry and exit according to CSR_SaveList. The majority of the CSRs will be handled by register allcoator. Register allocator will try to spill and reload them in the initialization block. We add CSRsViaCopy, it will be explicitly handled during lowering. 1> we first set FunctionLoweringInfo->SplitCSR if conditions are met (the target supports it for the given calling convention and the function has only return exits). We also call TLI->initializeSplitCSR to perform initialization. 2> we call TLI->insertCopiesSplitCSR to insert copies from CSRsViaCopy to virtual registers at beginning of the entry block and copies from virtual registers to CSRsViaCopy at beginning of the exit blocks. 3> we also need to make sure the explicit copies will not be eliminated. rdar://problem/23557469 Differential Revision: http://reviews.llvm.org/D15340 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255353 91177308-0d34-0410-b5e6-96231b3b80d8 Manman Ren 4 years ago
4 changed file(s) with 67 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
6161 /// registers.
6262 bool CanLowerReturn;
6363
64 /// True if part of the CSRs will be handled via explicit copies.
65 bool SplitCSR;
66
6467 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
6568 /// allocated to hold a pointer to the hidden sret parameter.
6669 unsigned DemoteRegister;
22622262 return false;
22632263 }
22642264
2265 /// Return true if the target supports that a subset of CSRs for the given
2266 /// calling convention is handled explicitly via copies.
2267 virtual bool supportSplitCSR(CallingConv::ID CC) const {
2268 return false;
2269 }
2270
2271 /// Perform necessary initialization to handle a subset of CSRs explicitly
2272 /// via copies. This function is called at the beginning of instruction
2273 /// selection.
2274 virtual void initializeSplitCSR(MachineBasicBlock *Entry) const {
2275 llvm_unreachable("Not Implemented");
2276 }
2277
2278 /// Insert explicit copies in entry and exit blocks. We copy a subset of
2279 /// CSRs to virtual registers in the entry block, and copy them back to
2280 /// physical registers in the exit blocks. This function is called at the end
2281 /// of instruction selection.
2282 virtual void insertCopiesSplitCSR(
2283 MachineBasicBlock *Entry,
2284 const SmallVectorImpl &Exits) const {
2285 llvm_unreachable("Not Implemented");
2286 }
2287
22652288 //===--------------------------------------------------------------------===//
22662289 // Lowering methods - These methods must be implemented by targets so that
22672290 // the SelectionDAGBuilder code knows how to lower these.
424424 ///
425425 virtual const MCPhysReg*
426426 getCalleeSavedRegs(const MachineFunction *MF) const = 0;
427
428 virtual const MCPhysReg*
429 getCalleeSavedRegsViaCopy(const MachineFunction *MF) const {
430 return nullptr;
431 }
427432
428433 /// Return a mask of call-preserved registers for the given calling convention
429434 /// on the current function. The mask should include all call-preserved
466466
467467 MF->setHasInlineAsm(false);
468468
469 FuncInfo->SplitCSR = false;
470 SmallVector Returns;
471
472 // We split CSR if the target supports it for the given calling convention
473 // and the function has only return exits.
474 if (TLI->supportSplitCSR(Fn.getCallingConv())) {
475 FuncInfo->SplitCSR = true;
476
477 // Collect all the return blocks.
478 for (const BasicBlock &BB : Fn) {
479 if (!succ_empty(&BB))
480 continue;
481
482 const TerminatorInst *Term = BB.getTerminator();
483 if (isa(Term))
484 continue;
485 if (isa(Term)) {
486 Returns.push_back(FuncInfo->MBBMap[&BB]);
487 continue;
488 }
489
490 // Bail out if the exit block is not Return nor Unreachable.
491 FuncInfo->SplitCSR = false;
492 break;
493 }
494 }
495
496 MachineBasicBlock *EntryMBB = &MF->front();
497 if (FuncInfo->SplitCSR)
498 // This performs initialization so lowering for SplitCSR will be correct.
499 TLI->initializeSplitCSR(EntryMBB);
500
469501 SelectAllBasicBlocks(Fn);
470502
471503 // If the first basic block in the function has live ins that need to be
472504 // copied into vregs, emit the copies into the top of the block before
473505 // emitting the code for the block.
474 MachineBasicBlock *EntryMBB = &MF->front();
475506 const TargetRegisterInfo &TRI = *MF->getSubtarget().getRegisterInfo();
476507 RegInfo->EmitLiveInCopies(EntryMBB, TRI, *TII);
508
509 // Insert copies in the entry block and the return blocks.
510 if (FuncInfo->SplitCSR)
511 TLI->insertCopiesSplitCSR(EntryMBB, Returns);
477512
478513 DenseMap LiveInMap;
479514 if (!FuncInfo->ArgDbgValues.empty())