llvm.org GIT mirror llvm / 6a87003
Revert "For ARM stack frames that utilize variable sized objects and have either", it is breaking oggenc with Clang for ARMv6. This reverts commit 8d6e29cfda270be483abf638850311670829ee65. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112962 91177308-0d34-0410-b5e6-96231b3b80d8 Daniel Dunbar 10 years ago
5 changed file(s) with 36 addition(s) and 98 deletion(s). Raw diff Collapse all Expand all
4848 }
4949
5050 using namespace llvm;
51
52 static cl::opt
53 EnableBasePointer("arm-use-base-pointer", cl::Hidden, cl::init(true),
54 cl::desc("Enable use of a base pointer for complex stack frames"));
5551
5652 unsigned ARMBaseRegisterInfo::getRegisterNumbering(unsigned RegEnum,
5753 bool *isSPVFP) {
149145 const ARMSubtarget &sti)
150146 : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP),
151147 TII(tii), STI(sti),
152 FramePtr((STI.isTargetDarwin() || STI.isThumb()) ? ARM::R7 : ARM::R11),
153 BasePtr(ARM::R6) {
148 FramePtr((STI.isTargetDarwin() || STI.isThumb()) ? ARM::R7 : ARM::R11) {
154149 }
155150
156151 const unsigned*
186181 Reserved.set(ARM::FPSCR);
187182 if (hasFP(MF))
188183 Reserved.set(FramePtr);
189 if (hasBasePointer(MF))
190 Reserved.set(BasePtr);
191184 // Some targets reserve R9.
192185 if (STI.isR9Reserved())
193186 Reserved.set(ARM::R9);
201194 case ARM::SP:
202195 case ARM::PC:
203196 return true;
204 case ARM::R6:
205 if (hasBasePointer(MF))
206 return true;
207 break;
208197 case ARM::R7:
209198 case ARM::R11:
210199 if (FramePtr == Reg && hasFP(MF))
635624 MFI->isFrameAddressTaken());
636625 }
637626
638 bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
627 bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {
639628 const MachineFrameInfo *MFI = MF.getFrameInfo();
640629 const ARMFunctionInfo *AFI = MF.getInfo();
641
642 if (!EnableBasePointer)
643 return false;
644
645 if (needsStackRealignment(MF) && MFI->hasVarSizedObjects())
646 return true;
647
648 // Thumb has trouble with negative offsets from the FP. Thumb2 has a limited
649 // negative range for ldr/str (255), and thumb1 is positive offsets only.
650 // It's going to be better to use the SP or Base Pointer instead. When there
651 // are variable sized objects, we can't reference off of the SP, so we
652 // reserve a Base Pointer.
653 if (AFI->isThumbFunction() && MFI->hasVarSizedObjects()) {
654 // Conservatively estimate whether the negative offset from the frame
655 // pointer will be sufficient to reach. If a function has a smallish
656 // frame, it's less likely to have lots of spills and callee saved
657 // space, so it's all more likely to be within range of the frame pointer.
658 // If it's wrong, the scavenger will still enable access to work, it just
659 // won't be optimal.
660 if (AFI->isThumb2Function() && MFI->getLocalFrameSize() < 128)
661 return false;
662 return true;
663 }
664
665 return false;
666 }
667
668 bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {
669 const ARMFunctionInfo *AFI = MF.getInfo();
670 return (RealignStack && !AFI->isThumb1OnlyFunction());
630 return (RealignStack &&
631 !AFI->isThumb1OnlyFunction() &&
632 !MFI->hasVarSizedObjects());
671633 }
672634
673635 bool ARMBaseRegisterInfo::
674636 needsStackRealignment(const MachineFunction &MF) const {
675637 const MachineFrameInfo *MFI = MF.getFrameInfo();
676638 const Function *F = MF.getFunction();
639 const ARMFunctionInfo *AFI = MF.getInfo();
677640 unsigned StackAlign = MF.getTarget().getFrameInfo()->getStackAlignment();
678641 bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||
679642 F->hasFnAttr(Attribute::StackAlignment));
643
644 // FIXME: Currently we don't support stack realignment for functions with
645 // variable-sized allocas.
646 // FIXME: It's more complicated than this...
647 if (0 && requiresRealignment && MFI->hasVarSizedObjects())
648 report_fatal_error(
649 "Stack realignment in presense of dynamic allocas is not supported");
650
651 // FIXME: This probably isn't the right place for this.
652 if (0 && requiresRealignment && AFI->isThumb1OnlyFunction())
653 report_fatal_error(
654 "Stack realignment in thumb1 functions is not supported");
680655
681656 return requiresRealignment && canRealignStack(MF);
682657 }
799774 // Spill LR if Thumb1 function uses variable length argument lists.
800775 if (AFI->isThumb1OnlyFunction() && AFI->getVarArgsRegSaveSize() > 0)
801776 MF.getRegInfo().setPhysRegUsed(ARM::LR);
802
803 // Spill the BasePtr if it's used.
804 if (hasBasePointer(MF))
805 MF.getRegInfo().setPhysRegUsed(BasePtr);
806777
807778 // Don't spill FP if the frame can be eliminated. This is determined
808779 // by scanning the callee-save registers to see if any is used.
10501021 return Offset - AFI->getDPRCalleeSavedAreaOffset();
10511022
10521023 // When dynamically realigning the stack, use the frame pointer for
1053 // parameters, and the stack/base pointer for locals.
1024 // parameters, and the stack pointer for locals.
10541025 if (needsStackRealignment(MF)) {
10551026 assert (hasFP(MF) && "dynamic stack realignment without a FP!");
10561027 if (isFixed) {
10571028 FrameReg = getFrameRegister(MF);
10581029 Offset = FPOffset;
1059 } else if (MFI->hasVarSizedObjects())
1060 FrameReg = BasePtr;
1030 }
10611031 return Offset;
10621032 }
10631033
10651035 if (hasFP(MF) && AFI->hasStackFrame()) {
10661036 // Use frame pointer to reference fixed objects. Use it for locals if
10671037 // there are VLAs (and thus the SP isn't reliable as a base).
1068 if (isFixed || (MFI->hasVarSizedObjects() && !hasBasePointer(MF))) {
1038 if (isFixed || MFI->hasVarSizedObjects()) {
10691039 FrameReg = getFrameRegister(MF);
10701040 Offset = FPOffset;
1071 } else if (MFI->hasVarSizedObjects()) {
1072 assert(hasBasePointer(MF) && "missing base pointer!");
1073 // Use the base register since we have it.
1074 FrameReg = BasePtr;
10751041 } else if (AFI->isThumb2Function()) {
10761042 // In Thumb2 mode, the negative offset is very limited. Try to avoid
10771043 // out of range references.
10851051 Offset = FPOffset;
10861052 }
10871053 }
1088 // Use the base pointer if we have one.
1089 if (hasBasePointer(MF))
1090 FrameReg = BasePtr;
10911054 return Offset;
10921055 }
10931056
11251088 case ARM::R5:
11261089 return ARM::R4;
11271090 case ARM::R7:
1128 return (isReservedReg(MF, ARM::R7) || isReservedReg(MF, ARM::R6))
1129 ? 0 : ARM::R6;
1091 return isReservedReg(MF, ARM::R7) ? 0 : ARM::R6;
11301092 case ARM::R9:
11311093 return isReservedReg(MF, ARM::R9) ? 0 :ARM::R8;
11321094 case ARM::R11:
12151177 case ARM::R4:
12161178 return ARM::R5;
12171179 case ARM::R6:
1218 return (isReservedReg(MF, ARM::R7) || isReservedReg(MF, ARM::R6))
1219 ? 0 : ARM::R7;
1180 return isReservedReg(MF, ARM::R7) ? 0 : ARM::R7;
12201181 case ARM::R8:
12211182 return isReservedReg(MF, ARM::R9) ? 0 :ARM::R9;
12221183 case ARM::R10:
19161877 AFI->setShouldRestoreSPFromFP(true);
19171878 }
19181879
1919 // If we need a base pointer, set it up here. It's whatever the value
1920 // of the stack pointer is at this point. Any variable size objects
1921 // will be allocated after this, so we can still use the base pointer
1922 // to reference locals.
1923 if (hasBasePointer(MF)) {
1924 if (isARM)
1925 BuildMI(MBB, MBBI, dl, TII.get(ARM::MOVr), BasePtr)
1926 .addReg(ARM::SP)
1927 .addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
1928 else
1929 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVgpr2gpr), BasePtr)
1930 .addReg(ARM::SP);
1931 }
1932
19331880 // If the frame has variable sized objects then the epilogue must restore
19341881 // the sp from fp.
19351882 if (!AFI->shouldRestoreSPFromFP() && MFI->hasVarSizedObjects())
5151 /// FramePtr - ARM physical register used as frame ptr.
5252 unsigned FramePtr;
5353
54 /// BasePtr - ARM physical register used as a base ptr in complex stack
55 /// frames. I.e., when we need a 3rd base, not just SP and FP, due to
56 /// variable size stack objects.
57 unsigned BasePtr;
58
5954 // Can be only subclassed.
6055 explicit ARMBaseRegisterInfo(const ARMBaseInstrInfo &tii,
6156 const ARMSubtarget &STI);
106101 MachineFunction &MF) const;
107102
108103 bool hasFP(const MachineFunction &MF) const;
109 bool hasBasePointer(const MachineFunction &MF) const;
110104
111105 bool canRealignStack(const MachineFunction &MF) const;
112106 bool needsStackRealignment(const MachineFunction &MF) const;
603603 else if (MF.getFrameInfo()->hasVarSizedObjects()) {
604604 assert(SPAdj == 0 && hasFP(MF) && "Unexpected");
605605 // There are alloca()'s in this function, must reference off the frame
606 // pointer or base pointer instead.
607 if (!hasBasePointer(MF)) {
608 FrameReg = getFrameRegister(MF);
609 Offset -= AFI->getFramePtrSpillOffset();
610 } else
611 FrameReg = BasePtr;
606 // pointer instead.
607 FrameReg = getFrameRegister(MF);
608 Offset -= AFI->getFramePtrSpillOffset();
612609 }
613610
614611 // Special handling of dbg_value instructions.
789786 AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
790787 AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
791788 AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
792
793 // If we need a base pointer, set it up here. It's whatever the value
794 // of the stack pointer is at this point. Any variable size objects
795 // will be allocated after this, so we can still use the base pointer
796 // to reference locals.
797 if (hasBasePointer(MF))
798 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVgpr2gpr), BasePtr).addReg(ARM::SP);
799789 }
800790
801791 static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) {
0 ; RUN: llc < %s -march=thumb | not grep {ldr sp}
11 ; RUN: llc < %s -mtriple=thumb-apple-darwin | \
22 ; RUN: not grep {sub.*r7}
3 ; RUN: llc < %s -march=thumb | grep {mov.*r6, sp}
3 ; RUN: llc < %s -march=thumb | grep 4294967280
44
55 %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
66 %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
66 define void @t() nounwind ssp {
77 entry:
88 ; CHECK: t:
9 %size = mul i32 8, 2
9 ; CHECK: push {r4, r7}
10 ; CHECK: mov r0, sp
11 ; CHECK: add r7, sp, #4
12 ; CHECK: bic r0, r0, #7
1013 ; CHECK: subs r0, #16
1114 ; CHECK: mov sp, r0
12 %vla_a = alloca i8, i32 %size, align 8
15 ; CHECK: mov r0, sp
16 ; CHECK: bic r0, r0, #7
1317 ; CHECK: subs r0, #16
1418 ; CHECK: mov sp, r0
19
20 %size = mul i32 8, 2
21 %vla_a = alloca i8, i32 %size, align 8
1522 %vla_b = alloca i8, i32 %size, align 8
1623 unreachable
1724 }