llvm.org GIT mirror llvm / 6a29a22
AMDGPU: Add most d16 load/store instruction definitions Doesn't include the tied operand necessary for the loads, but is enough for the assembler to work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312347 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 2 years ago
10 changed file(s) with 311 addition(s) and 15 deletion(s). Raw diff Collapse all Expand all
691691 AssemblerPredicate<"FeatureFlatGlobalInsts">;
692692 def HasFlatScratchInsts : Predicate<"Subtarget->hasFlatScratchInsts()">,
693693 AssemblerPredicate<"FeatureFlatScratchInsts">;
694 def HasD16LoadStore : Predicate<"Subtarget->hasD16LoadStore()">,
695 AssemblerPredicate<"FeatureGFX9Insts">;
694696
695697 def HasAddNoCarryInsts : Predicate<"Subtarget->hasAddNoCarryInsts()">,
696698 AssemblerPredicate<"FeatureAddNoCarryInsts">;
426426 return FlatScratchInsts;
427427 }
428428
429 bool hasD16LoadStore() const {
430 return getGeneration() >= GFX9;
431 }
432
429433 bool hasAddNoCarry() const {
430434 return AddNoCarryInsts;
431435 }
803803 def BUFFER_WBINVL1_SC : MUBUF_Invalidate <"buffer_wbinvl1_sc",
804804 int_amdgcn_buffer_wbinvl1_sc>;
805805 }
806
807 let SubtargetPredicate = HasD16LoadStore in {
808
809 defm BUFFER_LOAD_UBYTE_D16 : MUBUF_Pseudo_Loads <
810 "buffer_load_ubyte_d16", VGPR_32, i32
811 >;
812
813 defm BUFFER_LOAD_UBYTE_D16_HI : MUBUF_Pseudo_Loads <
814 "buffer_load_ubyte_d16_hi", VGPR_32, i32
815 >;
816
817 defm BUFFER_LOAD_SBYTE_D16 : MUBUF_Pseudo_Loads <
818 "buffer_load_sbyte_d16", VGPR_32, i32
819 >;
820
821 defm BUFFER_LOAD_SBYTE_D16_HI : MUBUF_Pseudo_Loads <
822 "buffer_load_sbyte_d16_hi", VGPR_32, i32
823 >;
824
825 defm BUFFER_LOAD_SHORT_D16 : MUBUF_Pseudo_Loads <
826 "buffer_load_short_d16", VGPR_32, i32
827 >;
828
829 defm BUFFER_LOAD_SHORT_D16_HI : MUBUF_Pseudo_Loads <
830 "buffer_load_short_d16_hi", VGPR_32, i32
831 >;
832
833 defm BUFFER_STORE_BYTE_D16_HI : MUBUF_Pseudo_Stores <
834 "buffer_store_byte_d16_hi", VGPR_32, i32
835 >;
836
837 defm BUFFER_STORE_SHORT_D16_HI : MUBUF_Pseudo_Stores <
838 "buffer_store_short_d16_hi", VGPR_32, i32
839 >;
840
841 } // End HasD16LoadStore
806842
807843 def BUFFER_WBINVL1 : MUBUF_Invalidate <"buffer_wbinvl1",
808844 int_amdgcn_buffer_wbinvl1>;
15451581 defm BUFFER_LOAD_DWORDX3 : MUBUF_Real_AllAddr_vi <0x16>;
15461582 defm BUFFER_LOAD_DWORDX4 : MUBUF_Real_AllAddr_vi <0x17>;
15471583 defm BUFFER_STORE_BYTE : MUBUF_Real_AllAddr_vi <0x18>;
1584 defm BUFFER_STORE_BYTE_D16_HI : MUBUF_Real_AllAddr_vi <0x19>;
15481585 defm BUFFER_STORE_SHORT : MUBUF_Real_AllAddr_vi <0x1a>;
1586 defm BUFFER_STORE_SHORT_D16_HI : MUBUF_Real_AllAddr_vi <0x1b>;
15491587 defm BUFFER_STORE_DWORD : MUBUF_Real_AllAddr_vi <0x1c>;
15501588 defm BUFFER_STORE_DWORDX2 : MUBUF_Real_AllAddr_vi <0x1d>;
15511589 defm BUFFER_STORE_DWORDX3 : MUBUF_Real_AllAddr_vi <0x1e>;
15521590 defm BUFFER_STORE_DWORDX4 : MUBUF_Real_AllAddr_vi <0x1f>;
1591
1592 defm BUFFER_LOAD_UBYTE_D16 : MUBUF_Real_AllAddr_vi <0x20>;
1593 defm BUFFER_LOAD_UBYTE_D16_HI : MUBUF_Real_AllAddr_vi <0x21>;
1594 defm BUFFER_LOAD_SBYTE_D16 : MUBUF_Real_AllAddr_vi <0x22>;
1595 defm BUFFER_LOAD_SBYTE_D16_HI : MUBUF_Real_AllAddr_vi <0x23>;
1596 defm BUFFER_LOAD_SHORT_D16 : MUBUF_Real_AllAddr_vi <0x24>;
1597 defm BUFFER_LOAD_SHORT_D16_HI : MUBUF_Real_AllAddr_vi <0x25>;
15531598
15541599 defm BUFFER_ATOMIC_SWAP : MUBUF_Real_Atomic_vi <0x40>;
15551600 defm BUFFER_ATOMIC_CMPSWAP : MUBUF_Real_Atomic_vi <0x41>;
284284 def DS_WRITE_B32 : DS_1A1D_NORET<"ds_write_b32">;
285285 def DS_WRITE2_B32 : DS_1A2D_Off8_NORET<"ds_write2_b32">;
286286 def DS_WRITE2ST64_B32 : DS_1A2D_Off8_NORET<"ds_write2st64_b32">;
287
288 let SubtargetPredicate = HasD16LoadStore in {
289 def DS_WRITE_B8_D16_HI : DS_1A1D_NORET<"ds_write_b8_d16_hi">;
290 def DS_WRITE_B16_D16_HI : DS_1A1D_NORET<"ds_write_b16_d16_hi">;
291 }
292
287293 }
288294
289295 def DS_MSKOR_B32 : DS_1A2D_NORET<"ds_mskor_b32">;
455461
456462 def DS_READ2_B64 : DS_1A_Off8_RET<"ds_read2_b64", VReg_128>;
457463 def DS_READ2ST64_B64 : DS_1A_Off8_RET<"ds_read2st64_b64", VReg_128>;
464
465 let SubtargetPredicate = HasD16LoadStore in {
466 def DS_READ_U8_D16 : DS_1A_RET<"ds_read_u8_d16">;
467 def DS_READ_U8_D16_HI : DS_1A_RET<"ds_read_u8_d16_hi">;
468 def DS_READ_I8_D16 : DS_1A_RET<"ds_read_i8_d16">;
469 def DS_READ_I8_D16_HI : DS_1A_RET<"ds_read_i8_d16_hi">;
470 def DS_READ_U16_D16 : DS_1A_RET<"ds_read_u16_d16">;
471 def DS_READ_U16_D16_HI : DS_1A_RET<"ds_read_u16_d16_hi">;
472 }
458473 }
459474
460475 def DS_CONSUME : DS_0A_RET<"ds_consume">;
892907 def DS_MIN_F64_vi : DS_Real_vi<0x52, DS_MIN_F64>;
893908 def DS_MAX_F64_vi : DS_Real_vi<0x53, DS_MAX_F64>;
894909
910 def DS_WRITE_B8_D16_HI_vi : DS_Real_vi<0x54, DS_WRITE_B8_D16_HI>;
911 def DS_WRITE_B16_D16_HI_vi : DS_Real_vi<0x55, DS_WRITE_B16_D16_HI>;
912
913 def DS_READ_U8_D16_vi : DS_Real_vi<0x56, DS_READ_U8_D16>;
914 def DS_READ_U8_D16_HI_vi : DS_Real_vi<0x57, DS_READ_U8_D16_HI>;
915 def DS_READ_I8_D16_vi : DS_Real_vi<0x58, DS_READ_I8_D16>;
916 def DS_READ_I8_D16_HI_vi : DS_Real_vi<0x59, DS_READ_I8_D16_HI>;
917 def DS_READ_U16_D16_vi : DS_Real_vi<0x5a, DS_READ_U16_D16>;
918 def DS_READ_U16_D16_HI_vi : DS_Real_vi<0x5b, DS_READ_U16_D16_HI>;
919
895920 def DS_ADD_RTN_U64_vi : DS_Real_vi<0x60, DS_ADD_RTN_U64>;
896921 def DS_SUB_RTN_U64_vi : DS_Real_vi<0x61, DS_SUB_RTN_U64>;
897922 def DS_RSUB_RTN_U64_vi : DS_Real_vi<0x62, DS_RSUB_RTN_U64>;
360360 def FLAT_STORE_DWORDX4 : FLAT_Store_Pseudo <"flat_store_dwordx4", VReg_128>;
361361 def FLAT_STORE_DWORDX3 : FLAT_Store_Pseudo <"flat_store_dwordx3", VReg_96>;
362362
363 let SubtargetPredicate = HasD16LoadStore in {
364 def FLAT_LOAD_UBYTE_D16 : FLAT_Load_Pseudo <"flat_load_ubyte_d16", VGPR_32>;
365 def FLAT_LOAD_UBYTE_D16_HI : FLAT_Load_Pseudo <"flat_load_ubyte_d16_hi", VGPR_32>;
366 def FLAT_LOAD_SBYTE_D16 : FLAT_Load_Pseudo <"flat_load_sbyte_d16", VGPR_32>;
367 def FLAT_LOAD_SBYTE_D16_HI : FLAT_Load_Pseudo <"flat_load_sbyte_d16_hi", VGPR_32>;
368 def FLAT_LOAD_SHORT_D16 : FLAT_Load_Pseudo <"flat_load_short_d16", VGPR_32>;
369 def FLAT_LOAD_SHORT_D16_HI : FLAT_Load_Pseudo <"flat_load_short_d16_hi", VGPR_32>;
370
371 def FLAT_STORE_BYTE_D16_HI : FLAT_Store_Pseudo <"flat_store_byte_d16_hi", VGPR_32>;
372 def FLAT_STORE_SHORT_D16_HI : FLAT_Store_Pseudo <"flat_store_short_d16_hi", VGPR_32>;
373 }
374
363375 defm FLAT_ATOMIC_CMPSWAP : FLAT_Atomic_Pseudo <"flat_atomic_cmpswap",
364376 VGPR_32, i32, atomic_cmp_swap_flat,
365377 v2i32, VReg_64>;
472484 defm GLOBAL_LOAD_DWORDX3 : FLAT_Global_Load_Pseudo <"global_load_dwordx3", VReg_96>;
473485 defm GLOBAL_LOAD_DWORDX4 : FLAT_Global_Load_Pseudo <"global_load_dwordx4", VReg_128>;
474486
487 defm GLOBAL_LOAD_UBYTE_D16 : FLAT_Global_Load_Pseudo <"global_load_ubyte_d16", VGPR_32>;
488 defm GLOBAL_LOAD_UBYTE_D16_HI : FLAT_Global_Load_Pseudo <"global_load_ubyte_d16_hi", VGPR_32>;
489 defm GLOBAL_LOAD_SBYTE_D16 : FLAT_Global_Load_Pseudo <"global_load_sbyte_d16", VGPR_32>;
490 defm GLOBAL_LOAD_SBYTE_D16_HI : FLAT_Global_Load_Pseudo <"global_load_sbyte_d16_hi", VGPR_32>;
491 defm GLOBAL_LOAD_SHORT_D16 : FLAT_Global_Load_Pseudo <"global_load_short_d16", VGPR_32>;
492 defm GLOBAL_LOAD_SHORT_D16_HI : FLAT_Global_Load_Pseudo <"global_load_short_d16_hi", VGPR_32>;
493
475494 defm GLOBAL_STORE_BYTE : FLAT_Global_Store_Pseudo <"global_store_byte", VGPR_32>;
476495 defm GLOBAL_STORE_SHORT : FLAT_Global_Store_Pseudo <"global_store_short", VGPR_32>;
477496 defm GLOBAL_STORE_DWORD : FLAT_Global_Store_Pseudo <"global_store_dword", VGPR_32>;
479498 defm GLOBAL_STORE_DWORDX3 : FLAT_Global_Store_Pseudo <"global_store_dwordx3", VReg_96>;
480499 defm GLOBAL_STORE_DWORDX4 : FLAT_Global_Store_Pseudo <"global_store_dwordx4", VReg_128>;
481500
501 defm GLOBAL_STORE_BYTE_D16_HI : FLAT_Global_Store_Pseudo <"global_store_byte_d16_hi", VGPR_32>;
502 defm GLOBAL_STORE_SHORT_D16_HI : FLAT_Global_Store_Pseudo <"global_store_short_d16_hi", VGPR_32>;
482503
483504 let is_flat_global = 1 in {
484505 defm GLOBAL_ATOMIC_CMPSWAP : FLAT_Global_Atomic_Pseudo <"global_atomic_cmpswap",
575596 defm SCRATCH_LOAD_DWORDX3 : FLAT_Scratch_Load_Pseudo <"scratch_load_dwordx3", VReg_96>;
576597 defm SCRATCH_LOAD_DWORDX4 : FLAT_Scratch_Load_Pseudo <"scratch_load_dwordx4", VReg_128>;
577598
599 defm SCRATCH_LOAD_UBYTE_D16 : FLAT_Scratch_Load_Pseudo <"scratch_load_ubyte_d16", VGPR_32>;
600 defm SCRATCH_LOAD_UBYTE_D16_HI : FLAT_Scratch_Load_Pseudo <"scratch_load_ubyte_d16_hi", VGPR_32>;
601 defm SCRATCH_LOAD_SBYTE_D16 : FLAT_Scratch_Load_Pseudo <"scratch_load_sbyte_d16", VGPR_32>;
602 defm SCRATCH_LOAD_SBYTE_D16_HI : FLAT_Scratch_Load_Pseudo <"scratch_load_sbyte_d16_hi", VGPR_32>;
603 defm SCRATCH_LOAD_SHORT_D16 : FLAT_Scratch_Load_Pseudo <"scratch_load_short_d16", VGPR_32>;
604 defm SCRATCH_LOAD_SHORT_D16_HI : FLAT_Scratch_Load_Pseudo <"scratch_load_short_d16_hi", VGPR_32>;
605
578606 defm SCRATCH_STORE_BYTE : FLAT_Scratch_Store_Pseudo <"scratch_store_byte", VGPR_32>;
579607 defm SCRATCH_STORE_SHORT : FLAT_Scratch_Store_Pseudo <"scratch_store_short", VGPR_32>;
580608 defm SCRATCH_STORE_DWORD : FLAT_Scratch_Store_Pseudo <"scratch_store_dword", VGPR_32>;
581609 defm SCRATCH_STORE_DWORDX2 : FLAT_Scratch_Store_Pseudo <"scratch_store_dwordx2", VReg_64>;
582610 defm SCRATCH_STORE_DWORDX3 : FLAT_Scratch_Store_Pseudo <"scratch_store_dwordx3", VReg_96>;
583611 defm SCRATCH_STORE_DWORDX4 : FLAT_Scratch_Store_Pseudo <"scratch_store_dwordx4", VReg_128>;
612
613 defm SCRATCH_STORE_BYTE_D16_HI : FLAT_Scratch_Store_Pseudo <"scratch_store_byte_d16_hi", VGPR_32>;
614 defm SCRATCH_STORE_SHORT_D16_HI : FLAT_Scratch_Store_Pseudo <"scratch_store_short_d16_hi", VGPR_32>;
584615
585616 } // End SubtargetPredicate = HasFlatScratchInsts
586617
880911 def FLAT_LOAD_DWORDX3_vi : FLAT_Real_vi <0x16, FLAT_LOAD_DWORDX3>;
881912
882913 def FLAT_STORE_BYTE_vi : FLAT_Real_vi <0x18, FLAT_STORE_BYTE>;
914 def FLAT_STORE_BYTE_D16_HI_vi : FLAT_Real_vi <0x19, FLAT_STORE_BYTE_D16_HI>;
883915 def FLAT_STORE_SHORT_vi : FLAT_Real_vi <0x1a, FLAT_STORE_SHORT>;
916 def FLAT_STORE_SHORT_D16_HI_vi : FLAT_Real_vi <0x1b, FLAT_STORE_SHORT_D16_HI>;
884917 def FLAT_STORE_DWORD_vi : FLAT_Real_vi <0x1c, FLAT_STORE_DWORD>;
885918 def FLAT_STORE_DWORDX2_vi : FLAT_Real_vi <0x1d, FLAT_STORE_DWORDX2>;
886919 def FLAT_STORE_DWORDX4_vi : FLAT_Real_vi <0x1f, FLAT_STORE_DWORDX4>;
887920 def FLAT_STORE_DWORDX3_vi : FLAT_Real_vi <0x1e, FLAT_STORE_DWORDX3>;
921
922 def FLAT_LOAD_UBYTE_D16_vi : FLAT_Real_vi <0x20, FLAT_LOAD_UBYTE_D16>;
923 def FLAT_LOAD_UBYTE_D16_HI_vi : FLAT_Real_vi <0x21, FLAT_LOAD_UBYTE_D16_HI>;
924 def FLAT_LOAD_SBYTE_D16_vi : FLAT_Real_vi <0x22, FLAT_LOAD_SBYTE_D16>;
925 def FLAT_LOAD_SBYTE_D16_HI_vi : FLAT_Real_vi <0x23, FLAT_LOAD_SBYTE_D16_HI>;
926 def FLAT_LOAD_SHORT_D16_vi : FLAT_Real_vi <0x24, FLAT_LOAD_SHORT_D16>;
927 def FLAT_LOAD_SHORT_D16_HI_vi : FLAT_Real_vi <0x25, FLAT_LOAD_SHORT_D16_HI>;
888928
889929 multiclass FLAT_Real_Atomics_vi op, FLAT_Pseudo ps> {
890930 def _vi : FLAT_Real_vi(ps.PseudoInstr)>;
934974 defm GLOBAL_LOAD_DWORDX3 : FLAT_Real_AllAddr_vi <0x16>;
935975 defm GLOBAL_LOAD_DWORDX4 : FLAT_Real_AllAddr_vi <0x17>;
936976
977 defm GLOBAL_LOAD_UBYTE_D16 : FLAT_Real_AllAddr_vi <0x20>;
978 defm GLOBAL_LOAD_UBYTE_D16_HI : FLAT_Real_AllAddr_vi <0x21>;
979 defm GLOBAL_LOAD_SBYTE_D16 : FLAT_Real_AllAddr_vi <0x22>;
980 defm GLOBAL_LOAD_SBYTE_D16_HI : FLAT_Real_AllAddr_vi <0x23>;
981 defm GLOBAL_LOAD_SHORT_D16 : FLAT_Real_AllAddr_vi <0x24>;
982 defm GLOBAL_LOAD_SHORT_D16_HI : FLAT_Real_AllAddr_vi <0x25>;
983
937984 defm GLOBAL_STORE_BYTE : FLAT_Real_AllAddr_vi <0x18>;
985 defm GLOBAL_STORE_BYTE_D16_HI : FLAT_Real_AllAddr_vi <0x19>;
938986 defm GLOBAL_STORE_SHORT : FLAT_Real_AllAddr_vi <0x1a>;
987 defm GLOBAL_STORE_SHORT_D16_HI : FLAT_Real_AllAddr_vi <0x1b>;
939988 defm GLOBAL_STORE_DWORD : FLAT_Real_AllAddr_vi <0x1c>;
940989 defm GLOBAL_STORE_DWORDX2 : FLAT_Real_AllAddr_vi <0x1d>;
941990 defm GLOBAL_STORE_DWORDX3 : FLAT_Real_AllAddr_vi <0x1e>;
9691018 defm GLOBAL_ATOMIC_INC_X2 : FLAT_Global_Real_Atomics_vi <0x6b>;
9701019 defm GLOBAL_ATOMIC_DEC_X2 : FLAT_Global_Real_Atomics_vi <0x6c>;
9711020
972 defm SCRATCH_LOAD_UBYTE : FLAT_Real_AllAddr_vi <0x10>;
973 defm SCRATCH_LOAD_SBYTE : FLAT_Real_AllAddr_vi <0x11>;
974 defm SCRATCH_LOAD_USHORT : FLAT_Real_AllAddr_vi <0x12>;
975 defm SCRATCH_LOAD_SSHORT : FLAT_Real_AllAddr_vi <0x13>;
976 defm SCRATCH_LOAD_DWORD : FLAT_Real_AllAddr_vi <0x14>;
977 defm SCRATCH_LOAD_DWORDX2 : FLAT_Real_AllAddr_vi <0x15>;
978 defm SCRATCH_LOAD_DWORDX4 : FLAT_Real_AllAddr_vi <0x17>;
979 defm SCRATCH_LOAD_DWORDX3 : FLAT_Real_AllAddr_vi <0x16>;
980
981 defm SCRATCH_STORE_BYTE : FLAT_Real_AllAddr_vi <0x18>;
982 defm SCRATCH_STORE_SHORT : FLAT_Real_AllAddr_vi <0x1a>;
983 defm SCRATCH_STORE_DWORD : FLAT_Real_AllAddr_vi <0x1c>;
984 defm SCRATCH_STORE_DWORDX2 : FLAT_Real_AllAddr_vi <0x1d>;
985 defm SCRATCH_STORE_DWORDX4 : FLAT_Real_AllAddr_vi <0x1f>;
986 defm SCRATCH_STORE_DWORDX3 : FLAT_Real_AllAddr_vi <0x1e>;
1021 defm SCRATCH_LOAD_UBYTE : FLAT_Real_AllAddr_vi <0x10>;
1022 defm SCRATCH_LOAD_SBYTE : FLAT_Real_AllAddr_vi <0x11>;
1023 defm SCRATCH_LOAD_USHORT : FLAT_Real_AllAddr_vi <0x12>;
1024 defm SCRATCH_LOAD_SSHORT : FLAT_Real_AllAddr_vi <0x13>;
1025 defm SCRATCH_LOAD_DWORD : FLAT_Real_AllAddr_vi <0x14>;
1026 defm SCRATCH_LOAD_DWORDX2 : FLAT_Real_AllAddr_vi <0x15>;
1027 defm SCRATCH_LOAD_DWORDX3 : FLAT_Real_AllAddr_vi <0x16>;
1028 defm SCRATCH_LOAD_DWORDX4 : FLAT_Real_AllAddr_vi <0x17>;
1029 defm SCRATCH_STORE_BYTE : FLAT_Real_AllAddr_vi <0x18>;
1030 defm SCRATCH_STORE_BYTE_D16_HI : FLAT_Real_AllAddr_vi <0x19>;
1031 defm SCRATCH_LOAD_UBYTE_D16 : FLAT_Real_AllAddr_vi <0x20>;
1032 defm SCRATCH_LOAD_UBYTE_D16_HI : FLAT_Real_AllAddr_vi <0x21>;
1033 defm SCRATCH_LOAD_SBYTE_D16 : FLAT_Real_AllAddr_vi <0x22>;
1034 defm SCRATCH_LOAD_SBYTE_D16_HI : FLAT_Real_AllAddr_vi <0x23>;
1035 defm SCRATCH_LOAD_SHORT_D16 : FLAT_Real_AllAddr_vi <0x24>;
1036 defm SCRATCH_LOAD_SHORT_D16_HI : FLAT_Real_AllAddr_vi <0x25>;
1037 defm SCRATCH_STORE_SHORT : FLAT_Real_AllAddr_vi <0x1a>;
1038 defm SCRATCH_STORE_SHORT_D16_HI : FLAT_Real_AllAddr_vi <0x1b>;
1039 defm SCRATCH_STORE_DWORD : FLAT_Real_AllAddr_vi <0x1c>;
1040 defm SCRATCH_STORE_DWORDX2 : FLAT_Real_AllAddr_vi <0x1d>;
1041 defm SCRATCH_STORE_DWORDX3 : FLAT_Real_AllAddr_vi <0x1e>;
1042 defm SCRATCH_STORE_DWORDX4 : FLAT_Real_AllAddr_vi <0x1f>;
0 // RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
1 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding 2>&1 %s | FileCheck -check-prefix=VI-ERR -check-prefix=GCNERR %s
2
3 ds_read_u8_d16 v8, v2
4 // GFX9: ds_read_u8_d16 v8, v2 ; encoding: [0x00,0x00,0xac,0xd8,0x02,0x00,0x00,0x08]
5 // VI-ERR: error: instruction not supported on this GPU
6
7 ds_read_u8_d16_hi v8, v2
8 // GFX9: ds_read_u8_d16_hi v8, v2 ; encoding: [0x00,0x00,0xae,0xd8,0x02,0x00,0x00,0x08]
9 // VI-ERR: error: instruction not supported on this GPU
10
11 ds_read_i8_d16 v8, v2
12 // GFX9: ds_read_i8_d16 v8, v2 ; encoding: [0x00,0x00,0xb0,0xd8,0x02,0x00,0x00,0x08]
13 // VI-ERR: error: instruction not supported on this GPU
14
15 ds_read_i8_d16_hi v8, v2
16 // GFX9: ds_read_i8_d16_hi v8, v2 ; encoding: [0x00,0x00,0xb2,0xd8,0x02,0x00,0x00,0x08]
17 // VI-ERR: error: instruction not supported on this GPU
18
19 ds_read_u16_d16 v8, v2
20 // GFX9: ds_read_u16_d16 v8, v2 ; encoding: [0x00,0x00,0xb4,0xd8,0x02,0x00,0x00,0x08]
21 // VI-ERR: error: instruction not supported on this GPU
22
23 ds_read_u16_d16_hi v8, v2
24 // GFX9: ds_read_u16_d16_hi v8, v2 ; encoding: [0x00,0x00,0xb6,0xd8,0x02,0x00,0x00,0x08]
25 // VI-ERR: error: instruction not supported on this GPU
26
27 ds_write_b8_d16_hi v8, v2
28 // VI-ERR: error: instruction not supported on this GPU
29 // GFX9: ds_write_b8_d16_hi v8, v2 ; encoding: [0x00,0x00,0xa8,0xd8,0x08,0x02,0x00,0x00]
30
31 ds_write_b16_d16_hi v8, v2
32 // VI-ERR: error: instruction not supported on this GPU
33 // GFX9: ds_write_b16_d16_hi v8, v2 ; encoding: [0x00,0x00,0xaa,0xd8,0x08,0x02,0x00,0x00]
6161
6262 flat_store_dword v[3:4], v1, exec_hi
6363 // GCNERR: :30: error: invalid operand for instruction
64
65 flat_load_ubyte_d16 v1, v[3:4]
66 // GFX9: flat_load_ubyte_d16 v1, v[3:4] ; encoding: [0x00,0x00,0x80,0xdc,0x03,0x00,0x00,0x01]
67 // VI-ERR: error: instruction not supported on this GPU
68
69 flat_load_ubyte_d16_hi v1, v[3:4]
70 // GFX9: flat_load_ubyte_d16_hi v1, v[3:4] ; encoding: [0x00,0x00,0x84,0xdc,0x03,0x00,0x00,0x01]
71 // VI-ERR: error: instruction not supported on this GPU
72
73 flat_load_sbyte_d16 v1, v[3:4]
74 // GFX9: flat_load_sbyte_d16 v1, v[3:4] ; encoding: [0x00,0x00,0x88,0xdc,0x03,0x00,0x00,0x01]
75 // VI-ERR: error: instruction not supported on this GPU
76
77 flat_load_sbyte_d16_hi v1, v[3:4]
78 // GFX9: flat_load_sbyte_d16_hi v1, v[3:4] ; encoding: [0x00,0x00,0x8c,0xdc,0x03,0x00,0x00,0x01]
79 // VI-ERR: error: instruction not supported on this GPU
80
81 flat_load_short_d16 v1, v[3:4]
82 // GFX9: flat_load_short_d16 v1, v[3:4] ; encoding: [0x00,0x00,0x90,0xdc,0x03,0x00,0x00,0x01]
83 // VI-ERR: error: instruction not supported on this GPU
84
85 flat_load_short_d16_hi v1, v[3:4]
86 // GFX9: flat_load_short_d16_hi v1, v[3:4] ; encoding: [0x00,0x00,0x94,0xdc,0x03,0x00,0x00,0x01]
87 // VI-ERR: error: instruction not supported on this GPU
88
89 flat_store_byte_d16_hi v[3:4], v1
90 // GFX9: flat_store_byte_d16_hi v[3:4], v1 ; encoding: [0x00,0x00,0x64,0xdc,0x03,0x01,0x00,0x00]
91 // VI-ERR: error: instruction not supported on this GPU
92
93 flat_store_short_d16_hi v[3:4], v1
94 // GFX9: flat_store_short_d16_hi v[3:4], v1 ; encoding: [0x00,0x00,0x6c,0xdc,0x03,0x01,0x00,0x00
95 // VI-ERR: error: instruction not supported on this GPU
330330 global_atomic_dec_x2 v[3:4], v[5:6], off offset:-16
331331 // GFX9: global_atomic_dec_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xb0,0xdd,0x03,0x05,0x7f,0x00]
332332 // VI-ERR: :48: error: not a valid operand
333
334 global_load_ubyte_d16 v1, v[3:4], off
335 // GFX9: global_load_ubyte_d16 v1, v[3:4], off ; encoding: [0x00,0x80,0x80,0xdc,0x03,0x00,0x7f,0x01]
336 // VI-ERR: instruction not supported on this GPU
337
338 global_load_ubyte_d16_hi v1, v[3:4], off
339 // GFX9: global_load_ubyte_d16_hi v1, v[3:4], off ; encoding: [0x00,0x80,0x84,0xdc,0x03,0x00,0x7f,0x01]
340 // VI-ERR: instruction not supported on this GPU
341
342 global_load_sbyte_d16 v1, v[3:4], off
343 // GFX9: global_load_sbyte_d16 v1, v[3:4], off ; encoding: [0x00,0x80,0x88,0xdc,0x03,0x00,0x7f,0x01]
344 // VI-ERR: instruction not supported on this GPU
345
346 global_load_sbyte_d16_hi v1, v[3:4], off
347 // GFX9: global_load_sbyte_d16_hi v1, v[3:4], off ; encoding: [0x00,0x80,0x8c,0xdc,0x03,0x00,0x7f,0x01]
348 // VI-ERR: instruction not supported on this GPU
349
350 global_load_short_d16 v1, v[3:4], off
351 // GFX9: global_load_short_d16 v1, v[3:4], off ; encoding: [0x00,0x80,0x90,0xdc,0x03,0x00,0x7f,0x01]
352 // VI-ERR: instruction not supported on this GPU
353
354 global_load_short_d16_hi v1, v[3:4], off
355 // GFX9: global_load_short_d16_hi v1, v[3:4], off ; encoding: [0x00,0x80,0x94,0xdc,0x03,0x00,0x7f,0x01]
356 // VI-ERR: instruction not supported on this GPU
357
358 global_store_byte_d16_hi v[3:4], v1, off
359 // GFX9: global_store_byte_d16_hi v[3:4], v1, off ; encoding: [0x00,0x80,0x64,0xdc,0x03,0x01,0x7f,0x00]
360 // VI-ERR: instruction not supported on this GPU
361
362 global_store_short_d16_hi v[3:4], v1, off
363 // GFX9: global_store_short_d16_hi v[3:4], v1, off ; encoding: [0x00,0x80,0x6c,0xdc,0x03,0x01,0x7f,0x00]
364 // VI-ERR: instruction not supported on this GPU
142142 scratch_store_dword off, v2, m0
143143 // GFX9: scratch_store_dword off, v2, m0 ; encoding: [0x00,0x40,0x70,0xdc,0x00,0x02,0x7c,0x00]
144144 // VI-ERR: instruction not supported on this GPU
145
146 scratch_load_ubyte_d16 v1, v2, off
147 // GFX9: scratch_load_ubyte_d16 v1, v2, off ; encoding: [0x00,0x40,0x80,0xdc,0x02,0x00,0x7f,0x01]
148 // VI-ERR: instruction not supported on this GPU
149
150 scratch_load_ubyte_d16_hi v1, v2, off
151 // GFX9: scratch_load_ubyte_d16_hi v1, v2, off ; encoding: [0x00,0x40,0x84,0xdc,0x02,0x00,0x7f,0x01]
152 // VI-ERR: instruction not supported on this GPU
153
154 scratch_load_sbyte_d16 v1, v2, off
155 // GFX9: scratch_load_sbyte_d16 v1, v2, off ; encoding: [0x00,0x40,0x88,0xdc,0x02,0x00,0x7f,0x01]
156 // VI-ERR: instruction not supported on this GPU
157
158 scratch_load_sbyte_d16_hi v1, v2, off
159 // GFX9: scratch_load_sbyte_d16_hi v1, v2, off ; encoding: [0x00,0x40,0x8c,0xdc,0x02,0x00,0x7f,0x01]
160 // VI-ERR: instruction not supported on this GPU
161
162 scratch_load_short_d16 v1, v2, off
163 // GFX9: scratch_load_short_d16 v1, v2, off ; encoding: [0x00,0x40,0x90,0xdc,0x02,0x00,0x7f,0x01]
164 // VI-ERR: instruction not supported on this GPU
165
166 scratch_load_short_d16_hi v1, v2, off
167 // GFX9: scratch_load_short_d16_hi v1, v2, off ; encoding: [0x00,0x40,0x94,0xdc,0x02,0x00,0x7f,0x01]
168 // VI-ERR: instruction not supported on this GPU
169
170 scratch_store_byte_d16_hi off, v2, s1
171 // GFX9: scratch_store_byte_d16_hi off, v2, s1 ; encoding: [0x00,0x40,0x64,0xdc,0x00,0x02,0x01,0x00]
172 // VI-ERR: instruction not supported on this GPU
173
174 scratch_store_short_d16_hi off, v2, s1
175 // GFX9: scratch_store_short_d16_hi off, v2, s1 ; encoding: [0x00,0x40,0x6c,0xdc,0x00,0x02,0x01,0x00]
176 // VI-ERR: instruction not supported on this GPU
0 // RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
1 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding 2>&1 %s | FileCheck -check-prefix=VI-ERR -check-prefix=GCNERR %s
2
3 buffer_load_ubyte_d16 v1, off, s[4:7], s1
4 // VI-ERR: error: instruction not supported on this GPU
5 // GFX9: buffer_load_ubyte_d16 v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x80,0xe0,0x00,0x01,0x01,0x01]
6
7 buffer_load_ubyte_d16_hi v1, off, s[4:7], s1
8 // GFX9: buffer_load_ubyte_d16_hi v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x84,0xe0,0x00,0x01,0x01,0x01]
9 // VI-ERR: error: instruction not supported on this GPU
10
11 buffer_load_sbyte_d16 v1, off, s[4:7], s1
12 // GFX9: buffer_load_sbyte_d16 v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x88,0xe0,0x00,0x01,0x01,0x01]
13 // VI-ERR: error: instruction not supported on this GPU
14
15 buffer_load_sbyte_d16_hi v1, off, s[4:7], s1
16 // GFX9: buffer_load_sbyte_d16_hi v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x8c,0xe0,0x00,0x01,0x01,0x01]
17 // VI-ERR: error: instruction not supported on this GPU
18
19 buffer_load_short_d16 v1, off, s[4:7], s1
20 // GFX9: buffer_load_short_d16 v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x90,0xe0,0x00,0x01,0x01,0x01]
21 // VI-ERR: error: instruction not supported on this GPU
22
23 buffer_load_short_d16_hi v1, off, s[4:7], s1
24 // GFX9: buffer_load_short_d16_hi v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x94,0xe0,0x00,0x01,0x01,0x01]
25 // VI-ERR: error: instruction not supported on this GPU
26
27 buffer_store_byte_d16_hi v1, off, s[4:7], s1
28 // GFX9: buffer_store_byte_d16_hi v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x64,0xe0,0x00,0x01,0x01,0x01]
29 // VI-ERR: error: instruction not supported on this GPU
30
31 buffer_store_short_d16_hi v1, off, s[4:7], s1
32 // GFX9: buffer_store_short_d16_hi v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x6c,0xe0,0x00,0x01,0x01,0x01]
33 // VI-ERR: error: instruction not supported on this GPU