llvm.org GIT mirror llvm / 69f5df7
Add AVX2 VEXTRACTI128 and VINSERTI128 instructions. Fix VPERM2I128 to be qualified with HasAVX2 instead of HasAVX. Mark VINSERTF128 and VEXTRACTF128 as never having side effects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143902 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 8 years ago
3 changed file(s) with 67 addition(s) and 6 deletion(s). Raw diff Collapse all Expand all
17301730 Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_i8_ty],
17311731 [IntrNoMem]>;
17321732 def int_x86_avx2_vperm2i128 : GCCBuiltin<"__builtin_ia32_permti256">,
1733 Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
1734 llvm_v4i64_ty, llvm_i8_ty], [IntrNoMem]>;
1735 }
1736
1733 Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
1734 llvm_v4i64_ty, llvm_i8_ty], [IntrNoMem]>;
1735 }
1736
1737 // Vector extract and insert
1738 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
1739 def int_x86_avx2_vextracti128 : GCCBuiltin<"__builtin_ia32_extract128i256">,
1740 Intrinsic<[llvm_v2i64_ty], [llvm_v4i64_ty,
1741 llvm_i8_ty], [IntrNoMem]>;
1742 def int_x86_avx2_vinserti128 : GCCBuiltin<"__builtin_ia32_insert128i256">,
1743 Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
1744 llvm_v2i64_ty, llvm_i8_ty], [IntrNoMem]>;
1745 }
17371746 // Misc.
17381747 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
17391748 def int_x86_avx2_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb256">,
71297129 //===----------------------------------------------------------------------===//
71307130 // VINSERTF128 - Insert packed floating-point values
71317131 //
7132 let neverHasSideEffects = 1 in {
71327133 def VINSERTF128rr : AVXAIi8<0x18, MRMSrcReg, (outs VR256:$dst),
71337134 (ins VR256:$src1, VR128:$src2, i8imm:$src3),
71347135 "vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
71357136 []>, VEX_4V;
7137 let mayLoad = 1 in
71367138 def VINSERTF128rm : AVXAIi8<0x18, MRMSrcMem, (outs VR256:$dst),
71377139 (ins VR256:$src1, f128mem:$src2, i8imm:$src3),
71387140 "vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
71397141 []>, VEX_4V;
7142 }
71407143
71417144 def : Pat<(int_x86_avx_vinsertf128_pd_256 VR256:$src1, VR128:$src2, imm:$src3),
71427145 (VINSERTF128rr VR256:$src1, VR128:$src2, imm:$src3)>;
71737176 //===----------------------------------------------------------------------===//
71747177 // VEXTRACTF128 - Extract packed floating-point values
71757178 //
7179 let neverHasSideEffects = 1 in {
71767180 def VEXTRACTF128rr : AVXAIi8<0x19, MRMDestReg, (outs VR128:$dst),
71777181 (ins VR256:$src1, i8imm:$src2),
71787182 "vextractf128\t{$src2, $src1, $dst|$dst, $src1, $src2}",
71797183 []>, VEX;
7184 let mayStore = 1 in
71807185 def VEXTRACTF128mr : AVXAIi8<0x19, MRMDestMem, (outs),
71817186 (ins f128mem:$dst, VR256:$src1, i8imm:$src2),
71827187 "vextractf128\t{$src2, $src1, $dst|$dst, $src1, $src2}",
71837188 []>, VEX;
7189 }
71847190
71857191 def : Pat<(int_x86_avx_vextractf128_pd_256 VR256:$src1, imm:$src2),
71867192 (VEXTRACTF128rr VR256:$src1, imm:$src2)>;
75137519 //===----------------------------------------------------------------------===//
75147520 // VPERM2F128 - Permute Floating-Point Values in 128-bit chunks
75157521 //
7516 def VPERM2I128rr : AVXAIi8<0x46, MRMSrcReg, (outs VR256:$dst),
7522 def VPERM2I128rr : AVX2AIi8<0x46, MRMSrcReg, (outs VR256:$dst),
75177523 (ins VR256:$src1, VR256:$src2, i8imm:$src3),
75187524 "vperm2i128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
75197525 [(set VR256:$dst,
75207526 (int_x86_avx2_vperm2i128 VR256:$src1, VR256:$src2, imm:$src3))]>,
75217527 VEX_4V;
7522 def VPERM2I128rm : AVXAIi8<0x46, MRMSrcMem, (outs VR256:$dst),
7528 def VPERM2I128rm : AVX2AIi8<0x46, MRMSrcMem, (outs VR256:$dst),
75237529 (ins VR256:$src1, f256mem:$src2, i8imm:$src3),
75247530 "vperm2i128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
75257531 [(set VR256:$dst,
75267532 (int_x86_avx2_vperm2i128 VR256:$src1, (memopv4i64 addr:$src2),
75277533 imm:$src3))]>,
75287534 VEX_4V;
7535
7536 //===----------------------------------------------------------------------===//
7537 // VINSERTI128 - Insert packed integer values
7538 //
7539 def VINSERTI128rr : AVX2AIi8<0x38, MRMSrcReg, (outs VR256:$dst),
7540 (ins VR256:$src1, VR128:$src2, i8imm:$src3),
7541 "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7542 [(set VR256:$dst,
7543 (int_x86_avx2_vinserti128 VR256:$src1, VR128:$src2, imm:$src3))]>,
7544 VEX_4V;
7545 def VINSERTI128rm : AVX2AIi8<0x38, MRMSrcMem, (outs VR256:$dst),
7546 (ins VR256:$src1, i128mem:$src2, i8imm:$src3),
7547 "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7548 [(set VR256:$dst,
7549 (int_x86_avx2_vinserti128 VR256:$src1, (memopv2i64 addr:$src2),
7550 imm:$src3))]>, VEX_4V;
7551
7552 //===----------------------------------------------------------------------===//
7553 // VEXTRACTI128 - Extract packed integer values
7554 //
7555 def VEXTRACTI128rr : AVX2AIi8<0x39, MRMDestReg, (outs VR128:$dst),
7556 (ins VR256:$src1, i8imm:$src2),
7557 "vextracti128\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7558 [(set VR128:$dst,
7559 (int_x86_avx2_vextracti128 VR256:$src1, imm:$src2))]>,
7560 VEX;
7561 let neverHasSideEffects = 1, mayStore = 1 in
7562 def VEXTRACTI128mr : AVX2AIi8<0x39, MRMDestMem, (outs),
7563 (ins i128mem:$dst, VR256:$src1, i8imm:$src2),
7564 "vextracti128\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>, VEX;
885885 ret <4 x i64> %res
886886 }
887887 declare <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64>, <4 x i64>, i8) nounwind readonly
888
889
890 define <2 x i64> @test_x86_avx2_vextracti128(<4 x i64> %a0) {
891 ; CHECK: vextracti128
892 %res = call <2 x i64> @llvm.x86.avx2.vextracti128(<4 x i64> %a0, i8 7) ; <<2 x i64>> [#uses=1]
893 ret <2 x i64> %res
894 }
895 declare <2 x i64> @llvm.x86.avx2.vextracti128(<4 x i64>, i8) nounwind readnone
896
897
898 define <4 x i64> @test_x86_avx2_vinserti128(<4 x i64> %a0, <2 x i64> %a1) {
899 ; CHECK: vinserti128
900 %res = call <4 x i64> @llvm.x86.avx2.vinserti128(<4 x i64> %a0, <2 x i64> %a1, i8 7) ; <<4 x i64>> [#uses=1]
901 ret <4 x i64> %res
902 }
903 declare <4 x i64> @llvm.x86.avx2.vinserti128(<4 x i64>, <2 x i64>, i8) nounwind readnone