llvm.org GIT mirror llvm / 69de193
Re-apply the memory operand changes, with a fix for the static initializer problem, a minor tweak to the way the DAGISelEmitter finds load/store nodes, and a renaming of the new PseudoSourceValue objects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8 Dan Gohman 12 years ago
21 changed file(s) with 599 addition(s) and 161 deletion(s). Raw diff Collapse all Expand all
1616 #define LLVM_CODEGEN_MACHINEINSTR_H
1717
1818 #include "llvm/CodeGen/MachineOperand.h"
19 #include "llvm/CodeGen/MemOperand.h"
1920
2021 namespace llvm {
2122
3435 // are determined at construction time).
3536
3637 std::vector Operands; // the operands
38 std::vector MemOperands; // information on memory references
3739 MachineInstr *Prev, *Next; // Links for MBB's intrusive list.
3840 MachineBasicBlock *Parent; // Pointer to the owning basic block.
3941
9395 ///
9496 unsigned getNumExplicitOperands() const;
9597
98 /// Access to memory operands of the instruction
99 unsigned getNumMemOperands() const { return MemOperands.size(); }
100
101 const MemOperand& getMemOperand(unsigned i) const {
102 assert(i < getNumMemOperands() && "getMemOperand() out of range!");
103 return MemOperands[i];
104 }
105 MemOperand& getMemOperand(unsigned i) {
106 assert(i < getNumMemOperands() && "getMemOperand() out of range!");
107 return MemOperands[i];
108 }
109
96110 /// isIdenticalTo - Return true if this instruction is identical to (same
97111 /// opcode and same operands as) the specified instruction.
98112 bool isIdenticalTo(const MachineInstr *Other) const {
195209 ///
196210 void RemoveOperand(unsigned i);
197211
212 /// addMemOperand - Add a MemOperand to the machine instruction, referencing
213 /// arbitrary storage.
214 void addMemOperand(const MemOperand &MO) {
215 MemOperands.push_back(MO);
216 }
217
198218 private:
199219 /// getRegInfo - If this instruction is embedded into a MachineFunction,
200220 /// return the MachineRegisterInfo object for the current function, otherwise
8282 MI->addOperand(MachineOperand::CreateES(FnName, 0));
8383 return *this;
8484 }
85
86 /// addMemOperand - Add a memory operand to the machine instruction.
87 const MachineInstrBuilder &addMemOperand(const MemOperand &MO) const {
88 MI->addMemOperand(MO);
89 return *this;
90 }
8591 };
8692
8793 /// BuildMI - Builder interface. Specify how to create the initial instruction
0 //===-- llvm/CodeGen/MemOperand.h - MemOperand class ------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the declaration of the MemOperand class, which is a
10 // description of a memory reference. It is used to help track dependencies
11 // in the backend.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #ifndef LLVM_CODEGEN_MEMOPERAND_H
16 #define LLVM_CODEGEN_MEMOPERAND_H
17
18 namespace llvm {
19
20 class Value;
21
22 //===----------------------------------------------------------------------===//
23 /// MemOperand - A description of a memory reference used in the backend.
24 /// Instead of holding a StoreInst or LoadInst, this class holds the address
25 /// Value of the reference along with a byte size and offset. This allows it
26 /// to describe lowered loads and stores. Also, the special PseudoSourceValue
27 /// objects can be used to represent loads and stores to memory locations
28 /// that aren't explicit in the regular LLVM IR.
29 ///
30 class MemOperand {
31 const Value *V;
32 unsigned int Flags;
33 int Offset;
34 int Size;
35 unsigned int Alignment;
36
37 public:
38 /// Flags values. These may be or'd together.
39 enum MemOperandFlags {
40 /// The memory access reads data.
41 MOLoad = 1,
42 /// The memory access writes data.
43 MOStore = 2,
44 /// The memory access is volatile.
45 MOVolatile = 4
46 };
47
48 /// MemOperand - Construct an MemOperand object with the specified
49 /// address Value, flags, offset, size, and alignment.
50 MemOperand(const Value *v, unsigned int f, int o, int s, unsigned int a)
51 : V(v), Flags(f), Offset(o), Size(s), Alignment(a) {}
52
53 /// getValue - Return the base address of the memory access.
54 /// Special values are PseudoSourceValue::FPRel, PseudoSourceValue::SPRel,
55 /// and the other PseudoSourceValue members which indicate references to
56 /// frame/stack pointer relative references and other special references.
57 const Value *getValue() const { return V; }
58
59 /// getFlags - Return the raw flags of the source value, \see MemOperandFlags.
60 unsigned int getFlags() const { return Flags; }
61
62 /// getOffset - For normal values, this is a byte offset added to the base
63 /// address. For PseudoSourceValue::FPRel values, this is the FrameIndex
64 /// number.
65 int getOffset() const { return Offset; }
66
67 /// getSize - Return the size in bytes of the memory reference.
68 int getSize() const { return Size; }
69
70 /// getAlignment - Return the minimum known alignment in bytes of the
71 /// memory reference.
72 unsigned int getAlignment() const { return Alignment; }
73
74 bool isLoad() const { return Flags & MOLoad; }
75 bool isStore() const { return Flags & MOStore; }
76 bool isVolatile() const { return Flags & MOVolatile; }
77 };
78
79 } // End llvm namespace
80
81 #endif
0 //===-- llvm/CodeGen/PseudoSourceValue.h ------------------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the declaration of the PseudoSourceValue class.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #ifndef LLVM_CODEGEN_PSEUDOSOURCEVALUE_H
14 #define LLVM_CODEGEN_PSEUDOSOURCEVALUE_H
15
16 #include "llvm/Value.h"
17
18 namespace llvm {
19 /// PseudoSourceValue - Special value supplied for machine level alias
20 /// analysis. It indicates that the a memory access references the functions
21 /// stack frame (e.g., a spill slot), below the stack frame (e.g., argument
22 /// space), or constant pool.
23 class PseudoSourceValue : public Value {
24 public:
25 PseudoSourceValue();
26
27 virtual void print(std::ostream &OS) const;
28
29 /// classof - Methods for support type inquiry through isa, cast, and
30 /// dyn_cast:
31 ///
32 static inline bool classof(const PseudoSourceValue *) { return true; }
33 static inline bool classof(const Value *V) {
34 return V->getValueID() == PseudoSourceValueVal;
35 }
36
37 /// A pseudo source value referencing to the stack frame of a function,
38 /// e.g., a spill slot.
39 static const PseudoSourceValue &getFixedStack();
40
41 /// A source value referencing the area below the stack frame of a function,
42 /// e.g., the argument space.
43 static const PseudoSourceValue &getStack();
44
45 /// A source value referencing the global offset table (or something the
46 /// like).
47 static const PseudoSourceValue &getGOT();
48
49 /// A SV referencing the constant pool
50 static const PseudoSourceValue &getConstantPool();
51
52 /// A SV referencing the jump table
53 static const PseudoSourceValue &getJumpTable();
54 };
55 } // End llvm namespace
56
57 #endif
278278 if (isa(Node)) return true;
279279 if (isa(Node)) return true;
280280 if (isa(Node)) return true;
281 if (isa(Node)) return true;
281282 return false;
282283 }
283284
311312 /// (which do not go into the machine instrs.)
312313 static unsigned CountResults(SDNode *Node);
313314
314 /// CountOperands The inputs to target nodes have any actual inputs first,
315 /// followed by an optional chain operand, then flag operands. Compute the
316 /// number of actual operands that will go into the machine instr.
315 /// CountOperands - The inputs to target nodes have any actual inputs first,
316 /// followed by optional memory operands chain operand, then flag operands.
317 /// Compute the number of actual operands that will go into the machine
318 /// instr.
317319 static unsigned CountOperands(SDNode *Node);
320
321 /// CountMemOperands - Find the index of the last MemOperandSDNode
322 static unsigned CountMemOperands(SDNode *Node);
318323
319324 /// EmitNode - Generate machine code for an node and needed dependencies.
320325 /// VRBaseMap contains, for each already emitted node, the first virtual
356361 void AddOperand(MachineInstr *MI, SDOperand Op, unsigned IIOpNum,
357362 const TargetInstrDesc *II,
358363 DenseMap &VRBaseMap);
364
365 void AddMemOperand(MachineInstr *MI, const MemOperand &MO);
359366 };
360367
361368 /// createBURRListDAGScheduler - This creates a bottom up register usage
375375 SDOperand getIndexedStore(SDOperand OrigStoe, SDOperand Base,
376376 SDOperand Offset, ISD::MemIndexedMode AM);
377377
378 // getSrcValue - construct a node to track a Value* through the backend
379 SDOperand getSrcValue(const Value* I, int offset = 0);
378 // getSrcValue - Construct a node to track a Value* through the backend.
379 SDOperand getSrcValue(const Value *v);
380
381 // getMemOperand - Construct a node to track a memory reference
382 // through the backend.
383 SDOperand getMemOperand(const MemOperand &MO);
380384
381385 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
382386 /// specified operands. If the resultant node already exists in the DAG,
2424 #include "llvm/ADT/iterator"
2525 #include "llvm/ADT/APFloat.h"
2626 #include "llvm/CodeGen/ValueTypes.h"
27 #include "llvm/CodeGen/MemOperand.h"
2728 #include "llvm/Support/DataTypes.h"
2829 #include
2930
541542 // pointer, and a SRCVALUE.
542543 VAEND, VASTART,
543544
544 // SRCVALUE - This corresponds to a Value*, and is used to associate memory
545 // locations with their value. This allows one use alias analysis
546 // information in the backend.
545 // SRCVALUE - This is a node type that holds a Value* that is used to
546 // make reference to a value in the LLVM IR.
547547 SRCVALUE,
548
549 // MEMOPERAND - This is a node that contains a MemOperand which records
550 // information about a memory reference. This is used to make AliasAnalysis
551 // queries from the backend.
552 MEMOPERAND,
548553
549554 // PCMARKER - This corresponds to the pcmarker intrinsic.
550555 PCMARKER,
13901395
13911396 class SrcValueSDNode : public SDNode {
13921397 const Value *V;
1393 int offset;
13941398 virtual void ANCHOR(); // Out-of-line virtual method to give class a home.
13951399 protected:
13961400 friend class SelectionDAG;
1397 SrcValueSDNode(const Value* v, int o)
1398 : SDNode(ISD::SRCVALUE, getSDVTList(MVT::Other)), V(v), offset(o) {
1399 }
1400
1401 public:
1401 /// Create a SrcValue for a general value.
1402 explicit SrcValueSDNode(const Value *v)
1403 : SDNode(ISD::SRCVALUE, getSDVTList(MVT::Other)), V(v) {}
1404
1405 public:
1406 /// getValue - return the contained Value.
14021407 const Value *getValue() const { return V; }
1403 int getOffset() const { return offset; }
14041408
14051409 static bool classof(const SrcValueSDNode *) { return true; }
14061410 static bool classof(const SDNode *N) {
14071411 return N->getOpcode() == ISD::SRCVALUE;
1412 }
1413 };
1414
1415
1416 /// MemOperandSDNode - An SDNode that holds a MemOperand. This is
1417 /// used to represent a reference to memory after ISD::LOAD
1418 /// and ISD::STORE have been lowered.
1419 ///
1420 class MemOperandSDNode : public SDNode {
1421 virtual void ANCHOR(); // Out-of-line virtual method to give class a home.
1422 protected:
1423 friend class SelectionDAG;
1424 /// Create a MemOperand node
1425 explicit MemOperandSDNode(MemOperand mo)
1426 : SDNode(ISD::MEMOPERAND, getSDVTList(MVT::Other)), MO(mo) {}
1427
1428 public:
1429 /// MO - The contained MemOperand.
1430 const MemOperand MO;
1431
1432 static bool classof(const MemOperandSDNode *) { return true; }
1433 static bool classof(const SDNode *N) {
1434 return N->getOpcode() == ISD::MEMOPERAND;
14081435 }
14091436 };
14101437
15581585 /// isUnindexed - Return true if this is NOT a pre/post inc/dec load/store.
15591586 bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; }
15601587
1588 /// getMemOperand - Return a MemOperand object describing the memory
1589 /// reference performed by this load or store.
1590 MemOperand getMemOperand() const;
1591
15611592 static bool classof(const LSBaseSDNode *N) { return true; }
15621593 static bool classof(const SDNode *N) {
15631594 return N->getOpcode() == ISD::LOAD ||
186186 ConstantVectorVal, // This is an instance of ConstantVector
187187 ConstantPointerNullVal, // This is an instance of ConstantPointerNull
188188 InlineAsmVal, // This is an instance of InlineAsm
189 PseudoSourceValueVal, // This is an instance of PseudoSourceValue
189190 InstructionVal, // This is an instance of Instruction
190191
191192 // Markers:
1414 #include "llvm/Value.h"
1515 #include "llvm/CodeGen/MachineFunction.h"
1616 #include "llvm/CodeGen/MachineRegisterInfo.h"
17 #include "llvm/CodeGen/PseudoSourceValue.h"
18 #include "llvm/CodeGen/SelectionDAGNodes.h"
1719 #include "llvm/Target/TargetMachine.h"
1820 #include "llvm/Target/TargetInstrInfo.h"
1921 #include "llvm/Target/TargetInstrDesc.h"
291293 TID = &MI.getDesc();
292294 NumImplicitOps = MI.NumImplicitOps;
293295 Operands.reserve(MI.getNumOperands());
296 MemOperands = MI.MemOperands;
294297
295298 // Add operands
296299 for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
624627 OS << ",";
625628 OS << " ";
626629 getOperand(i).print(OS, TM);
630 }
631
632 if (getNumMemOperands() > 0) {
633 OS << ", SV:";
634 for (unsigned i = 0; i < getNumMemOperands(); i++) {
635 const MemOperand &MRO = getMemOperand(i);
636 const Value *V = MRO.getValue();
637
638 assert(V && "SV missing.");
639 assert((MRO.isLoad() || MRO.isStore()) &&
640 "SV has to be a load, store or both.");
641
642 if (MRO.isVolatile())
643 OS << "Volatile ";
644 if (MRO.isLoad())
645 OS << "LD ";
646 if (MRO.isStore())
647 OS << "ST ";
648
649 OS << MRO.getSize();
650
651 if (!V->getName().empty())
652 OS << "[" << V->getName() << " + " << MRO.getOffset() << "]";
653 else if (isa(V))
654 OS << "[" << *V << " + " << MRO.getOffset() << "]";
655 else
656 OS << "[" << V << " + " << MRO.getOffset() << "]";
657 }
627658 }
628659
629660 OS << "\n";
0 //===-- llvm/CodeGen/PseudoSourceValue.cpp ----------------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the PseudoSourceValue class.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "llvm/CodeGen/PseudoSourceValue.h"
14 #include "llvm/DerivedTypes.h"
15 #include "llvm/Support/ManagedStatic.h"
16
17 namespace llvm {
18 static ManagedStatic PSVs;
19
20 const PseudoSourceValue &PseudoSourceValue::getFixedStack() { return (*PSVs)[0]; }
21 const PseudoSourceValue &PseudoSourceValue::getStack() { return (*PSVs)[1]; }
22 const PseudoSourceValue &PseudoSourceValue::getGOT() { return (*PSVs)[2]; }
23 const PseudoSourceValue &PseudoSourceValue::getConstantPool() { return (*PSVs)[3]; }
24 const PseudoSourceValue &PseudoSourceValue::getJumpTable() { return (*PSVs)[4]; }
25
26 static const char *PSVNames[] = {
27 "FixedStack",
28 "Stack",
29 "GOT",
30 "ConstantPool",
31 "JumpTable"
32 };
33
34 PseudoSourceValue::PseudoSourceValue() :
35 Value(PointerType::getUnqual(Type::Int8Ty), PseudoSourceValueVal) {}
36
37 void PseudoSourceValue::print(std::ostream &OS) const {
38 OS << PSVNames[this - *PSVs];
39 }
40 }
1515 #include "llvm/CodeGen/MachineFrameInfo.h"
1616 #include "llvm/CodeGen/MachineJumpTableInfo.h"
1717 #include "llvm/CodeGen/MachineModuleInfo.h"
18 #include "llvm/CodeGen/PseudoSourceValue.h"
1819 #include "llvm/Target/TargetFrameInfo.h"
1920 #include "llvm/Target/TargetLowering.h"
2021 #include "llvm/Target/TargetData.h"
508509 SDOperand CPIdx = DAG.getConstantPool(LLVMC, TLI.getPointerTy());
509510 if (Extend) {
510511 return DAG.getExtLoad(ISD::EXTLOAD, MVT::f64, DAG.getEntryNode(),
511 CPIdx, NULL, 0, MVT::f32);
512 CPIdx, &PseudoSourceValue::getConstantPool(),
513 0, MVT::f32);
512514 } else {
513 return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0);
515 return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
516 &PseudoSourceValue::getConstantPool(), 0);
514517 }
515518 }
516519
795798 case ISD::TargetExternalSymbol:
796799 case ISD::VALUETYPE:
797800 case ISD::SRCVALUE:
801 case ISD::MEMOPERAND:
798802 case ISD::STRING:
799803 case ISD::CONDCODE:
800804 // Primitives must all be legal.
13151319 MVT::ValueType IdxVT = Tmp3.getValueType();
13161320 MVT::ValueType PtrVT = TLI.getPointerTy();
13171321 SDOperand StackPtr = DAG.CreateStackTemporary(VT);
1322
1323 FrameIndexSDNode *StackPtrFI = dyn_cast(StackPtr.Val);
1324 assert(StackPtrFI);
1325 int SPFI = StackPtrFI->getIndex();
1326
13181327 // Store the vector.
1319 SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Tmp1, StackPtr, NULL, 0);
1328 SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Tmp1, StackPtr,
1329 &PseudoSourceValue::getFixedStack(),
1330 SPFI);
13201331
13211332 // Truncate or zero extend offset to target pointer type.
13221333 unsigned CastOpc = (IdxVT > PtrVT) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
13261337 Tmp3 = DAG.getNode(ISD::MUL, IdxVT, Tmp3,DAG.getConstant(EltSize, IdxVT));
13271338 SDOperand StackPtr2 = DAG.getNode(ISD::ADD, IdxVT, Tmp3, StackPtr);
13281339 // Store the scalar value.
1329 Ch = DAG.getStore(Ch, Tmp2, StackPtr2, NULL, 0);
1340 Ch = DAG.getStore(Ch, Tmp2, StackPtr2,
1341 &PseudoSourceValue::getFixedStack(), SPFI);
13301342 // Load the updated vector.
1331 Result = DAG.getLoad(VT, Ch, StackPtr, NULL, 0);
1343 Result = DAG.getLoad(VT, Ch, StackPtr,
1344 &PseudoSourceValue::getFixedStack(), SPFI);
13321345 break;
13331346 }
13341347 }
16771690 SDOperand LD;
16781691 switch (EntrySize) {
16791692 default: assert(0 && "Size of jump table not supported yet."); break;
1680 case 4: LD = DAG.getLoad(MVT::i32, Chain, Addr, NULL, 0); break;
1681 case 8: LD = DAG.getLoad(MVT::i64, Chain, Addr, NULL, 0); break;
1693 case 4: LD = DAG.getLoad(MVT::i32, Chain, Addr,
1694 &PseudoSourceValue::getJumpTable(), 0); break;
1695 case 8: LD = DAG.getLoad(MVT::i64, Chain, Addr,
1696 &PseudoSourceValue::getJumpTable(), 0); break;
16821697 }
16831698
16841699 Addr = LD;
32393254 }
32403255 break;
32413256 case TargetLowering::Expand: {
3242 SrcValueSDNode *SV = cast(Node->getOperand(2));
3243 SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2,
3244 SV->getValue(), SV->getOffset());
3257 const Value *V = cast(Node->getOperand(2))->getValue();
3258 SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, V, 0);
32453259 // Increment the pointer, VAList, to the next vaarg
32463260 Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList,
32473261 DAG.getConstant(MVT::getSizeInBits(VT)/8,
32483262 TLI.getPointerTy()));
32493263 // Store the incremented VAList to the legalized pointer
3250 Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, SV->getValue(),
3251 SV->getOffset());
3264 Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, V, 0);
32523265 // Load the actual argument out of the pointer VAList
32533266 Result = DAG.getLoad(VT, Tmp3, VAList, NULL, 0);
32543267 Tmp1 = LegalizeOp(Result.getValue(1));
32843297 case TargetLowering::Expand:
32853298 // This defaults to loading a pointer from the input and storing it to the
32863299 // output, returning the chain.
3287 SrcValueSDNode *SVD = cast(Node->getOperand(3));
3288 SrcValueSDNode *SVS = cast(Node->getOperand(4));
3289 Tmp4 = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp3, SVD->getValue(),
3290 SVD->getOffset());
3291 Result = DAG.getStore(Tmp4.getValue(1), Tmp4, Tmp2, SVS->getValue(),
3292 SVS->getOffset());
3300 const Value *VD = cast(Node->getOperand(3))->getValue();
3301 const Value *VS = cast(Node->getOperand(4))->getValue();
3302 Tmp4 = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp3, VD, 0);
3303 Result = DAG.getStore(Tmp4.getValue(1), Tmp4, Tmp2, VS, 0);
32933304 break;
32943305 }
32953306 break;
42844295 Tmp3 = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2));
42854296 Result = TLI.CustomPromoteOperation(Tmp3, DAG);
42864297 } else {
4287 SrcValueSDNode *SV = cast(Node->getOperand(2));
4288 SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2,
4289 SV->getValue(), SV->getOffset());
4298 const Value *V = cast(Node->getOperand(2))->getValue();
4299 SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, V, 0);
42904300 // Increment the pointer, VAList, to the next vaarg
42914301 Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList,
42924302 DAG.getConstant(MVT::getSizeInBits(VT)/8,
42934303 TLI.getPointerTy()));
42944304 // Store the incremented VAList to the legalized pointer
4295 Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, SV->getValue(),
4296 SV->getOffset());
4305 Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, V, 0);
42974306 // Load the actual argument out of the pointer VAList
42984307 Result = DAG.getExtLoad(ISD::EXTLOAD, NVT, Tmp3, VAList, NULL, 0, VT);
42994308 }
47494758 // Create the stack frame object.
47504759 SDOperand FIPtr = DAG.CreateStackTemporary(SlotVT);
47514760
4761 FrameIndexSDNode *StackPtrFI = dyn_cast(FIPtr);
4762 assert(StackPtrFI);
4763 int SPFI = StackPtrFI->getIndex();
4764
47524765 unsigned SrcSize = MVT::getSizeInBits(SrcOp.getValueType());
47534766 unsigned SlotSize = MVT::getSizeInBits(SlotVT);
47544767 unsigned DestSize = MVT::getSizeInBits(DestVT);
47574770 // later than DestVT.
47584771 SDOperand Store;
47594772 if (SrcSize > SlotSize)
4760 Store = DAG.getTruncStore(DAG.getEntryNode(), SrcOp, FIPtr, NULL, 0,SlotVT);
4773 Store = DAG.getTruncStore(DAG.getEntryNode(), SrcOp, FIPtr,
4774 &PseudoSourceValue::getFixedStack(),
4775 SPFI, SlotVT);
47614776 else {
47624777 assert(SrcSize == SlotSize && "Invalid store");
4763 Store = DAG.getStore(DAG.getEntryNode(), SrcOp, FIPtr, NULL, 0);
4778 Store = DAG.getStore(DAG.getEntryNode(), SrcOp, FIPtr,
4779 &PseudoSourceValue::getFixedStack(),
4780 SPFI, SlotVT);
47644781 }
47654782
47664783 // Result is a load from the stack slot.
47754792 // Create a vector sized/aligned stack slot, store the value to element #0,
47764793 // then load the whole vector back out.
47774794 SDOperand StackPtr = DAG.CreateStackTemporary(Node->getValueType(0));
4795
4796 FrameIndexSDNode *StackPtrFI = dyn_cast(StackPtr);
4797 assert(StackPtrFI);
4798 int SPFI = StackPtrFI->getIndex();
4799
47784800 SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Node->getOperand(0), StackPtr,
4779 NULL, 0);
4780 return DAG.getLoad(Node->getValueType(0), Ch, StackPtr, NULL, 0);
4801 &PseudoSourceValue::getFixedStack(), SPFI);
4802 return DAG.getLoad(Node->getValueType(0), Ch, StackPtr,
4803 &PseudoSourceValue::getFixedStack(), SPFI);
47814804 }
47824805
47834806
48414864 }
48424865 Constant *CP = ConstantVector::get(CV);
48434866 SDOperand CPIdx = DAG.getConstantPool(CP, TLI.getPointerTy());
4844 return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0);
4867 return DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
4868 &PseudoSourceValue::getConstantPool(), 0);
48454869 }
48464870
48474871 if (SplatValue.Val) { // Splat of one value?
51835207 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
51845208 SDOperand FudgeInReg;
51855209 if (DestTy == MVT::f32)
5186 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, NULL, 0);
5210 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
5211 &PseudoSourceValue::getConstantPool(), 0);
51875212 else if (MVT::getSizeInBits(DestTy) > MVT::getSizeInBits(MVT::f32))
51885213 // FIXME: Avoid the extend by construction the right constantpool?
51895214 FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestTy, DAG.getEntryNode(),
5190 CPIdx, NULL, 0, MVT::f32);
5215 CPIdx,
5216 &PseudoSourceValue::getConstantPool(), 0,
5217 MVT::f32);
51915218 else
51925219 assert(0 && "Unexpected conversion");
51935220
53295356 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
53305357 SDOperand FudgeInReg;
53315358 if (DestVT == MVT::f32)
5332 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx, NULL, 0);
5359 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
5360 &PseudoSourceValue::getConstantPool(), 0);
53335361 else {
5334 FudgeInReg = LegalizeOp(DAG.getExtLoad(ISD::EXTLOAD, DestVT,
5335 DAG.getEntryNode(), CPIdx,
5336 NULL, 0, MVT::f32));
5362 FudgeInReg =
5363 LegalizeOp(DAG.getExtLoad(ISD::EXTLOAD, DestVT,
5364 DAG.getEntryNode(), CPIdx,
5365 &PseudoSourceValue::getConstantPool(), 0,
5366 MVT::f32));
53375367 }
53385368
53395369 return DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg);
67426772 // Lower to a store/load so that it can be split.
67436773 // FIXME: this could be improved probably.
67446774 SDOperand Ptr = DAG.CreateStackTemporary(InOp.getValueType());
6775 FrameIndexSDNode *FI = dyn_cast(Ptr.Val);
6776 assert(FI && "Expecting CreateStackTemporary to return a frame index.\n");
67456777
67466778 SDOperand St = DAG.getStore(DAG.getEntryNode(),
6747 InOp, Ptr, NULL, 0);
6748 InOp = DAG.getLoad(Op.getValueType(), St, Ptr, NULL, 0);
6779 InOp, Ptr,
6780 &PseudoSourceValue::getFixedStack(),
6781 FI->getIndex());
6782 InOp = DAG.getLoad(Op.getValueType(), St, Ptr,
6783 &PseudoSourceValue::getFixedStack(),
6784 FI->getIndex());
67496785 }
67506786 // Split the vector and convert each of the pieces now.
67516787 SplitVectorOp(InOp, Lo, Hi);
276276 return N;
277277 }
278278
279 /// CountOperands The inputs to target nodes have any actual inputs first,
280 /// followed by an optional chain operand, then flag operands. Compute the
281 /// number of actual operands that will go into the machine instr.
279 /// CountOperands - The inputs to target nodes have any actual inputs first,
280 /// followed by optional memory operands chain operand, then flag operands.
281 /// Compute the number of actual operands that will go into the machine istr.
282282 unsigned ScheduleDAG::CountOperands(SDNode *Node) {
283 unsigned N = Node->getNumOperands();
284 while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
285 --N;
286 if (N && Node->getOperand(N - 1).getValueType() == MVT::Other)
287 --N; // Ignore chain if it exists.
288 while (N && MemOperandSDNode::classof(Node->getOperand(N - 1).Val))
289 --N; // Ignore MemOperand nodes
290 return N;
291 }
292
293 /// CountMemOperands - Find the index of the last MemOperandSDNode operand
294 unsigned ScheduleDAG::CountMemOperands(SDNode *Node) {
283295 unsigned N = Node->getNumOperands();
284296 while (N && Node->getOperand(N - 1).getValueType() == MVT::Flag)
285297 --N;
516528
517529 }
518530
531 void ScheduleDAG::AddMemOperand(MachineInstr *MI, const MemOperand &MO) {
532 MI->addMemOperand(MO);
533 }
534
519535 // Returns the Register Class of a subregister
520536 static const TargetRegisterClass *getSubRegisterRegClass(
521537 const TargetRegisterClass *TRC,
674690
675691 unsigned NumResults = CountResults(Node);
676692 unsigned NodeOperands = CountOperands(Node);
693 unsigned NodeMemOperands = CountMemOperands(Node);
677694 unsigned NumMIOperands = NodeOperands + NumResults;
678695 bool HasPhysRegOuts = (NumResults > II.getNumDefs()) &&
679696 II.getImplicitDefs() != 0;
695712 // instruction as appropriate.
696713 for (unsigned i = 0; i != NodeOperands; ++i)
697714 AddOperand(MI, Node->getOperand(i), i+II.getNumDefs(), &II, VRBaseMap);
715
716 // Emit all of the memory operands of this instruction
717 for (unsigned i = NodeOperands; i != NodeMemOperands; ++i)
718 AddMemOperand(MI, cast(Node->getOperand(i))->MO);
698719
699720 // Commute node if it has been determined to be profitable.
700721 if (CommuteSet.count(Node)) {
736757 case ISD::TokenFactor:
737758 case ISD::LABEL:
738759 case ISD::DECLARE:
760 case ISD::SRCVALUE:
739761 break;
740762 case ISD::CopyToReg: {
741763 unsigned InReg;
2020 #include "llvm/CodeGen/MachineConstantPool.h"
2121 #include "llvm/CodeGen/MachineFrameInfo.h"
2222 #include "llvm/CodeGen/MachineModuleInfo.h"
23 #include "llvm/CodeGen/PseudoSourceValue.h"
2324 #include "llvm/Support/MathExtras.h"
2425 #include "llvm/Target/MRegisterInfo.h"
2526 #include "llvm/Target/TargetData.h"
360361 case ISD::Register:
361362 ID.AddInteger(cast(N)->getReg());
362363 break;
363 case ISD::SRCVALUE: {
364 SrcValueSDNode *SV = cast(N);
365 ID.AddPointer(SV->getValue());
366 ID.AddInteger(SV->getOffset());
364 case ISD::SRCVALUE:
365 ID.AddPointer(cast(N)->getValue());
366 break;
367 case ISD::MEMOPERAND: {
368 const MemOperand &MO = cast(N)->MO;
369 ID.AddPointer(MO.getValue());
370 ID.AddInteger(MO.getFlags());
371 ID.AddInteger(MO.getOffset());
372 ID.AddInteger(MO.getSize());
373 ID.AddInteger(MO.getAlignment());
367374 break;
368375 }
369376 case ISD::FrameIndex:
936943 return SDOperand(N, 0);
937944 }
938945
939 SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
946 SDOperand SelectionDAG::getSrcValue(const Value *V) {
940947 assert((!V || isa(V->getType())) &&
941948 "SrcValue is not a pointer?");
942949
943950 FoldingSetNodeID ID;
944951 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
945952 ID.AddPointer(V);
946 ID.AddInteger(Offset);
953
947954 void *IP = 0;
948955 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
949956 return SDOperand(E, 0);
950 SDNode *N = new SrcValueSDNode(V, Offset);
957
958 SDNode *N = new SrcValueSDNode(V);
959 CSEMap.InsertNode(N, IP);
960 AllNodes.push_back(N);
961 return SDOperand(N, 0);
962 }
963
964 SDOperand SelectionDAG::getMemOperand(const MemOperand &MO) {
965 const Value *v = MO.getValue();
966 assert((!v || isa(v->getType())) &&
967 "SrcValue is not a pointer?");
968
969 FoldingSetNodeID ID;
970 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
971 ID.AddPointer(v);
972 ID.AddInteger(MO.getFlags());
973 ID.AddInteger(MO.getOffset());
974 ID.AddInteger(MO.getSize());
975 ID.AddInteger(MO.getAlignment());
976
977 void *IP = 0;
978 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
979 return SDOperand(E, 0);
980
981 SDNode *N = new MemOperandSDNode(MO);
951982 CSEMap.InsertNode(N, IP);
952983 AllNodes.push_back(N);
953984 return SDOperand(N, 0);
34783509 void ConstantPoolSDNode::ANCHOR() {}
34793510 void BasicBlockSDNode::ANCHOR() {}
34803511 void SrcValueSDNode::ANCHOR() {}
3512 void MemOperandSDNode::ANCHOR() {}
34813513 void RegisterSDNode::ANCHOR() {}
34823514 void ExternalSymbolSDNode::ANCHOR() {}
34833515 void CondCodeSDNode::ANCHOR() {}
35023534 TheGlobal = const_cast(GA);
35033535 }
35043536
3537 /// getMemOperand - Return a MemOperand object describing the memory
3538 /// reference performed by this load or store.
3539 MemOperand LSBaseSDNode::getMemOperand() const {
3540 int Size = (MVT::getSizeInBits(getMemoryVT()) + 7) >> 3;
3541 int Flags =
3542 getOpcode() == ISD::LOAD ? MemOperand::MOLoad : MemOperand::MOStore;
3543 if (IsVolatile) Flags |= MemOperand::MOVolatile;
3544
3545 // Check if the load references a frame index, and does not have
3546 // an SV attached.
3547 const FrameIndexSDNode *FI =
3548 dyn_cast(getBasePtr().Val);
3549 if (!getSrcValue() && FI)
3550 return MemOperand(&PseudoSourceValue::getFixedStack(), Flags,
3551 FI->getIndex(), Size, Alignment);
3552 else
3553 return MemOperand(getSrcValue(), Flags,
3554 getSrcValueOffset(), Size, Alignment);
3555 }
3556
35053557 /// Profile - Gather unique data for the node.
35063558 ///
35073559 void SDNode::Profile(FoldingSetNodeID &ID) {
36943746 case ISD::PCMARKER: return "PCMarker";
36953747 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
36963748 case ISD::SRCVALUE: return "SrcValue";
3749 case ISD::MEMOPERAND: return "MemOperand";
36973750 case ISD::EntryToken: return "EntryToken";
36983751 case ISD::TokenFactor: return "TokenFactor";
36993752 case ISD::AssertSext: return "AssertSext";
39994052 cerr << "'" << ES->getSymbol() << "'";
40004053 } else if (const SrcValueSDNode *M = dyn_cast(this)) {
40014054 if (M->getValue())
4002 cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
4055 cerr << "<" << M->getValue() << ">";
40034056 else
4004 cerr << ":" << M->getOffset() << ">";
4057 cerr << ">";
4058 } else if (const MemOperandSDNode *M = dyn_cast(this)) {
4059 if (M->MO.getValue())
4060 cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
4061 else
4062 cerr << "MO.getOffset() << ">";
40054063 } else if (const VTSDNode *N = dyn_cast(this)) {
40064064 cerr << ":" << MVT::getValueTypeString(N->getVT());
40074065 } else if (const LoadSDNode *LD = dyn_cast(this)) {
141141 Op += "'" + std::string(ES->getSymbol()) + "'";
142142 } else if (const SrcValueSDNode *M = dyn_cast(Node)) {
143143 if (M->getValue())
144 Op += "<" + M->getValue()->getName() + ":" + itostr(M->getOffset()) + ">";
144 Op += "<" + M->getValue()->getName() + ">";
145145 else
146 Op += ":" + itostr(M->getOffset()) + ">";
146 Op += ">";
147 } else if (const MemOperandSDNode *M = dyn_cast(Node)) {
148 if (M->MO.getValue())
149 Op += "<" + M->MO.getValue()->getName() + ":" + itostr(M->MO.getOffset()) + ">";
150 else
151 Op += "MO.getOffset()) + ">";
147152 } else if (const VTSDNode *N = dyn_cast(Node)) {
148153 Op = Op + " VT=" + MVT::getValueTypeString(N->getVT());
149154 } else if (const StringSDNode *N = dyn_cast(Node)) {
904904 // memory location argument.
905905 MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
906906 SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
907 SrcValueSDNode *SV = cast(Op.getOperand(2));
908 return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV->getValue(),
909 SV->getOffset());
907 const Value *SV = cast(Op.getOperand(2))->getValue();
908 return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV, 0);
910909 }
911910
912911 static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
490490 case ISD::VAARG: {
491491 SDOperand Chain = Op.getOperand(0);
492492 SDOperand VAListP = Op.getOperand(1);
493 SrcValueSDNode *VAListS = cast(Op.getOperand(2));
493 const Value *VAListS = cast(Op.getOperand(2))->getValue();
494494
495 SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS->getValue(),
496 VAListS->getOffset());
495 SDOperand Base = DAG.getLoad(MVT::i64, Chain, VAListP, VAListS, 0);
497496 SDOperand Tmp = DAG.getNode(ISD::ADD, MVT::i64, VAListP,
498497 DAG.getConstant(8, MVT::i64));
499498 SDOperand Offset = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Base.getValue(1),
526525 SDOperand Chain = Op.getOperand(0);
527526 SDOperand DestP = Op.getOperand(1);
528527 SDOperand SrcP = Op.getOperand(2);
529 SrcValueSDNode *DestS = cast(Op.getOperand(3));
530 SrcValueSDNode *SrcS = cast(Op.getOperand(4));
528 const Value *DestS = cast(Op.getOperand(3))->getValue();
529 const Value *SrcS = cast(Op.getOperand(4))->getValue();
531530
532 SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP,
533 SrcS->getValue(), SrcS->getOffset());
534 SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS->getValue(),
535 DestS->getOffset());
531 SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP, SrcS, 0);
532 SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS, 0);
536533 SDOperand NP = DAG.getNode(ISD::ADD, MVT::i64, SrcP,
537534 DAG.getConstant(8, MVT::i64));
538535 Val = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Result, NP, NULL,0, MVT::i32);
543540 case ISD::VASTART: {
544541 SDOperand Chain = Op.getOperand(0);
545542 SDOperand VAListP = Op.getOperand(1);
546 SrcValueSDNode *VAListS = cast(Op.getOperand(2));
543 const Value *VAListS = cast(Op.getOperand(2))->getValue();
547544
548545 // vastart stores the address of the VarArgsBase and VarArgsOffset
549546 SDOperand FR = DAG.getFrameIndex(VarArgsBase, MVT::i64);
550 SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS->getValue(),
551 VAListS->getOffset());
547 SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS, 0);
552548 SDOperand SA2 = DAG.getNode(ISD::ADD, MVT::i64, VAListP,
553549 DAG.getConstant(8, MVT::i64));
554550 return DAG.getTruncStore(S1, DAG.getConstant(VarArgsOffset, MVT::i64),
580580 }
581581 case ISD::VAARG: {
582582 MVT::ValueType VT = getPointerTy();
583 SrcValueSDNode *SV = cast(Op.getOperand(2));
583 const Value *SV = cast(Op.getOperand(2))->getValue();
584584 SDOperand VAList = DAG.getLoad(VT, Op.getOperand(0), Op.getOperand(1),
585 SV->getValue(), SV->getOffset());
585 SV, 0);
586586 // Increment the pointer, VAList, to the next vaarg
587587 SDOperand VAIncr = DAG.getNode(ISD::ADD, VT, VAList,
588588 DAG.getConstant(MVT::getSizeInBits(VT)/8,
589589 VT));
590590 // Store the incremented VAList to the legalized pointer
591591 VAIncr = DAG.getStore(VAList.getValue(1), VAIncr,
592 Op.getOperand(1), SV->getValue(), SV->getOffset());
592 Op.getOperand(1), SV, 0);
593593 // Load the actual argument out of the pointer VAList
594594 return DAG.getLoad(Op.getValueType(), VAIncr, VAList, NULL, 0);
595595 }
597597 // vastart just stores the address of the VarArgsFrameIndex slot into the
598598 // memory location argument.
599599 SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64);
600 SrcValueSDNode *SV = cast(Op.getOperand(2));
601 return DAG.getStore(Op.getOperand(0), FR,
602 Op.getOperand(1), SV->getValue(), SV->getOffset());
600 const Value *SV = cast(Op.getOperand(2))->getValue();
601 return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV, 0);
603602 }
604603 // Frame & Return address. Currently unimplemented
605604 case ISD::RETURNADDR: break;
2323 #include "llvm/CodeGen/MachineFunction.h"
2424 #include "llvm/CodeGen/MachineInstrBuilder.h"
2525 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
2627 #include "llvm/CodeGen/SelectionDAG.h"
2728 #include "llvm/Constants.h"
2829 #include "llvm/Function.h"
11741175 // memory location argument.
11751176 MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
11761177 SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
1177 SrcValueSDNode *SV = cast(Op.getOperand(2));
1178 return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV->getValue(),
1179 SV->getOffset());
1178 const Value *SV = cast(Op.getOperand(2))->getValue();
1179 return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), SV, 0);
11801180 }
11811181
11821182 // For ELF 32 ABI we follow the layout of the va_list struct.
12101210
12111211 MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
12121212
1213 SDOperand StackOffset = DAG.getFrameIndex(VarArgsStackOffset, PtrVT);
1213 SDOperand StackOffsetFI = DAG.getFrameIndex(VarArgsStackOffset, PtrVT);
12141214 SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
12151215
1216 SDOperand ConstFrameOffset = DAG.getConstant(MVT::getSizeInBits(PtrVT)/8,
1217 PtrVT);
1218 SDOperand ConstStackOffset = DAG.getConstant(MVT::getSizeInBits(PtrVT)/8 - 1,
1219 PtrVT);
1220 SDOperand ConstFPROffset = DAG.getConstant(1, PtrVT);
1221
1222 SrcValueSDNode *SV = cast(Op.getOperand(2));
1216 uint64_t FrameOffset = MVT::getSizeInBits(PtrVT)/8;
1217 SDOperand ConstFrameOffset = DAG.getConstant(FrameOffset, PtrVT);
1218
1219 uint64_t StackOffset = MVT::getSizeInBits(PtrVT)/8 - 1;
1220 SDOperand ConstStackOffset = DAG.getConstant(StackOffset, PtrVT);
1221
1222 uint64_t FPROffset = 1;
1223 SDOperand ConstFPROffset = DAG.getConstant(FPROffset, PtrVT);
1224
1225 const Value *SV = cast(Op.getOperand(2))->getValue();
12231226
12241227 // Store first byte : number of int regs
12251228 SDOperand firstStore = DAG.getStore(Op.getOperand(0), ArgGPR,
1226 Op.getOperand(1), SV->getValue(),
1227 SV->getOffset());
1229 Op.getOperand(1), SV, 0);
1230 uint64_t nextOffset = FPROffset;
12281231 SDOperand nextPtr = DAG.getNode(ISD::ADD, PtrVT, Op.getOperand(1),
12291232 ConstFPROffset);
12301233
12311234 // Store second byte : number of float regs
1232 SDOperand secondStore = DAG.getStore(firstStore, ArgFPR, nextPtr,
1233 SV->getValue(), SV->getOffset());
1235 SDOperand secondStore =
1236 DAG.getStore(firstStore, ArgFPR, nextPtr, SV, nextOffset);
1237 nextOffset += StackOffset;
12341238 nextPtr = DAG.getNode(ISD::ADD, PtrVT, nextPtr, ConstStackOffset);
12351239
12361240 // Store second word : arguments given on stack
1237 SDOperand thirdStore = DAG.getStore(secondStore, StackOffset, nextPtr,
1238 SV->getValue(), SV->getOffset());
1241 SDOperand thirdStore =
1242 DAG.getStore(secondStore, StackOffsetFI, nextPtr, SV, nextOffset);
1243 nextOffset += FrameOffset;
12391244 nextPtr = DAG.getNode(ISD::ADD, PtrVT, nextPtr, ConstFrameOffset);
12401245
12411246 // Store third word : arguments given in registers
1242 return DAG.getStore(thirdStore, FR, nextPtr, SV->getValue(),
1243 SV->getOffset());
1247 return DAG.getStore(thirdStore, FR, nextPtr, SV, nextOffset);
12441248
12451249 }
12461250
21982202 Op.getOperand(0));
21992203
22002204 // STD the extended value into the stack slot.
2205 MemOperand MO(&PseudoSourceValue::getFixedStack(),
2206 MemOperand::MOStore, FrameIdx, 8, 8);
22012207 SDOperand Store = DAG.getNode(PPCISD::STD_32, MVT::Other,
22022208 DAG.getEntryNode(), Ext64, FIdx,
2203 DAG.getSrcValue(NULL));
2209 DAG.getMemOperand(MO));
22042210 // Load the value as a double.
22052211 SDOperand Ld = DAG.getLoad(MVT::f64, Store, FIdx, NULL, 0);
22062212
32993305 std::vector VTs;
33003306 VTs.push_back(MVT::i32);
33013307 VTs.push_back(MVT::Other);
3302 SDOperand SV = DAG.getSrcValue(LD->getSrcValue(), LD->getSrcValueOffset());
3308 SDOperand MO = DAG.getMemOperand(LD->getMemOperand());
33033309 SDOperand Ops[] = {
33043310 LD->getChain(), // Chain
33053311 LD->getBasePtr(), // Ptr
3306 SV, // SrcValue
3312 MO, // MemOperand
33073313 DAG.getValueType(N->getValueType(0)) // VT
33083314 };
33093315 SDOperand BSLoad = DAG.getNode(PPCISD::LBRX, VTs, Ops, 4);
804804 SDOperand Offset = DAG.getNode(ISD::ADD, MVT::i32,
805805 DAG.getRegister(SP::I6, MVT::i32),
806806 DAG.getConstant(VarArgsFrameOffset, MVT::i32));
807 SrcValueSDNode *SV = cast(Op.getOperand(2));
808 return DAG.getStore(Op.getOperand(0), Offset,
809 Op.getOperand(1), SV->getValue(), SV->getOffset());
807 const Value *SV = cast(Op.getOperand(2))->getValue();
808 return DAG.getStore(Op.getOperand(0), Offset, Op.getOperand(1), SV, 0);
810809 }
811810 case ISD::VAARG: {
812811 SDNode *Node = Op.Val;
813812 MVT::ValueType VT = Node->getValueType(0);
814813 SDOperand InChain = Node->getOperand(0);
815814 SDOperand VAListPtr = Node->getOperand(1);
816 SrcValueSDNode *SV = cast(Node->getOperand(2));
817 SDOperand VAList = DAG.getLoad(getPointerTy(), InChain, VAListPtr,
818 SV->getValue(), SV->getOffset());
815 const Value *SV = cast(Node->getOperand(2))->getValue();
816 SDOperand VAList = DAG.getLoad(getPointerTy(), InChain, VAListPtr, SV, 0);
819817 // Increment the pointer, VAList, to the next vaarg
820818 SDOperand NextPtr = DAG.getNode(ISD::ADD, getPointerTy(), VAList,
821819 DAG.getConstant(MVT::getSizeInBits(VT)/8,
822820 getPointerTy()));
823821 // Store the incremented VAList to the legalized pointer
824822 InChain = DAG.getStore(VAList.getValue(1), NextPtr,
825 VAListPtr, SV->getValue(), SV->getOffset());
823 VAListPtr, SV, 0);
826824 // Load the actual argument out of the pointer VAList, unless this is an
827825 // f64 load.
828826 if (VT != MVT::f64) {
3131 #include "llvm/CodeGen/MachineInstrBuilder.h"
3232 #include "llvm/CodeGen/MachineModuleInfo.h"
3333 #include "llvm/CodeGen/MachineRegisterInfo.h"
34 #include "llvm/CodeGen/PseudoSourceValue.h"
3435 #include "llvm/CodeGen/SelectionDAG.h"
3536 #include "llvm/Support/MathExtras.h"
3637 #include "llvm/Support/Debug.h"
10881089 SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy());
10891090 if (isByVal)
10901091 return FIN;
1091 return DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0);
1092 return DAG.getLoad(VA.getValVT(), Root, FIN,
1093 &PseudoSourceValue::getFixedStack(), FI);
10921094 }
10931095
10941096 SDOperand
12161218 unsigned VReg = AddLiveIn(MF, GPR64ArgRegs[NumIntRegs],
12171219 X86::GR64RegisterClass);
12181220 SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::i64);
1219 SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0);
1221 SDOperand Store =
1222 DAG.getStore(Val.getValue(1), Val, FIN,
1223 &PseudoSourceValue::getFixedStack(),
1224 RegSaveFrameIndex);
12201225 MemOps.push_back(Store);
12211226 FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
12221227 DAG.getIntPtrConstant(8));
12291234 unsigned VReg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs],
12301235 X86::VR128RegisterClass);
12311236 SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::v4f32);
1232 SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0);
1237 SDOperand Store =
1238 DAG.getStore(Val.getValue(1), Val, FIN,
1239 &PseudoSourceValue::getFixedStack(),
1240 RegSaveFrameIndex);
12331241 MemOps.push_back(Store);
12341242 FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
12351243 DAG.getIntPtrConstant(16));
15581566 Flags, DAG));
15591567 } else {
15601568 // Store relative to framepointer.
1561 MemOpChains2.push_back(DAG.getStore(Chain, Source, FIN, NULL, 0));
1569 MemOpChains2.push_back(
1570 DAG.getStore(Chain, Source, FIN,
1571 &PseudoSourceValue::getFixedStack(), FI));
15621572 }
15631573 }
15641574 }
37873797 // the GV offset field. Platform check is inside GVRequiresExtraLoad() call
37883798 // The same applies for external symbols during PIC codegen
37893799 if (Subtarget->GVRequiresExtraLoad(GV, getTargetMachine(), false))
3790 Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), Result, NULL, 0);
3800 Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), Result,
3801 &PseudoSourceValue::getGOT(), 0);
37913802
37923803 return Result;
37933804 }
38453856 SDOperand Offset = DAG.getNode(X86ISD::Wrapper, PtrVT, TGA);
38463857
38473858 if (GA->getGlobal()->isDeclaration()) // initial exec TLS model
3848 Offset = DAG.getLoad(PtrVT, DAG.getEntryNode(), Offset, NULL, 0);
3859 Offset = DAG.getLoad(PtrVT, DAG.getEntryNode(), Offset,
3860 &PseudoSourceValue::getGOT(), 0);
38493861
38503862 // The address of the thread local variable is the add of the thread
38513863 // pointer with the offset of the variable.
39773989 int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
39783990 SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
39793991 SDOperand Chain = DAG.getStore(DAG.getEntryNode(), Op.getOperand(0),
3980 StackSlot, NULL, 0);
3992 StackSlot,
3993 &PseudoSourceValue::getFixedStack(),
3994 SSFI);
39813995
39823996 // These are really Legal; caller falls through into that case.
39833997 if (SrcVT == MVT::i32 && isScalarFPTypeInSSEReg(Op.getValueType()))
40184032 Ops.push_back(DAG.getValueType(Op.getValueType()));
40194033 Ops.push_back(InFlag);
40204034 Chain = DAG.getNode(X86ISD::FST, Tys, &Ops[0], Ops.size());
4021 Result = DAG.getLoad(Op.getValueType(), Chain, StackSlot, NULL, 0);
4035 Result = DAG.getLoad(Op.getValueType(), Chain, StackSlot,
4036 &PseudoSourceValue::getFixedStack(), SSFI);
40224037 }
40234038
40244039 return Result;
40564071 SDOperand Value = Op.getOperand(0);
40574072 if (isScalarFPTypeInSSEReg(Op.getOperand(0).getValueType())) {
40584073 assert(Op.getValueType() == MVT::i64 && "Invalid FP_TO_SINT to lower!");
4059 Chain = DAG.getStore(Chain, Value, StackSlot, NULL, 0);
4074 Chain = DAG.getStore(Chain, Value, StackSlot,
4075 &PseudoSourceValue::getFixedStack(), SSFI);
40604076 SDVTList Tys = DAG.getVTList(Op.getOperand(0).getValueType(), MVT::Other);
40614077 SDOperand Ops[] = {
40624078 Chain, StackSlot, DAG.getValueType(Op.getOperand(0).getValueType())
41154131 }
41164132 Constant *C = ConstantVector::get(CV);
41174133 SDOperand CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
4118 SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0,
4134 SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
4135 &PseudoSourceValue::getConstantPool(), 0,
41194136 false, 16);
41204137 return DAG.getNode(X86ISD::FAND, VT, Op.getOperand(0), Mask);
41214138 }
41434160 }
41444161 Constant *C = ConstantVector::get(CV);
41454162 SDOperand CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
4146 SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0,
4163 SDOperand Mask = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
4164 &PseudoSourceValue::getConstantPool(), 0,
41474165 false, 16);
41484166 if (MVT::isVector(VT)) {
41494167 return DAG.getNode(ISD::BIT_CONVERT, VT,
41914209 }
41924210 Constant *C = ConstantVector::get(CV);
41934211 SDOperand CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
4194 SDOperand Mask1 = DAG.getLoad(SrcVT, DAG.getEntryNode(), CPIdx, NULL, 0,
4212 SDOperand Mask1 = DAG.getLoad(SrcVT, DAG.getEntryNode(), CPIdx,
4213 &PseudoSourceValue::getConstantPool(), 0,
41954214 false, 16);
41964215 SDOperand SignBit = DAG.getNode(X86ISD::FAND, SrcVT, Op1, Mask1);
41974216
42194238 }
42204239 C = ConstantVector::get(CV);
42214240 CPIdx = DAG.getConstantPool(C, getPointerTy(), 4);
4222 SDOperand Mask2 = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx, NULL, 0,
4241 SDOperand Mask2 = DAG.getLoad(VT, DAG.getEntryNode(), CPIdx,
4242 &PseudoSourceValue::getConstantPool(), 0,
42234243 false, 16);
42244244 SDOperand Val = DAG.getNode(X86ISD::FAND, VT, Op0, Mask2);
42254245
46754695 }
46764696
46774697 SDOperand X86TargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG) {
4678 SrcValueSDNode *SV = cast(Op.getOperand(2));
4698 const Value *SV = cast(Op.getOperand(2))->getValue();
46794699
46804700 if (!Subtarget->is64Bit()) {
46814701 // vastart just stores the address of the VarArgsFrameIndex slot into the
46824702 // memory location argument.
46834703 SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
4684 return DAG.getStore(Op.getOperand(0), FR,Op.getOperand(1), SV->getValue(),
4685 SV->getOffset());
4704 return DAG.getStore(Op.getOperand(0), FR,Op.getOperand(1), SV, 0);
46864705 }
46874706
46884707 // __va_list_tag:
46954714 // Store gp_offset
46964715 SDOperand Store = DAG.getStore(Op.getOperand(0),
46974716 DAG.getConstant(VarArgsGPOffset, MVT::i32),
4698 FIN, SV->getValue(), SV->getOffset());
4717 FIN, SV, 0);
46994718 MemOps.push_back(Store);
47004719
47014720 // Store fp_offset
47024721 FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, DAG.getIntPtrConstant(4));
47034722 Store = DAG.getStore(Op.getOperand(0),
47044723 DAG.getConstant(VarArgsFPOffset, MVT::i32),
4705 FIN, SV->getValue(), SV->getOffset());
4724 FIN, SV, 0);
47064725 MemOps.push_back(Store);
47074726
47084727 // Store ptr to overflow_arg_area
47094728 FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, DAG.getIntPtrConstant(4));
47104729 SDOperand OVFIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
4711 Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, SV->getValue(),
4712 SV->getOffset());
4730 Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, SV, 0);
47134731 MemOps.push_back(Store);
47144732
47154733 // Store ptr to reg_save_area.
47164734 FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, DAG.getIntPtrConstant(8));
47174735 SDOperand RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy());
4718 Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, SV->getValue(),
4719 SV->getOffset());
4736 Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, SV, 0);
47204737 MemOps.push_back(Store);
47214738 return DAG.getNode(ISD::TokenFactor, MVT::Other, &MemOps[0], MemOps.size());
47224739 }
47264743 SDOperand Chain = Op.getOperand(0);
47274744 SDOperand DstPtr = Op.getOperand(1);
47284745 SDOperand SrcPtr = Op.getOperand(2);
4729 SrcValueSDNode *DstSV = cast(Op.getOperand(3));
4730 SrcValueSDNode *SrcSV = cast(Op.getOperand(4));
4731
4732 SrcPtr = DAG.getLoad(getPointerTy(), Chain, SrcPtr,
4733 SrcSV->getValue(), SrcSV->getOffset());
4746 const Value *DstSV = cast(Op.getOperand(3))->getValue();
4747 const Value *SrcSV = cast(Op.getOperand(4))->getValue();
4748
4749 SrcPtr = DAG.getLoad(getPointerTy(), Chain, SrcPtr, SrcSV, 0);
47344750 Chain = SrcPtr.getValue(1);
47354751 for (unsigned i = 0; i < 3; ++i) {
4736 SDOperand Val = DAG.getLoad(MVT::i64, Chain, SrcPtr,
4737 SrcSV->getValue(), SrcSV->getOffset());
4752 SDOperand Val = DAG.getLoad(MVT::i64, Chain, SrcPtr, SrcSV, 0);
47384753 Chain = Val.getValue(1);
4739 Chain = DAG.getStore(Chain, Val, DstPtr,
4740 DstSV->getValue(), DstSV->getOffset());
4754 Chain = DAG.getStore(Chain, Val, DstPtr, DstSV, 0);
47414755 if (i == 2)
47424756 break;
47434757 SrcPtr = DAG.getNode(ISD::ADD, getPointerTy(), SrcPtr,
49174931 SDOperand FPtr = Op.getOperand(2); // nested function
49184932 SDOperand Nest = Op.getOperand(3); // 'nest' parameter value
49194933
4920 SrcValueSDNode *TrmpSV = cast(Op.getOperand(4));
4934 const Value *TrmpAddr = cast(Op.getOperand(4))->getValue();
49214935
49224936 const X86InstrInfo *TII =
49234937 ((X86TargetMachine&)getTargetMachine()).getInstrInfo();
49414955 unsigned OpCode = ((MOV64ri | N86R11) << 8) | REX_WB; // movabsq r11
49424956 SDOperand Addr = Trmp;
49434957 OutChains[0] = DAG.getStore(Root, DAG.getConstant(OpCode, MVT::i16), Addr,
4944 TrmpSV->getValue(), TrmpSV->getOffset());
4958 TrmpAddr, 0);
49454959
49464960 Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(2, MVT::i64));
4947 OutChains[1] = DAG.getStore(Root, FPtr, Addr, TrmpSV->getValue(),
4948 TrmpSV->getOffset() + 2, false, 2);
4961 OutChains[1] = DAG.getStore(Root, FPtr, Addr, TrmpAddr, 2, false, 2);
49494962
49504963 // Load the 'nest' parameter value into R10.
49514964 // R10 is specified in X86CallingConv.td
49524965 OpCode = ((MOV64ri | N86R10) << 8) | REX_WB; // movabsq r10
49534966 Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(10, MVT::i64));
49544967 OutChains[2] = DAG.getStore(Root, DAG.getConstant(OpCode, MVT::i16), Addr,
4955 TrmpSV->getValue(), TrmpSV->getOffset() + 10);
4968 TrmpAddr, 10);
49564969
49574970 Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(12, MVT::i64));
4958 OutChains[3] = DAG.getStore(Root, Nest, Addr, TrmpSV->getValue(),
4959 TrmpSV->getOffset() + 12, false, 2);
4971 OutChains[3] = DAG.getStore(Root, Nest, Addr, TrmpAddr, 12, false, 2);
49604972
49614973 // Jump to the nested function.
49624974 OpCode = (JMP64r << 8) | REX_WB; // jmpq *...
49634975 Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(20, MVT::i64));
49644976 OutChains[4] = DAG.getStore(Root, DAG.getConstant(OpCode, MVT::i16), Addr,
4965 TrmpSV->getValue(), TrmpSV->getOffset() + 20);
4977 TrmpAddr, 20);
49664978
49674979 unsigned char ModRM = N86R11 | (4 << 3) | (3 << 6); // ...r11
49684980 Addr = DAG.getNode(ISD::ADD, MVT::i64, Trmp, DAG.getConstant(22, MVT::i64));
49694981 OutChains[5] = DAG.getStore(Root, DAG.getConstant(ModRM, MVT::i8), Addr,
4970 TrmpSV->getValue(), TrmpSV->getOffset() + 22);
4982 TrmpAddr, 22);
49714983
49724984 SDOperand Ops[] =
49734985 { Trmp, DAG.getNode(ISD::TokenFactor, MVT::Other, OutChains, 6) };
50255037 const unsigned char N86Reg =
50265038 ((X86RegisterInfo*)RegInfo)->getX86RegNum(NestReg);
50275039 OutChains[0] = DAG.getStore(Root, DAG.getConstant(MOV32ri|N86Reg, MVT::i8),
5028 Trmp, TrmpSV->getValue(), TrmpSV->getOffset());
5040 Trmp, TrmpAddr, 0);
50295041
50305042 Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(1, MVT::i32));
5031 OutChains[1] = DAG.getStore(Root, Nest, Addr, TrmpSV->getValue(),
5032 TrmpSV->getOffset() + 1, false, 1);
5043 OutChains[1] = DAG.getStore(Root, Nest, Addr, TrmpAddr, 1, false, 1);
50335044
50345045 const unsigned char JMP = TII->getBaseOpcodeFor(X86::JMP);
50355046 Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(5, MVT::i32));
50365047 OutChains[2] = DAG.getStore(Root, DAG.getConstant(JMP, MVT::i8), Addr,
5037 TrmpSV->getValue() + 5, TrmpSV->getOffset());
5048 TrmpAddr, 5, false, 1);
50385049
50395050 Addr = DAG.getNode(ISD::ADD, MVT::i32, Trmp, DAG.getConstant(6, MVT::i32));
5040 OutChains[3] = DAG.getStore(Root, Disp, Addr, TrmpSV->getValue(),
5041 TrmpSV->getOffset() + 6, false, 1);
5051 OutChains[3] = DAG.getStore(Root, Disp, Addr, TrmpAddr, 6, false, 1);
50425052
50435053 SDOperand Ops[] =
50445054 { Trmp, DAG.getNode(ISD::TokenFactor, MVT::Other, OutChains, 4) };
312312 std::vector > OrigChains;
313313 std::set Duplicates;
314314
315 /// LSI - Load/Store information.
316 /// Save loads/stores matched by a pattern, and generate a MemOperandSDNode
317 /// for each memory access. This facilitates the use of AliasAnalysis in
318 /// the backend.
319 std::vector LSI;
320
315321 /// GeneratedCode - This is the buffer that we emit code to. The first int
316322 /// indicates whether this is an exit predicate (something that should be
317323 /// tested, and if true, the match fails) [when 1], or normal code to emit
372378 void EmitMatchCode(TreePatternNode *N, TreePatternNode *P,
373379 const std::string &RootName, const std::string &ChainSuffix,
374380 bool &FoundChain) {
381
382 // Save loads/stores matched by a pattern.
383 if (!N->isLeaf() && N->getName().empty()) {
384 std::string EnumName = N->getOperator()->getValueAsString("Opcode");
385 if (EnumName == "ISD::LOAD" ||
386 EnumName == "ISD::STORE") {
387 LSI.push_back(RootName);
388 }
389 }
390
375391 bool isRoot = (P == NULL);
376392 // Emit instruction predicates. Each predicate is just a string for now.
377393 if (isRoot) {
943959 }
944960 }
945961
962 // Generate MemOperandSDNodes nodes for each memory accesses covered by this
963 // pattern.
964 if (isRoot) {
965 std::vector::const_iterator mi, mie;
966 for (mi = LSI.begin(), mie = LSI.end(); mi != mie; ++mi) {
967 emitCode("SDOperand LSI_" + *mi + " = "
968 "CurDAG->getMemOperand(cast(" +
969 *mi + ")->getMemOperand());");
970 AllOps.push_back("LSI_" + *mi);
971 }
972 }
973
946974 // Emit all the chain and CopyToReg stuff.
947975 bool ChainEmitted = NodeHasChain;
948976 if (NodeHasChain)