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[X86][SSE] shift/rotate tests - remove unnecessary mcpu arguments and regenerate/cleanup git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251232 91177308-0d34-0410-b5e6-96231b3b80d8 Simon Pilgrim 4 years ago
8 changed file(s) with 194 addition(s) and 194 deletion(s). Raw diff Collapse all Expand all
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
66 ;
77 ; Just one 32-bit run to make sure we do reasonable things for i64 rotates.
8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
99
1010 ;
1111 ; Variable Rotates
254254 define <8 x i16> @var_rotate_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
255255 ; SSE2-LABEL: var_rotate_v8i16:
256256 ; SSE2: # BB#0:
257 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16]
258 ; SSE2-NEXT: psubw %xmm1, %xmm2
257 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
258 ; SSE2-NEXT: psubw %xmm1, %xmm3
259259 ; SSE2-NEXT: psllw $12, %xmm1
260 ; SSE2-NEXT: movdqa %xmm1, %xmm3
261 ; SSE2-NEXT: psraw $15, %xmm3
260 ; SSE2-NEXT: movdqa %xmm1, %xmm2
261 ; SSE2-NEXT: psraw $15, %xmm2
262262 ; SSE2-NEXT: movdqa %xmm0, %xmm4
263263 ; SSE2-NEXT: psllw $8, %xmm4
264 ; SSE2-NEXT: pand %xmm3, %xmm4
265 ; SSE2-NEXT: pandn %xmm0, %xmm3
266 ; SSE2-NEXT: por %xmm4, %xmm3
264 ; SSE2-NEXT: pand %xmm2, %xmm4
265 ; SSE2-NEXT: pandn %xmm0, %xmm2
266 ; SSE2-NEXT: por %xmm4, %xmm2
267267 ; SSE2-NEXT: paddw %xmm1, %xmm1
268268 ; SSE2-NEXT: movdqa %xmm1, %xmm4
269269 ; SSE2-NEXT: psraw $15, %xmm4
270270 ; SSE2-NEXT: movdqa %xmm4, %xmm5
271 ; SSE2-NEXT: pandn %xmm3, %xmm5
272 ; SSE2-NEXT: psllw $4, %xmm3
273 ; SSE2-NEXT: pand %xmm4, %xmm3
274 ; SSE2-NEXT: por %xmm5, %xmm3
271 ; SSE2-NEXT: pandn %xmm2, %xmm5
272 ; SSE2-NEXT: psllw $4, %xmm2
273 ; SSE2-NEXT: pand %xmm4, %xmm2
274 ; SSE2-NEXT: por %xmm5, %xmm2
275275 ; SSE2-NEXT: paddw %xmm1, %xmm1
276276 ; SSE2-NEXT: movdqa %xmm1, %xmm4
277277 ; SSE2-NEXT: psraw $15, %xmm4
278278 ; SSE2-NEXT: movdqa %xmm4, %xmm5
279 ; SSE2-NEXT: pandn %xmm3, %xmm5
280 ; SSE2-NEXT: psllw $2, %xmm3
281 ; SSE2-NEXT: pand %xmm4, %xmm3
282 ; SSE2-NEXT: por %xmm5, %xmm3
279 ; SSE2-NEXT: pandn %xmm2, %xmm5
280 ; SSE2-NEXT: psllw $2, %xmm2
281 ; SSE2-NEXT: pand %xmm4, %xmm2
282 ; SSE2-NEXT: por %xmm5, %xmm2
283283 ; SSE2-NEXT: paddw %xmm1, %xmm1
284284 ; SSE2-NEXT: psraw $15, %xmm1
285285 ; SSE2-NEXT: movdqa %xmm1, %xmm4
286 ; SSE2-NEXT: pandn %xmm3, %xmm4
287 ; SSE2-NEXT: psllw $1, %xmm3
288 ; SSE2-NEXT: pand %xmm1, %xmm3
289 ; SSE2-NEXT: por %xmm4, %xmm3
290 ; SSE2-NEXT: psllw $12, %xmm2
291 ; SSE2-NEXT: movdqa %xmm2, %xmm1
286 ; SSE2-NEXT: pandn %xmm2, %xmm4
287 ; SSE2-NEXT: psllw $1, %xmm2
288 ; SSE2-NEXT: pand %xmm1, %xmm2
289 ; SSE2-NEXT: psllw $12, %xmm3
290 ; SSE2-NEXT: movdqa %xmm3, %xmm1
292291 ; SSE2-NEXT: psraw $15, %xmm1
293 ; SSE2-NEXT: movdqa %xmm1, %xmm4
294 ; SSE2-NEXT: pandn %xmm0, %xmm4
292 ; SSE2-NEXT: movdqa %xmm1, %xmm5
293 ; SSE2-NEXT: pandn %xmm0, %xmm5
295294 ; SSE2-NEXT: psrlw $8, %xmm0
296295 ; SSE2-NEXT: pand %xmm1, %xmm0
297 ; SSE2-NEXT: por %xmm4, %xmm0
298 ; SSE2-NEXT: paddw %xmm2, %xmm2
299 ; SSE2-NEXT: movdqa %xmm2, %xmm1
296 ; SSE2-NEXT: por %xmm5, %xmm0
297 ; SSE2-NEXT: paddw %xmm3, %xmm3
298 ; SSE2-NEXT: movdqa %xmm3, %xmm1
300299 ; SSE2-NEXT: psraw $15, %xmm1
301 ; SSE2-NEXT: movdqa %xmm1, %xmm4
302 ; SSE2-NEXT: pandn %xmm0, %xmm4
300 ; SSE2-NEXT: movdqa %xmm1, %xmm5
301 ; SSE2-NEXT: pandn %xmm0, %xmm5
303302 ; SSE2-NEXT: psrlw $4, %xmm0
304303 ; SSE2-NEXT: pand %xmm1, %xmm0
305 ; SSE2-NEXT: por %xmm4, %xmm0
306 ; SSE2-NEXT: paddw %xmm2, %xmm2
307 ; SSE2-NEXT: movdqa %xmm2, %xmm1
304 ; SSE2-NEXT: por %xmm5, %xmm0
305 ; SSE2-NEXT: paddw %xmm3, %xmm3
306 ; SSE2-NEXT: movdqa %xmm3, %xmm1
308307 ; SSE2-NEXT: psraw $15, %xmm1
309 ; SSE2-NEXT: movdqa %xmm1, %xmm4
310 ; SSE2-NEXT: pandn %xmm0, %xmm4
308 ; SSE2-NEXT: movdqa %xmm1, %xmm5
309 ; SSE2-NEXT: pandn %xmm0, %xmm5
311310 ; SSE2-NEXT: psrlw $2, %xmm0
312311 ; SSE2-NEXT: pand %xmm1, %xmm0
313 ; SSE2-NEXT: por %xmm4, %xmm0
314 ; SSE2-NEXT: paddw %xmm2, %xmm2
315 ; SSE2-NEXT: psraw $15, %xmm2
316 ; SSE2-NEXT: movdqa %xmm2, %xmm1
312 ; SSE2-NEXT: por %xmm5, %xmm0
313 ; SSE2-NEXT: paddw %xmm3, %xmm3
314 ; SSE2-NEXT: psraw $15, %xmm3
315 ; SSE2-NEXT: movdqa %xmm3, %xmm1
317316 ; SSE2-NEXT: pandn %xmm0, %xmm1
318317 ; SSE2-NEXT: psrlw $1, %xmm0
319 ; SSE2-NEXT: pand %xmm2, %xmm0
318 ; SSE2-NEXT: pand %xmm3, %xmm0
320319 ; SSE2-NEXT: por %xmm1, %xmm0
321 ; SSE2-NEXT: por %xmm3, %xmm0
320 ; SSE2-NEXT: por %xmm4, %xmm0
321 ; SSE2-NEXT: por %xmm2, %xmm0
322322 ; SSE2-NEXT: retq
323323 ;
324324 ; SSE41-LABEL: var_rotate_v8i16:
439439 ;
440440 ; X32-SSE-LABEL: var_rotate_v8i16:
441441 ; X32-SSE: # BB#0:
442 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16]
443 ; X32-SSE-NEXT: psubw %xmm1, %xmm2
442 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
443 ; X32-SSE-NEXT: psubw %xmm1, %xmm3
444444 ; X32-SSE-NEXT: psllw $12, %xmm1
445 ; X32-SSE-NEXT: movdqa %xmm1, %xmm3
446 ; X32-SSE-NEXT: psraw $15, %xmm3
445 ; X32-SSE-NEXT: movdqa %xmm1, %xmm2
446 ; X32-SSE-NEXT: psraw $15, %xmm2
447447 ; X32-SSE-NEXT: movdqa %xmm0, %xmm4
448448 ; X32-SSE-NEXT: psllw $8, %xmm4
449 ; X32-SSE-NEXT: pand %xmm3, %xmm4
450 ; X32-SSE-NEXT: pandn %xmm0, %xmm3
451 ; X32-SSE-NEXT: por %xmm4, %xmm3
449 ; X32-SSE-NEXT: pand %xmm2, %xmm4
450 ; X32-SSE-NEXT: pandn %xmm0, %xmm2
451 ; X32-SSE-NEXT: por %xmm4, %xmm2
452452 ; X32-SSE-NEXT: paddw %xmm1, %xmm1
453453 ; X32-SSE-NEXT: movdqa %xmm1, %xmm4
454454 ; X32-SSE-NEXT: psraw $15, %xmm4
455455 ; X32-SSE-NEXT: movdqa %xmm4, %xmm5
456 ; X32-SSE-NEXT: pandn %xmm3, %xmm5
457 ; X32-SSE-NEXT: psllw $4, %xmm3
458 ; X32-SSE-NEXT: pand %xmm4, %xmm3
459 ; X32-SSE-NEXT: por %xmm5, %xmm3
456 ; X32-SSE-NEXT: pandn %xmm2, %xmm5
457 ; X32-SSE-NEXT: psllw $4, %xmm2
458 ; X32-SSE-NEXT: pand %xmm4, %xmm2
459 ; X32-SSE-NEXT: por %xmm5, %xmm2
460460 ; X32-SSE-NEXT: paddw %xmm1, %xmm1
461461 ; X32-SSE-NEXT: movdqa %xmm1, %xmm4
462462 ; X32-SSE-NEXT: psraw $15, %xmm4
463463 ; X32-SSE-NEXT: movdqa %xmm4, %xmm5
464 ; X32-SSE-NEXT: pandn %xmm3, %xmm5
465 ; X32-SSE-NEXT: psllw $2, %xmm3
466 ; X32-SSE-NEXT: pand %xmm4, %xmm3
467 ; X32-SSE-NEXT: por %xmm5, %xmm3
464 ; X32-SSE-NEXT: pandn %xmm2, %xmm5
465 ; X32-SSE-NEXT: psllw $2, %xmm2
466 ; X32-SSE-NEXT: pand %xmm4, %xmm2
467 ; X32-SSE-NEXT: por %xmm5, %xmm2
468468 ; X32-SSE-NEXT: paddw %xmm1, %xmm1
469469 ; X32-SSE-NEXT: psraw $15, %xmm1
470470 ; X32-SSE-NEXT: movdqa %xmm1, %xmm4
471 ; X32-SSE-NEXT: pandn %xmm3, %xmm4
472 ; X32-SSE-NEXT: psllw $1, %xmm3
473 ; X32-SSE-NEXT: pand %xmm1, %xmm3
474 ; X32-SSE-NEXT: por %xmm4, %xmm3
475 ; X32-SSE-NEXT: psllw $12, %xmm2
476 ; X32-SSE-NEXT: movdqa %xmm2, %xmm1
471 ; X32-SSE-NEXT: pandn %xmm2, %xmm4
472 ; X32-SSE-NEXT: psllw $1, %xmm2
473 ; X32-SSE-NEXT: pand %xmm1, %xmm2
474 ; X32-SSE-NEXT: psllw $12, %xmm3
475 ; X32-SSE-NEXT: movdqa %xmm3, %xmm1
477476 ; X32-SSE-NEXT: psraw $15, %xmm1
478 ; X32-SSE-NEXT: movdqa %xmm1, %xmm4
479 ; X32-SSE-NEXT: pandn %xmm0, %xmm4
477 ; X32-SSE-NEXT: movdqa %xmm1, %xmm5
478 ; X32-SSE-NEXT: pandn %xmm0, %xmm5
480479 ; X32-SSE-NEXT: psrlw $8, %xmm0
481480 ; X32-SSE-NEXT: pand %xmm1, %xmm0
482 ; X32-SSE-NEXT: por %xmm4, %xmm0
483 ; X32-SSE-NEXT: paddw %xmm2, %xmm2
484 ; X32-SSE-NEXT: movdqa %xmm2, %xmm1
481 ; X32-SSE-NEXT: por %xmm5, %xmm0
482 ; X32-SSE-NEXT: paddw %xmm3, %xmm3
483 ; X32-SSE-NEXT: movdqa %xmm3, %xmm1
485484 ; X32-SSE-NEXT: psraw $15, %xmm1
486 ; X32-SSE-NEXT: movdqa %xmm1, %xmm4
487 ; X32-SSE-NEXT: pandn %xmm0, %xmm4
485 ; X32-SSE-NEXT: movdqa %xmm1, %xmm5
486 ; X32-SSE-NEXT: pandn %xmm0, %xmm5
488487 ; X32-SSE-NEXT: psrlw $4, %xmm0
489488 ; X32-SSE-NEXT: pand %xmm1, %xmm0
490 ; X32-SSE-NEXT: por %xmm4, %xmm0
491 ; X32-SSE-NEXT: paddw %xmm2, %xmm2
492 ; X32-SSE-NEXT: movdqa %xmm2, %xmm1
489 ; X32-SSE-NEXT: por %xmm5, %xmm0
490 ; X32-SSE-NEXT: paddw %xmm3, %xmm3
491 ; X32-SSE-NEXT: movdqa %xmm3, %xmm1
493492 ; X32-SSE-NEXT: psraw $15, %xmm1
494 ; X32-SSE-NEXT: movdqa %xmm1, %xmm4
495 ; X32-SSE-NEXT: pandn %xmm0, %xmm4
493 ; X32-SSE-NEXT: movdqa %xmm1, %xmm5
494 ; X32-SSE-NEXT: pandn %xmm0, %xmm5
496495 ; X32-SSE-NEXT: psrlw $2, %xmm0
497496 ; X32-SSE-NEXT: pand %xmm1, %xmm0
498 ; X32-SSE-NEXT: por %xmm4, %xmm0
499 ; X32-SSE-NEXT: paddw %xmm2, %xmm2
500 ; X32-SSE-NEXT: psraw $15, %xmm2
501 ; X32-SSE-NEXT: movdqa %xmm2, %xmm1
497 ; X32-SSE-NEXT: por %xmm5, %xmm0
498 ; X32-SSE-NEXT: paddw %xmm3, %xmm3
499 ; X32-SSE-NEXT: psraw $15, %xmm3
500 ; X32-SSE-NEXT: movdqa %xmm3, %xmm1
502501 ; X32-SSE-NEXT: pandn %xmm0, %xmm1
503502 ; X32-SSE-NEXT: psrlw $1, %xmm0
504 ; X32-SSE-NEXT: pand %xmm2, %xmm0
503 ; X32-SSE-NEXT: pand %xmm3, %xmm0
505504 ; X32-SSE-NEXT: por %xmm1, %xmm0
506 ; X32-SSE-NEXT: por %xmm3, %xmm0
505 ; X32-SSE-NEXT: por %xmm4, %xmm0
506 ; X32-SSE-NEXT: por %xmm2, %xmm0
507507 ; X32-SSE-NEXT: retl
508508 %b16 = sub <8 x i16> , %b
509509 %shl = shl <8 x i16> %a, %b
543543 ; SSE2-NEXT: pandn %xmm2, %xmm1
544544 ; SSE2-NEXT: paddb %xmm2, %xmm2
545545 ; SSE2-NEXT: pand %xmm5, %xmm2
546 ; SSE2-NEXT: por %xmm1, %xmm2
547546 ; SSE2-NEXT: psllw $5, %xmm4
548 ; SSE2-NEXT: pxor %xmm1, %xmm1
549 ; SSE2-NEXT: pcmpgtb %xmm4, %xmm1
550 ; SSE2-NEXT: movdqa %xmm1, %xmm5
551 ; SSE2-NEXT: pandn %xmm0, %xmm5
547 ; SSE2-NEXT: pxor %xmm5, %xmm5
548 ; SSE2-NEXT: pcmpgtb %xmm4, %xmm5
549 ; SSE2-NEXT: movdqa %xmm5, %xmm6
550 ; SSE2-NEXT: pandn %xmm0, %xmm6
552551 ; SSE2-NEXT: psrlw $4, %xmm0
553552 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
554 ; SSE2-NEXT: pand %xmm1, %xmm0
555 ; SSE2-NEXT: por %xmm5, %xmm0
553 ; SSE2-NEXT: pand %xmm5, %xmm0
554 ; SSE2-NEXT: por %xmm6, %xmm0
556555 ; SSE2-NEXT: paddb %xmm4, %xmm4
557 ; SSE2-NEXT: pxor %xmm1, %xmm1
558 ; SSE2-NEXT: pcmpgtb %xmm4, %xmm1
559 ; SSE2-NEXT: movdqa %xmm1, %xmm5
560 ; SSE2-NEXT: pandn %xmm0, %xmm5
556 ; SSE2-NEXT: pxor %xmm5, %xmm5
557 ; SSE2-NEXT: pcmpgtb %xmm4, %xmm5
558 ; SSE2-NEXT: movdqa %xmm5, %xmm6
559 ; SSE2-NEXT: pandn %xmm0, %xmm6
561560 ; SSE2-NEXT: psrlw $2, %xmm0
562561 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
563 ; SSE2-NEXT: pand %xmm1, %xmm0
564 ; SSE2-NEXT: por %xmm5, %xmm0
562 ; SSE2-NEXT: pand %xmm5, %xmm0
563 ; SSE2-NEXT: por %xmm6, %xmm0
565564 ; SSE2-NEXT: paddb %xmm4, %xmm4
566565 ; SSE2-NEXT: pcmpgtb %xmm4, %xmm3
567 ; SSE2-NEXT: movdqa %xmm3, %xmm1
568 ; SSE2-NEXT: pandn %xmm0, %xmm1
566 ; SSE2-NEXT: movdqa %xmm3, %xmm4
567 ; SSE2-NEXT: pandn %xmm0, %xmm4
569568 ; SSE2-NEXT: psrlw $1, %xmm0
570569 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
571570 ; SSE2-NEXT: pand %xmm3, %xmm0
571 ; SSE2-NEXT: por %xmm4, %xmm0
572572 ; SSE2-NEXT: por %xmm1, %xmm0
573573 ; SSE2-NEXT: por %xmm2, %xmm0
574574 ; SSE2-NEXT: retq
685685 ; X32-SSE-NEXT: pandn %xmm2, %xmm1
686686 ; X32-SSE-NEXT: paddb %xmm2, %xmm2
687687 ; X32-SSE-NEXT: pand %xmm5, %xmm2
688 ; X32-SSE-NEXT: por %xmm1, %xmm2
689688 ; X32-SSE-NEXT: psllw $5, %xmm4
690 ; X32-SSE-NEXT: pxor %xmm1, %xmm1
691 ; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm1
692 ; X32-SSE-NEXT: movdqa %xmm1, %xmm5
693 ; X32-SSE-NEXT: pandn %xmm0, %xmm5
689 ; X32-SSE-NEXT: pxor %xmm5, %xmm5
690 ; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm5
691 ; X32-SSE-NEXT: movdqa %xmm5, %xmm6
692 ; X32-SSE-NEXT: pandn %xmm0, %xmm6
694693 ; X32-SSE-NEXT: psrlw $4, %xmm0
695694 ; X32-SSE-NEXT: pand .LCPI3_3, %xmm0
696 ; X32-SSE-NEXT: pand %xmm1, %xmm0
697 ; X32-SSE-NEXT: por %xmm5, %xmm0
695 ; X32-SSE-NEXT: pand %xmm5, %xmm0
696 ; X32-SSE-NEXT: por %xmm6, %xmm0
698697 ; X32-SSE-NEXT: paddb %xmm4, %xmm4
699 ; X32-SSE-NEXT: pxor %xmm1, %xmm1
700 ; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm1
701 ; X32-SSE-NEXT: movdqa %xmm1, %xmm5
702 ; X32-SSE-NEXT: pandn %xmm0, %xmm5
698 ; X32-SSE-NEXT: pxor %xmm5, %xmm5
699 ; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm5
700 ; X32-SSE-NEXT: movdqa %xmm5, %xmm6
701 ; X32-SSE-NEXT: pandn %xmm0, %xmm6
703702 ; X32-SSE-NEXT: psrlw $2, %xmm0
704703 ; X32-SSE-NEXT: pand .LCPI3_4, %xmm0
705 ; X32-SSE-NEXT: pand %xmm1, %xmm0
706 ; X32-SSE-NEXT: por %xmm5, %xmm0
704 ; X32-SSE-NEXT: pand %xmm5, %xmm0
705 ; X32-SSE-NEXT: por %xmm6, %xmm0
707706 ; X32-SSE-NEXT: paddb %xmm4, %xmm4
708707 ; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm3
709 ; X32-SSE-NEXT: movdqa %xmm3, %xmm1
710 ; X32-SSE-NEXT: pandn %xmm0, %xmm1
708 ; X32-SSE-NEXT: movdqa %xmm3, %xmm4
709 ; X32-SSE-NEXT: pandn %xmm0, %xmm4
711710 ; X32-SSE-NEXT: psrlw $1, %xmm0
712711 ; X32-SSE-NEXT: pand .LCPI3_5, %xmm0
713712 ; X32-SSE-NEXT: pand %xmm3, %xmm0
713 ; X32-SSE-NEXT: por %xmm4, %xmm0
714714 ; X32-SSE-NEXT: por %xmm1, %xmm0
715715 ; X32-SSE-NEXT: por %xmm2, %xmm0
716716 ; X32-SSE-NEXT: retl
946946 ; SSE2-NEXT: pand %xmm3, %xmm1
947947 ; SSE2-NEXT: psrlw $1, %xmm0
948948 ; SSE2-NEXT: pandn %xmm0, %xmm3
949 ; SSE2-NEXT: por %xmm2, %xmm1
949 ; SSE2-NEXT: por %xmm2, %xmm3
950950 ; SSE2-NEXT: por %xmm3, %xmm1
951951 ; SSE2-NEXT: movdqa %xmm1, %xmm0
952952 ; SSE2-NEXT: retq
10421042 ; X32-SSE-NEXT: pand %xmm3, %xmm1
10431043 ; X32-SSE-NEXT: psrlw $1, %xmm0
10441044 ; X32-SSE-NEXT: pandn %xmm0, %xmm3
1045 ; X32-SSE-NEXT: por %xmm2, %xmm1
1045 ; X32-SSE-NEXT: por %xmm2, %xmm3
10461046 ; X32-SSE-NEXT: por %xmm3, %xmm1
10471047 ; X32-SSE-NEXT: movdqa %xmm1, %xmm0
10481048 ; X32-SSE-NEXT: retl
10821082 ; SSE2-NEXT: pandn %xmm1, %xmm3
10831083 ; SSE2-NEXT: paddb %xmm1, %xmm1
10841084 ; SSE2-NEXT: pand %xmm4, %xmm1
1085 ; SSE2-NEXT: por %xmm3, %xmm1
1086 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [8,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7]
1087 ; SSE2-NEXT: psllw $5, %xmm3
1088 ; SSE2-NEXT: pxor %xmm4, %xmm4
1089 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm4
1090 ; SSE2-NEXT: movdqa %xmm4, %xmm5
1091 ; SSE2-NEXT: pandn %xmm0, %xmm5
1085 ; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [8,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7]
1086 ; SSE2-NEXT: psllw $5, %xmm4
1087 ; SSE2-NEXT: pxor %xmm5, %xmm5
1088 ; SSE2-NEXT: pcmpgtb %xmm4, %xmm5
1089 ; SSE2-NEXT: movdqa %xmm5, %xmm6
1090 ; SSE2-NEXT: pandn %xmm0, %xmm6
10921091 ; SSE2-NEXT: psrlw $4, %xmm0
10931092 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
1094 ; SSE2-NEXT: pand %xmm4, %xmm0
1095 ; SSE2-NEXT: por %xmm5, %xmm0
1096 ; SSE2-NEXT: paddb %xmm3, %xmm3
1097 ; SSE2-NEXT: pxor %xmm4, %xmm4
1098 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm4
1099 ; SSE2-NEXT: movdqa %xmm4, %xmm5
1100 ; SSE2-NEXT: pandn %xmm0, %xmm5
1093 ; SSE2-NEXT: pand %xmm5, %xmm0
1094 ; SSE2-NEXT: por %xmm6, %xmm0
1095 ; SSE2-NEXT: paddb %xmm4, %xmm4
1096 ; SSE2-NEXT: pxor %xmm5, %xmm5
1097 ; SSE2-NEXT: pcmpgtb %xmm4, %xmm5
1098 ; SSE2-NEXT: movdqa %xmm5, %xmm6
1099 ; SSE2-NEXT: pandn %xmm0, %xmm6
11011100 ; SSE2-NEXT: psrlw $2, %xmm0
11021101 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
1103 ; SSE2-NEXT: pand %xmm4, %xmm0
1104 ; SSE2-NEXT: por %xmm5, %xmm0
1105 ; SSE2-NEXT: paddb %xmm3, %xmm3
1106 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm2
1107 ; SSE2-NEXT: movdqa %xmm2, %xmm3
1108 ; SSE2-NEXT: pandn %xmm0, %xmm3
1102 ; SSE2-NEXT: pand %xmm5, %xmm0
1103 ; SSE2-NEXT: por %xmm6, %xmm0
1104 ; SSE2-NEXT: paddb %xmm4, %xmm4
1105 ; SSE2-NEXT: pcmpgtb %xmm4, %xmm2
1106 ; SSE2-NEXT: movdqa %xmm2, %xmm4
1107 ; SSE2-NEXT: pandn %xmm0, %xmm4
11091108 ; SSE2-NEXT: psrlw $1, %xmm0
11101109 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
11111110 ; SSE2-NEXT: pand %xmm2, %xmm0
1111 ; SSE2-NEXT: por %xmm4, %xmm0
11121112 ; SSE2-NEXT: por %xmm3, %xmm0
11131113 ; SSE2-NEXT: por %xmm1, %xmm0
11141114 ; SSE2-NEXT: retq
12201220 ; X32-SSE-NEXT: pandn %xmm1, %xmm3
12211221 ; X32-SSE-NEXT: paddb %xmm1, %xmm1
12221222 ; X32-SSE-NEXT: pand %xmm4, %xmm1
1223 ; X32-SSE-NEXT: por %xmm3, %xmm1
1224 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [8,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7]
1225 ; X32-SSE-NEXT: psllw $5, %xmm3
1226 ; X32-SSE-NEXT: pxor %xmm4, %xmm4
1227 ; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm4
1228 ; X32-SSE-NEXT: movdqa %xmm4, %xmm5
1229 ; X32-SSE-NEXT: pandn %xmm0, %xmm5
1223 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm4 = [8,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7]
1224 ; X32-SSE-NEXT: psllw $5, %xmm4
1225 ; X32-SSE-NEXT: pxor %xmm5, %xmm5
1226 ; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm5
1227 ; X32-SSE-NEXT: movdqa %xmm5, %xmm6
1228 ; X32-SSE-NEXT: pandn %xmm0, %xmm6
12301229 ; X32-SSE-NEXT: psrlw $4, %xmm0
12311230 ; X32-SSE-NEXT: pand .LCPI7_4, %xmm0
1232 ; X32-SSE-NEXT: pand %xmm4, %xmm0
1233 ; X32-SSE-NEXT: por %xmm5, %xmm0
1234 ; X32-SSE-NEXT: paddb %xmm3, %xmm3
1235 ; X32-SSE-NEXT: pxor %xmm4, %xmm4
1236 ; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm4
1237 ; X32-SSE-NEXT: movdqa %xmm4, %xmm5
1238 ; X32-SSE-NEXT: pandn %xmm0, %xmm5
1231 ; X32-SSE-NEXT: pand %xmm5, %xmm0
1232 ; X32-SSE-NEXT: por %xmm6, %xmm0
1233 ; X32-SSE-NEXT: paddb %xmm4, %xmm4
1234 ; X32-SSE-NEXT: pxor %xmm5, %xmm5
1235 ; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm5
1236 ; X32-SSE-NEXT: movdqa %xmm5, %xmm6
1237 ; X32-SSE-NEXT: pandn %xmm0, %xmm6
12391238 ; X32-SSE-NEXT: psrlw $2, %xmm0
12401239 ; X32-SSE-NEXT: pand .LCPI7_5, %xmm0
1241 ; X32-SSE-NEXT: pand %xmm4, %xmm0
1242 ; X32-SSE-NEXT: por %xmm5, %xmm0
1243 ; X32-SSE-NEXT: paddb %xmm3, %xmm3
1244 ; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm2
1245 ; X32-SSE-NEXT: movdqa %xmm2, %xmm3
1246 ; X32-SSE-NEXT: pandn %xmm0, %xmm3
1240 ; X32-SSE-NEXT: pand %xmm5, %xmm0
1241 ; X32-SSE-NEXT: por %xmm6, %xmm0
1242 ; X32-SSE-NEXT: paddb %xmm4, %xmm4
1243 ; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm2
1244 ; X32-SSE-NEXT: movdqa %xmm2, %xmm4
1245 ; X32-SSE-NEXT: pandn %xmm0, %xmm4
12471246 ; X32-SSE-NEXT: psrlw $1, %xmm0
12481247 ; X32-SSE-NEXT: pand .LCPI7_6, %xmm0
12491248 ; X32-SSE-NEXT: pand %xmm2, %xmm0
1249 ; X32-SSE-NEXT: por %xmm4, %xmm0
12501250 ; X32-SSE-NEXT: por %xmm3, %xmm0
12511251 ; X32-SSE-NEXT: por %xmm1, %xmm0
12521252 ; X32-SSE-NEXT: retl
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
44
55 ;
66 ; Variable Rotates
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
66 ;
77 ; Just one 32-bit run to make sure we do reasonable things for i64 shifts.
8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
99
1010 ;
1111 ; Variable Shifts
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
44
55 ;
66 ; Variable Shifts
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
66 ;
77 ; Just one 32-bit run to make sure we do reasonable things for i64 shifts.
8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
99
1010 ;
1111 ; Variable Shifts
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
44
55 ;
66 ; Variable Shifts
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
66 ;
77 ; Just one 32-bit run to make sure we do reasonable things for i64 shifts.
8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
8 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
99
1010 ;
1111 ; Variable Shifts
None ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
0 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
44
55 ;
66 ; Variable Shifts