llvm.org GIT mirror llvm / 67609fd
Merge PCMPEQB/PCMPEQW/PCMPEQD/PCMPEQQ and PCMPGTB/PCMPGTW/PCMPGTD/PCMPGTQ X86 ISD node types into only two node types. Simplifying opcode selection and pattern matching. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148667 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 8 years ago
4 changed file(s) with 66 addition(s) and 87 deletion(s). Raw diff Collapse all Expand all
84188418 // We are handling one of the integer comparisons here. Since SSE only has
84198419 // GT and EQ comparisons for integer, swapping operands and multiple
84208420 // operations may be required for some comparisons.
8421 unsigned Opc = 0, EQOpc = 0, GTOpc = 0;
8421 unsigned Opc = 0;
84228422 bool Swap = false, Invert = false, FlipSigns = false;
8423
8424 switch (VT.getVectorElementType().getSimpleVT().SimpleTy) {
8425 default: break;
8426 case MVT::i8: EQOpc = X86ISD::PCMPEQB; GTOpc = X86ISD::PCMPGTB; break;
8427 case MVT::i16: EQOpc = X86ISD::PCMPEQW; GTOpc = X86ISD::PCMPGTW; break;
8428 case MVT::i32: EQOpc = X86ISD::PCMPEQD; GTOpc = X86ISD::PCMPGTD; break;
8429 case MVT::i64: EQOpc = X86ISD::PCMPEQQ; GTOpc = X86ISD::PCMPGTQ; break;
8430 }
84318423
84328424 switch (SetCCOpcode) {
84338425 default: break;
84348426 case ISD::SETNE: Invert = true;
8435 case ISD::SETEQ: Opc = EQOpc; break;
8427 case ISD::SETEQ: Opc = X86ISD::PCMPEQ; break;
84368428 case ISD::SETLT: Swap = true;
8437 case ISD::SETGT: Opc = GTOpc; break;
8429 case ISD::SETGT: Opc = X86ISD::PCMPGT; break;
84388430 case ISD::SETGE: Swap = true;
8439 case ISD::SETLE: Opc = GTOpc; Invert = true; break;
8431 case ISD::SETLE: Opc = X86ISD::PCMPGT; Invert = true; break;
84408432 case ISD::SETULT: Swap = true;
8441 case ISD::SETUGT: Opc = GTOpc; FlipSigns = true; break;
8433 case ISD::SETUGT: Opc = X86ISD::PCMPGT; FlipSigns = true; break;
84428434 case ISD::SETUGE: Swap = true;
8443 case ISD::SETULE: Opc = GTOpc; FlipSigns = true; Invert = true; break;
8435 case ISD::SETULE: Opc = X86ISD::PCMPGT; FlipSigns = true; Invert = true; break;
84448436 }
84458437 if (Swap)
84468438 std::swap(Op0, Op1);
84478439
84488440 // Check that the operation in question is available (most are plain SSE2,
84498441 // but PCMPGTQ and PCMPEQQ have different requirements).
8450 if (Opc == X86ISD::PCMPGTQ && !Subtarget->hasSSE42())
8442 if (Opc == X86ISD::PCMPGT && VT == MVT::v2i64 && !Subtarget->hasSSE42())
84518443 return SDValue();
8452 if (Opc == X86ISD::PCMPEQQ && !Subtarget->hasSSE41())
8444 if (Opc == X86ISD::PCMPEQ && VT == MVT::v2i64 && !Subtarget->hasSSE41())
84538445 return SDValue();
84548446
84558447 // Since SSE has no unsigned integer comparisons, we need to flip the sign
1010710099 // R s>> 7 === R s< 0
1010810100 SDValue Zeros = getZeroVector(VT, /* HasSSE2 */true,
1010910101 /* HasAVX2 */false, DAG, dl);
10110 return DAG.getNode(X86ISD::PCMPGTB, dl, VT, Zeros, R);
10102 return DAG.getNode(X86ISD::PCMPGT, dl, VT, Zeros, R);
1011110103 }
1011210104
1011310105 // R s>> a === ((R u>> a) ^ m) - m
1015110143 // R s>> 7 === R s< 0
1015210144 SDValue Zeros = getZeroVector(VT, true /* HasSSE2 */,
1015310145 true /* HasAVX2 */, DAG, dl);
10154 return DAG.getNode(X86ISD::PCMPGTB, dl, VT, Zeros, R);
10146 return DAG.getNode(X86ISD::PCMPGT, dl, VT, Zeros, R);
1015510147 }
1015610148
1015710149 // R s>> a === ((R u>> a) ^ m) - m
1019710189 // Turn 'a' into a mask suitable for VSELECT
1019810190 SDValue VSelM = DAG.getConstant(0x80, VT);
1019910191 SDValue OpVSel = DAG.getNode(ISD::AND, dl, VT, VSelM, Op);
10200 OpVSel = DAG.getNode(X86ISD::PCMPEQB, dl, VT, OpVSel, VSelM);
10192 OpVSel = DAG.getNode(X86ISD::PCMPEQ, dl, VT, OpVSel, VSelM);
1020110193
1020210194 SDValue CM1 = DAG.getConstant(0x0f, VT);
1020310195 SDValue CM2 = DAG.getConstant(0x3f, VT);
1021210204 // a += a
1021310205 Op = DAG.getNode(ISD::ADD, dl, VT, Op, Op);
1021410206 OpVSel = DAG.getNode(ISD::AND, dl, VT, VSelM, Op);
10215 OpVSel = DAG.getNode(X86ISD::PCMPEQB, dl, VT, OpVSel, VSelM);
10207 OpVSel = DAG.getNode(X86ISD::PCMPEQ, dl, VT, OpVSel, VSelM);
1021610208
1021710209 // r = VSELECT(r, psllw(r & (char16)63, 2), a);
1021810210 M = DAG.getNode(ISD::AND, dl, VT, R, CM2);
1022410216 // a += a
1022510217 Op = DAG.getNode(ISD::ADD, dl, VT, Op, Op);
1022610218 OpVSel = DAG.getNode(ISD::AND, dl, VT, VSelM, Op);
10227 OpVSel = DAG.getNode(X86ISD::PCMPEQB, dl, VT, OpVSel, VSelM);
10219 OpVSel = DAG.getNode(X86ISD::PCMPEQ, dl, VT, OpVSel, VSelM);
1022810220
1022910221 // return VSELECT(r, r+r, a);
1023010222 R = DAG.getNode(ISD::VSELECT, dl, VT, OpVSel,
1094410936 case X86ISD::VSRAI: return "X86ISD::VSRAI";
1094510937 case X86ISD::CMPPD: return "X86ISD::CMPPD";
1094610938 case X86ISD::CMPPS: return "X86ISD::CMPPS";
10947 case X86ISD::PCMPEQB: return "X86ISD::PCMPEQB";
10948 case X86ISD::PCMPEQW: return "X86ISD::PCMPEQW";
10949 case X86ISD::PCMPEQD: return "X86ISD::PCMPEQD";
10950 case X86ISD::PCMPEQQ: return "X86ISD::PCMPEQQ";
10951 case X86ISD::PCMPGTB: return "X86ISD::PCMPGTB";
10952 case X86ISD::PCMPGTW: return "X86ISD::PCMPGTW";
10953 case X86ISD::PCMPGTD: return "X86ISD::PCMPGTD";
10954 case X86ISD::PCMPGTQ: return "X86ISD::PCMPGTQ";
10939 case X86ISD::PCMPEQ: return "X86ISD::PCMPEQ";
10940 case X86ISD::PCMPGT: return "X86ISD::PCMPGT";
1095510941 case X86ISD::ADD: return "X86ISD::ADD";
1095610942 case X86ISD::SUB: return "X86ISD::SUB";
1095710943 case X86ISD::ADC: return "X86ISD::ADC";
232232 CMPPD, CMPPS,
233233
234234 // PCMP* - Vector integer comparisons.
235 PCMPEQB, PCMPEQW, PCMPEQD, PCMPEQQ,
236 PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ,
235 PCMPEQ, PCMPGT,
237236
238237 // ADD, SUB, SMUL, etc. - Arithmetic operations with FLAGS results.
239238 ADD, SUB, ADC, SBB, SMUL,
7676 def X86vshrdq : SDNode<"X86ISD::VSRLDQ", SDTIntShiftOp>;
7777 def X86cmpps : SDNode<"X86ISD::CMPPS", SDTX86VFCMP>;
7878 def X86cmppd : SDNode<"X86ISD::CMPPD", SDTX86VFCMP>;
79 def X86pcmpeqb : SDNode<"X86ISD::PCMPEQB", SDTIntBinOp, [SDNPCommutative]>;
80 def X86pcmpeqw : SDNode<"X86ISD::PCMPEQW", SDTIntBinOp, [SDNPCommutative]>;
81 def X86pcmpeqd : SDNode<"X86ISD::PCMPEQD", SDTIntBinOp, [SDNPCommutative]>;
82 def X86pcmpeqq : SDNode<"X86ISD::PCMPEQQ", SDTIntBinOp, [SDNPCommutative]>;
83 def X86pcmpgtb : SDNode<"X86ISD::PCMPGTB", SDTIntBinOp>;
84 def X86pcmpgtw : SDNode<"X86ISD::PCMPGTW", SDTIntBinOp>;
85 def X86pcmpgtd : SDNode<"X86ISD::PCMPGTD", SDTIntBinOp>;
86 def X86pcmpgtq : SDNode<"X86ISD::PCMPGTQ", SDTIntBinOp>;
79 def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;
80 def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;
8781
8882 def X86vshl : SDNode<"X86ISD::VSHL",
8983 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
40914091 defm VPCMPGTD : PDI_binop_rm_int<0x66, "vpcmpgtd", int_x86_sse2_pcmpgt_d,
40924092 VR128, memopv2i64, i128mem, 0, 0>, VEX_4V;
40934093
4094 def : Pat<(v16i8 (X86pcmpeqb VR128:$src1, VR128:$src2)),
4094 def : Pat<(v16i8 (X86pcmpeq VR128:$src1, VR128:$src2)),
40954095 (VPCMPEQBrr VR128:$src1, VR128:$src2)>;
4096 def : Pat<(v16i8 (X86pcmpeqb VR128:$src1,
4096 def : Pat<(v16i8 (X86pcmpeq VR128:$src1,
40974097 (bc_v16i8 (memopv2i64 addr:$src2)))),
40984098 (VPCMPEQBrm VR128:$src1, addr:$src2)>;
4099 def : Pat<(v8i16 (X86pcmpeqw VR128:$src1, VR128:$src2)),
4099 def : Pat<(v8i16 (X86pcmpeq VR128:$src1, VR128:$src2)),
41004100 (VPCMPEQWrr VR128:$src1, VR128:$src2)>;
4101 def : Pat<(v8i16 (X86pcmpeqw VR128:$src1,
4101 def : Pat<(v8i16 (X86pcmpeq VR128:$src1,
41024102 (bc_v8i16 (memopv2i64 addr:$src2)))),
41034103 (VPCMPEQWrm VR128:$src1, addr:$src2)>;
4104 def : Pat<(v4i32 (X86pcmpeqd VR128:$src1, VR128:$src2)),
4104 def : Pat<(v4i32 (X86pcmpeq VR128:$src1, VR128:$src2)),
41054105 (VPCMPEQDrr VR128:$src1, VR128:$src2)>;
4106 def : Pat<(v4i32 (X86pcmpeqd VR128:$src1,
4106 def : Pat<(v4i32 (X86pcmpeq VR128:$src1,
41074107 (bc_v4i32 (memopv2i64 addr:$src2)))),
41084108 (VPCMPEQDrm VR128:$src1, addr:$src2)>;
41094109
4110 def : Pat<(v16i8 (X86pcmpgtb VR128:$src1, VR128:$src2)),
4110 def : Pat<(v16i8 (X86pcmpgt VR128:$src1, VR128:$src2)),
41114111 (VPCMPGTBrr VR128:$src1, VR128:$src2)>;
4112 def : Pat<(v16i8 (X86pcmpgtb VR128:$src1,
4112 def : Pat<(v16i8 (X86pcmpgt VR128:$src1,
41134113 (bc_v16i8 (memopv2i64 addr:$src2)))),
41144114 (VPCMPGTBrm VR128:$src1, addr:$src2)>;
4115 def : Pat<(v8i16 (X86pcmpgtw VR128:$src1, VR128:$src2)),
4115 def : Pat<(v8i16 (X86pcmpgt VR128:$src1, VR128:$src2)),
41164116 (VPCMPGTWrr VR128:$src1, VR128:$src2)>;
4117 def : Pat<(v8i16 (X86pcmpgtw VR128:$src1,
4117 def : Pat<(v8i16 (X86pcmpgt VR128:$src1,
41184118 (bc_v8i16 (memopv2i64 addr:$src2)))),
41194119 (VPCMPGTWrm VR128:$src1, addr:$src2)>;
4120 def : Pat<(v4i32 (X86pcmpgtd VR128:$src1, VR128:$src2)),
4120 def : Pat<(v4i32 (X86pcmpgt VR128:$src1, VR128:$src2)),
41214121 (VPCMPGTDrr VR128:$src1, VR128:$src2)>;
4122 def : Pat<(v4i32 (X86pcmpgtd VR128:$src1,
4122 def : Pat<(v4i32 (X86pcmpgt VR128:$src1,
41234123 (bc_v4i32 (memopv2i64 addr:$src2)))),
41244124 (VPCMPGTDrm VR128:$src1, addr:$src2)>;
41254125 }
41384138 defm VPCMPGTDY : PDI_binop_rm_int<0x66, "vpcmpgtd", int_x86_avx2_pcmpgt_d,
41394139 VR256, memopv4i64, i256mem, 0, 0>, VEX_4V;
41404140
4141 def : Pat<(v32i8 (X86pcmpeqb VR256:$src1, VR256:$src2)),
4141 def : Pat<(v32i8 (X86pcmpeq VR256:$src1, VR256:$src2)),
41424142 (VPCMPEQBYrr VR256:$src1, VR256:$src2)>;
4143 def : Pat<(v32i8 (X86pcmpeqb VR256:$src1,
4143 def : Pat<(v32i8 (X86pcmpeq VR256:$src1,
41444144 (bc_v32i8 (memopv4i64 addr:$src2)))),
41454145 (VPCMPEQBYrm VR256:$src1, addr:$src2)>;
4146 def : Pat<(v16i16 (X86pcmpeqw VR256:$src1, VR256:$src2)),
4146 def : Pat<(v16i16 (X86pcmpeq VR256:$src1, VR256:$src2)),
41474147 (VPCMPEQWYrr VR256:$src1, VR256:$src2)>;
4148 def : Pat<(v16i16 (X86pcmpeqw VR256:$src1,
4148 def : Pat<(v16i16 (X86pcmpeq VR256:$src1,
41494149 (bc_v16i16 (memopv4i64 addr:$src2)))),
41504150 (VPCMPEQWYrm VR256:$src1, addr:$src2)>;
4151 def : Pat<(v8i32 (X86pcmpeqd VR256:$src1, VR256:$src2)),
4151 def : Pat<(v8i32 (X86pcmpeq VR256:$src1, VR256:$src2)),
41524152 (VPCMPEQDYrr VR256:$src1, VR256:$src2)>;
4153 def : Pat<(v8i32 (X86pcmpeqd VR256:$src1,
4153 def : Pat<(v8i32 (X86pcmpeq VR256:$src1,
41544154 (bc_v8i32 (memopv4i64 addr:$src2)))),
41554155 (VPCMPEQDYrm VR256:$src1, addr:$src2)>;
41564156
4157 def : Pat<(v32i8 (X86pcmpgtb VR256:$src1, VR256:$src2)),
4157 def : Pat<(v32i8 (X86pcmpgt VR256:$src1, VR256:$src2)),
41584158 (VPCMPGTBYrr VR256:$src1, VR256:$src2)>;
4159 def : Pat<(v32i8 (X86pcmpgtb VR256:$src1,
4159 def : Pat<(v32i8 (X86pcmpgt VR256:$src1,
41604160 (bc_v32i8 (memopv4i64 addr:$src2)))),
41614161 (VPCMPGTBYrm VR256:$src1, addr:$src2)>;
4162 def : Pat<(v16i16 (X86pcmpgtw VR256:$src1, VR256:$src2)),
4162 def : Pat<(v16i16 (X86pcmpgt VR256:$src1, VR256:$src2)),
41634163 (VPCMPGTWYrr VR256:$src1, VR256:$src2)>;
4164 def : Pat<(v16i16 (X86pcmpgtw VR256:$src1,
4164 def : Pat<(v16i16 (X86pcmpgt VR256:$src1,
41654165 (bc_v16i16 (memopv4i64 addr:$src2)))),
41664166 (VPCMPGTWYrm VR256:$src1, addr:$src2)>;
4167 def : Pat<(v8i32 (X86pcmpgtd VR256:$src1, VR256:$src2)),
4167 def : Pat<(v8i32 (X86pcmpgt VR256:$src1, VR256:$src2)),
41684168 (VPCMPGTDYrr VR256:$src1, VR256:$src2)>;
4169 def : Pat<(v8i32 (X86pcmpgtd VR256:$src1,
4169 def : Pat<(v8i32 (X86pcmpgt VR256:$src1,
41704170 (bc_v8i32 (memopv4i64 addr:$src2)))),
41714171 (VPCMPGTDYrm VR256:$src1, addr:$src2)>;
41724172 }
41874187 } // Constraints = "$src1 = $dst"
41884188
41894189 let Predicates = [HasSSE2] in {
4190 def : Pat<(v16i8 (X86pcmpeqb VR128:$src1, VR128:$src2)),
4190 def : Pat<(v16i8 (X86pcmpeq VR128:$src1, VR128:$src2)),
41914191 (PCMPEQBrr VR128:$src1, VR128:$src2)>;
4192 def : Pat<(v16i8 (X86pcmpeqb VR128:$src1,
4192 def : Pat<(v16i8 (X86pcmpeq VR128:$src1,
41934193 (bc_v16i8 (memopv2i64 addr:$src2)))),
41944194 (PCMPEQBrm VR128:$src1, addr:$src2)>;
4195 def : Pat<(v8i16 (X86pcmpeqw VR128:$src1, VR128:$src2)),
4195 def : Pat<(v8i16 (X86pcmpeq VR128:$src1, VR128:$src2)),
41964196 (PCMPEQWrr VR128:$src1, VR128:$src2)>;
4197 def : Pat<(v8i16 (X86pcmpeqw VR128:$src1,
4197 def : Pat<(v8i16 (X86pcmpeq VR128:$src1,
41984198 (bc_v8i16 (memopv2i64 addr:$src2)))),
41994199 (PCMPEQWrm VR128:$src1, addr:$src2)>;
4200 def : Pat<(v4i32 (X86pcmpeqd VR128:$src1, VR128:$src2)),
4200 def : Pat<(v4i32 (X86pcmpeq VR128:$src1, VR128:$src2)),
42014201 (PCMPEQDrr VR128:$src1, VR128:$src2)>;
4202 def : Pat<(v4i32 (X86pcmpeqd VR128:$src1,
4202 def : Pat<(v4i32 (X86pcmpeq VR128:$src1,
42034203 (bc_v4i32 (memopv2i64 addr:$src2)))),
42044204 (PCMPEQDrm VR128:$src1, addr:$src2)>;
42054205
4206 def : Pat<(v16i8 (X86pcmpgtb VR128:$src1, VR128:$src2)),
4206 def : Pat<(v16i8 (X86pcmpgt VR128:$src1, VR128:$src2)),
42074207 (PCMPGTBrr VR128:$src1, VR128:$src2)>;
4208 def : Pat<(v16i8 (X86pcmpgtb VR128:$src1,
4208 def : Pat<(v16i8 (X86pcmpgt VR128:$src1,
42094209 (bc_v16i8 (memopv2i64 addr:$src2)))),
42104210 (PCMPGTBrm VR128:$src1, addr:$src2)>;
4211 def : Pat<(v8i16 (X86pcmpgtw VR128:$src1, VR128:$src2)),
4211 def : Pat<(v8i16 (X86pcmpgt VR128:$src1, VR128:$src2)),
42124212 (PCMPGTWrr VR128:$src1, VR128:$src2)>;
4213 def : Pat<(v8i16 (X86pcmpgtw VR128:$src1,
4213 def : Pat<(v8i16 (X86pcmpgt VR128:$src1,
42144214 (bc_v8i16 (memopv2i64 addr:$src2)))),
42154215 (PCMPGTWrm VR128:$src1, addr:$src2)>;
4216 def : Pat<(v4i32 (X86pcmpgtd VR128:$src1, VR128:$src2)),
4216 def : Pat<(v4i32 (X86pcmpgt VR128:$src1, VR128:$src2)),
42174217 (PCMPGTDrr VR128:$src1, VR128:$src2)>;
4218 def : Pat<(v4i32 (X86pcmpgtd VR128:$src1,
4218 def : Pat<(v4i32 (X86pcmpgt VR128:$src1,
42194219 (bc_v4i32 (memopv2i64 addr:$src2)))),
42204220 (PCMPGTDrm VR128:$src1, addr:$src2)>;
42214221 }
65926592 defm VPMULDQ : SS41I_binop_rm_int<0x28, "vpmuldq", int_x86_sse41_pmuldq,
65936593 0>, VEX_4V;
65946594
6595 def : Pat<(v2i64 (X86pcmpeqq VR128:$src1, VR128:$src2)),
6595 def : Pat<(v2i64 (X86pcmpeq VR128:$src1, VR128:$src2)),
65966596 (VPCMPEQQrr VR128:$src1, VR128:$src2)>;
6597 def : Pat<(v2i64 (X86pcmpeqq VR128:$src1, (memop addr:$src2))),
6597 def : Pat<(v2i64 (X86pcmpeq VR128:$src1, (memop addr:$src2))),
65986598 (VPCMPEQQrm VR128:$src1, addr:$src2)>;
65996599 }
66006600
66236623 defm VPMULDQ : SS41I_binop_rm_int_y<0x28, "vpmuldq",
66246624 int_x86_avx2_pmul_dq>, VEX_4V;
66256625
6626 def : Pat<(v4i64 (X86pcmpeqq VR256:$src1, VR256:$src2)),
6626 def : Pat<(v4i64 (X86pcmpeq VR256:$src1, VR256:$src2)),
66276627 (VPCMPEQQYrr VR256:$src1, VR256:$src2)>;
6628 def : Pat<(v4i64 (X86pcmpeqq VR256:$src1, (memop addr:$src2))),
6628 def : Pat<(v4i64 (X86pcmpeq VR256:$src1, (memop addr:$src2))),
66296629 (VPCMPEQQYrm VR256:$src1, addr:$src2)>;
66306630 }
66316631
66456645 }
66466646
66476647 let Predicates = [HasSSE41] in {
6648 def : Pat<(v2i64 (X86pcmpeqq VR128:$src1, VR128:$src2)),
6648 def : Pat<(v2i64 (X86pcmpeq VR128:$src1, VR128:$src2)),
66496649 (PCMPEQQrr VR128:$src1, VR128:$src2)>;
6650 def : Pat<(v2i64 (X86pcmpeqq VR128:$src1, (memop addr:$src2))),
6650 def : Pat<(v2i64 (X86pcmpeq VR128:$src1, (memop addr:$src2))),
66516651 (PCMPEQQrm VR128:$src1, addr:$src2)>;
66526652 }
66536653
69676967 defm VPCMPGTQ : SS42I_binop_rm_int<0x37, "vpcmpgtq", int_x86_sse42_pcmpgtq,
69686968 0>, VEX_4V;
69696969
6970 def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, VR128:$src2)),
6970 def : Pat<(v2i64 (X86pcmpgt VR128:$src1, VR128:$src2)),
69716971 (VPCMPGTQrr VR128:$src1, VR128:$src2)>;
6972 def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, (memop addr:$src2))),
6972 def : Pat<(v2i64 (X86pcmpgt VR128:$src1, (memop addr:$src2))),
69736973 (VPCMPGTQrm VR128:$src1, addr:$src2)>;
69746974 }
69756975
69776977 defm VPCMPGTQ : SS42I_binop_rm_int_y<0x37, "vpcmpgtq", int_x86_avx2_pcmpgt_q>,
69786978 VEX_4V;
69796979
6980 def : Pat<(v4i64 (X86pcmpgtq VR256:$src1, VR256:$src2)),
6980 def : Pat<(v4i64 (X86pcmpgt VR256:$src1, VR256:$src2)),
69816981 (VPCMPGTQYrr VR256:$src1, VR256:$src2)>;
6982 def : Pat<(v4i64 (X86pcmpgtq VR256:$src1, (memop addr:$src2))),
6982 def : Pat<(v4i64 (X86pcmpgt VR256:$src1, (memop addr:$src2))),
69836983 (VPCMPGTQYrm VR256:$src1, addr:$src2)>;
69846984 }
69856985
69876987 defm PCMPGTQ : SS42I_binop_rm_int<0x37, "pcmpgtq", int_x86_sse42_pcmpgtq>;
69886988
69896989 let Predicates = [HasSSE42] in {
6990 def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, VR128:$src2)),
6990 def : Pat<(v2i64 (X86pcmpgt VR128:$src1, VR128:$src2)),
69916991 (PCMPGTQrr VR128:$src1, VR128:$src2)>;
6992 def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, (memop addr:$src2))),
6992 def : Pat<(v2i64 (X86pcmpgt VR128:$src1, (memop addr:$src2))),
69936993 (PCMPGTQrm VR128:$src1, addr:$src2)>;
69946994 }
69956995