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Recommit r274692 - [X86] Transform setcc + movzbl into xorl + setcc xorl + setcc is generally the preferred sequence due to the partial register stall setcc + movzbl suffers from. As a bonus, it also encodes one byte smaller. This fixes PR28146. The original commit tried inserting an 8bit-subreg into a GR32 (not GR32_ABCD) which was not appreciated by fast regalloc on 32-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274802 91177308-0d34-0410-b5e6-96231b3b80d8 Michael Kuperstein 3 years ago
32 changed file(s) with 562 addition(s) and 324 deletion(s). Raw diff Collapse all Expand all
1818 X86FastISel.cpp
1919 X86FixupBWInsts.cpp
2020 X86FixupLEAs.cpp
21 X86FixupSetCC.cpp
2122 X86FloatingPoint.cpp
2223 X86FrameLowering.cpp
2324 X86ISelDAGToDAG.cpp
5858 /// recalculations.
5959 FunctionPass *createX86OptimizeLEAs();
6060
61 /// Return a pass that transforms setcc + movzx pairs into xor + setcc.
62 FunctionPass *createX86FixupSetCC();
63
6164 /// Return a pass that expands WinAlloca pseudo-instructions.
6265 FunctionPass *createX86WinAllocaExpander();
6366
0 //===---- X86FixupSetCC.cpp - optimize usage of LEA instructions ----------===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines a pass that fixes zero-extension of setcc patterns.
10 // X86 setcc instructions are modeled to have no input arguments, and a single
11 // GR8 output argument. This is consistent with other similar instructions
12 // (e.g. movb), but means it is impossible to directly generate a setcc into
13 // the lower GR8 of a specified GR32.
14 // This means that ISel must select (zext (setcc)) into something like
15 // seta %al; movzbl %al, %eax.
16 // Unfortunately, this can cause a stall due to the partial register write
17 // performed by the setcc. Instead, we can use:
18 // xor %eax, %eax; seta %al
19 // This both avoids the stall, and encodes shorter.
20 //===----------------------------------------------------------------------===//
21
22 #include "X86.h"
23 #include "X86InstrInfo.h"
24 #include "X86Subtarget.h"
25 #include "llvm/ADT/Statistic.h"
26 #include "llvm/CodeGen/MachineFunctionPass.h"
27 #include "llvm/CodeGen/MachineInstrBuilder.h"
28 #include "llvm/CodeGen/MachineRegisterInfo.h"
29
30 using namespace llvm;
31
32 #define DEBUG_TYPE "x86-fixup-setcc"
33
34 STATISTIC(NumSubstZexts, "Number of setcc + zext pairs substituted");
35
36 namespace {
37 class X86FixupSetCCPass : public MachineFunctionPass {
38 public:
39 X86FixupSetCCPass() : MachineFunctionPass(ID) {}
40
41 const char *getPassName() const override { return "X86 Fixup SetCC"; }
42
43 bool runOnMachineFunction(MachineFunction &MF) override;
44
45 private:
46 // Find the preceding instruction that imp-defs eflags.
47 MachineInstr *findFlagsImpDef(MachineBasicBlock *MBB,
48 MachineBasicBlock::reverse_iterator MI);
49
50 // Return true if MI imp-uses eflags.
51 bool impUsesFlags(MachineInstr *MI);
52
53 // Return true if this is the opcode of a SetCC instruction with a register
54 // output.
55 bool isSetCCr(unsigned Opode);
56
57 MachineRegisterInfo *MRI;
58 const X86InstrInfo *TII;
59
60 enum { SearchBound = 16 };
61
62 static char ID;
63 };
64
65 char X86FixupSetCCPass::ID = 0;
66 }
67
68 FunctionPass *llvm::createX86FixupSetCC() { return new X86FixupSetCCPass(); }
69
70 bool X86FixupSetCCPass::isSetCCr(unsigned Opcode) {
71 switch (Opcode) {
72 default:
73 return false;
74 case X86::SETOr:
75 case X86::SETNOr:
76 case X86::SETBr:
77 case X86::SETAEr:
78 case X86::SETEr:
79 case X86::SETNEr:
80 case X86::SETBEr:
81 case X86::SETAr:
82 case X86::SETSr:
83 case X86::SETNSr:
84 case X86::SETPr:
85 case X86::SETNPr:
86 case X86::SETLr:
87 case X86::SETGEr:
88 case X86::SETLEr:
89 case X86::SETGr:
90 return true;
91 }
92 }
93
94 // We expect the instruction *immediately* before the setcc to imp-def
95 // EFLAGS (because of scheduling glue). To make this less brittle w.r.t
96 // scheduling, look backwards until we hit the beginning of the
97 // basic-block, or a small bound (to avoid quadratic behavior).
98 MachineInstr *
99 X86FixupSetCCPass::findFlagsImpDef(MachineBasicBlock *MBB,
100 MachineBasicBlock::reverse_iterator MI) {
101 auto MBBStart = MBB->instr_rend();
102 for (int i = 0; (i < SearchBound) && (MI != MBBStart); ++i, ++MI)
103 for (auto &Op : MI->implicit_operands())
104 if ((Op.getReg() == X86::EFLAGS) && (Op.isDef()))
105 return &*MI;
106
107 return nullptr;
108 }
109
110 bool X86FixupSetCCPass::impUsesFlags(MachineInstr *MI) {
111 for (auto &Op : MI->implicit_operands())
112 if ((Op.getReg() == X86::EFLAGS) && (Op.isUse()))
113 return true;
114
115 return false;
116 }
117
118 bool X86FixupSetCCPass::runOnMachineFunction(MachineFunction &MF) {
119 bool Changed = false;
120 MRI = &MF.getRegInfo();
121 TII = MF.getSubtarget().getInstrInfo();
122
123 SmallVector ToErase;
124
125 for (auto &MBB : MF) {
126 for (auto &MI : MBB) {
127 // Find a setcc that is used by a zext.
128 // This doesn't have to be the only use, the transformation is safe
129 // regardless.
130 if (!isSetCCr(MI.getOpcode()))
131 continue;
132
133 MachineInstr *ZExt = nullptr;
134 for (auto &Use : MRI->use_instructions(MI.getOperand(0).getReg()))
135 if (Use.getOpcode() == X86::MOVZX32rr8)
136 ZExt = &Use;
137
138 if (!ZExt)
139 continue;
140
141 // Find the preceding instruction that imp-defs eflags.
142 MachineInstr *FlagsDefMI = findFlagsImpDef(
143 MI.getParent(), MachineBasicBlock::reverse_iterator(&MI));
144 if (!FlagsDefMI)
145 continue;
146
147 // We'd like to put something that clobbers eflags directly before
148 // FlagsDefMI. This can't hurt anything after FlagsDefMI, because
149 // it, itself, by definition, clobbers eflags. But it may happen that
150 // FlagsDefMI also *uses* eflags, in which case the transformation is
151 // invalid.
152 if (impUsesFlags(FlagsDefMI))
153 continue;
154
155 ++NumSubstZexts;
156 Changed = true;
157
158 // On 32-bit, we need to be careful to force an ABCD register.
159 const TargetRegisterClass *RC = MF.getSubtarget().is64Bit()
160 ? &X86::GR32RegClass
161 : &X86::GR32_ABCDRegClass;
162 unsigned ZeroReg = MRI->createVirtualRegister(RC);
163 unsigned InsertReg = MRI->createVirtualRegister(RC);
164
165 // Initialize a register with 0. This must go before the eflags def
166 BuildMI(MBB, FlagsDefMI, MI.getDebugLoc(), TII->get(X86::MOV32r0),
167 ZeroReg);
168
169 // X86 setcc only takes an output GR8, so fake a GR32 input by inserting
170 // the setcc result into the low byte of the zeroed register.
171 BuildMI(*ZExt->getParent(), ZExt, ZExt->getDebugLoc(),
172 TII->get(X86::INSERT_SUBREG), InsertReg)
173 .addReg(ZeroReg)
174 .addReg(MI.getOperand(0).getReg())
175 .addImm(X86::sub_8bit);
176 MRI->replaceRegWith(ZExt->getOperand(0).getReg(), InsertReg);
177 ToErase.push_back(ZExt);
178 }
179 }
180
181 for (auto &I : ToErase)
182 I->eraseFromParent();
183
184 return Changed;
185 }
284284 addPass(createCleanupLocalDynamicTLSPass());
285285
286286 addPass(createX86GlobalBaseRegPass());
287
288287 return false;
289288 }
290289
304303 }
305304
306305 void X86PassConfig::addPreRegAlloc() {
306 addPass(createX86FixupSetCC());
307
307308 if (getOptLevel() != CodeGenOpt::None)
308309 addPass(createX86OptimizeLEAs());
309310
None ; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movzbl
0 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep xorl
11
22 define i32 @foo(<4 x float> %a, <4 x float> %b) nounwind {
33 entry:
99 ; SOURCE-SCHED: subl
1010 ; SOURCE-SCHED: movl
1111 ; SOURCE-SCHED: sarl
12 ; SOURCE-SCHED: xorl
1213 ; SOURCE-SCHED: cmpl
1314 ; SOURCE-SCHED: setg
14 ; SOURCE-SCHED: movzbl
1515 ; SOURCE-SCHED: movb
1616 ; SOURCE-SCHED: xorl
1717 ; SOURCE-SCHED: subl
33833383 define i32 @test_mm_testnzc_pd(<2 x double> %a0, <2 x double> %a1) nounwind {
33843384 ; X32-LABEL: test_mm_testnzc_pd:
33853385 ; X32: # BB#0:
3386 ; X32-NEXT: xorl %eax, %eax
33863387 ; X32-NEXT: vtestpd %xmm1, %xmm0
33873388 ; X32-NEXT: seta %al
3388 ; X32-NEXT: movzbl %al, %eax
33893389 ; X32-NEXT: retl
33903390 ;
33913391 ; X64-LABEL: test_mm_testnzc_pd:
33923392 ; X64: # BB#0:
3393 ; X64-NEXT: xorl %eax, %eax
33933394 ; X64-NEXT: vtestpd %xmm1, %xmm0
33943395 ; X64-NEXT: seta %al
3395 ; X64-NEXT: movzbl %al, %eax
33963396 ; X64-NEXT: retq
33973397 %res = call i32 @llvm.x86.avx.vtestnzc.pd(<2 x double> %a0, <2 x double> %a1)
33983398 ret i32 %res
34023402 define i32 @test_mm256_testnzc_pd(<4 x double> %a0, <4 x double> %a1) nounwind {
34033403 ; X32-LABEL: test_mm256_testnzc_pd:
34043404 ; X32: # BB#0:
3405 ; X32-NEXT: xorl %eax, %eax
34053406 ; X32-NEXT: vtestpd %ymm1, %ymm0
34063407 ; X32-NEXT: seta %al
3407 ; X32-NEXT: movzbl %al, %eax
34083408 ; X32-NEXT: vzeroupper
34093409 ; X32-NEXT: retl
34103410 ;
34113411 ; X64-LABEL: test_mm256_testnzc_pd:
34123412 ; X64: # BB#0:
3413 ; X64-NEXT: xorl %eax, %eax
34133414 ; X64-NEXT: vtestpd %ymm1, %ymm0
34143415 ; X64-NEXT: seta %al
3415 ; X64-NEXT: movzbl %al, %eax
34163416 ; X64-NEXT: vzeroupper
34173417 ; X64-NEXT: retq
34183418 %res = call i32 @llvm.x86.avx.vtestnzc.pd.256(<4 x double> %a0, <4 x double> %a1)
34233423 define i32 @test_mm_testnzc_ps(<4 x float> %a0, <4 x float> %a1) nounwind {
34243424 ; X32-LABEL: test_mm_testnzc_ps:
34253425 ; X32: # BB#0:
3426 ; X32-NEXT: xorl %eax, %eax
34263427 ; X32-NEXT: vtestps %xmm1, %xmm0
34273428 ; X32-NEXT: seta %al
3428 ; X32-NEXT: movzbl %al, %eax
34293429 ; X32-NEXT: retl
34303430 ;
34313431 ; X64-LABEL: test_mm_testnzc_ps:
34323432 ; X64: # BB#0:
3433 ; X64-NEXT: xorl %eax, %eax
34333434 ; X64-NEXT: vtestps %xmm1, %xmm0
34343435 ; X64-NEXT: seta %al
3435 ; X64-NEXT: movzbl %al, %eax
34363436 ; X64-NEXT: retq
34373437 %res = call i32 @llvm.x86.avx.vtestnzc.ps(<4 x float> %a0, <4 x float> %a1)
34383438 ret i32 %res
34423442 define i32 @test_mm256_testnzc_ps(<8 x float> %a0, <8 x float> %a1) nounwind {
34433443 ; X32-LABEL: test_mm256_testnzc_ps:
34443444 ; X32: # BB#0:
3445 ; X32-NEXT: xorl %eax, %eax
34453446 ; X32-NEXT: vtestps %ymm1, %ymm0
34463447 ; X32-NEXT: seta %al
3447 ; X32-NEXT: movzbl %al, %eax
34483448 ; X32-NEXT: vzeroupper
34493449 ; X32-NEXT: retl
34503450 ;
34513451 ; X64-LABEL: test_mm256_testnzc_ps:
34523452 ; X64: # BB#0:
3453 ; X64-NEXT: xorl %eax, %eax
34533454 ; X64-NEXT: vtestps %ymm1, %ymm0
34543455 ; X64-NEXT: seta %al
3455 ; X64-NEXT: movzbl %al, %eax
34563456 ; X64-NEXT: vzeroupper
34573457 ; X64-NEXT: retq
34583458 %res = call i32 @llvm.x86.avx.vtestnzc.ps.256(<8 x float> %a0, <8 x float> %a1)
34633463 define i32 @test_mm256_testnzc_si256(<4 x i64> %a0, <4 x i64> %a1) nounwind {
34643464 ; X32-LABEL: test_mm256_testnzc_si256:
34653465 ; X32: # BB#0:
3466 ; X32-NEXT: xorl %eax, %eax
34663467 ; X32-NEXT: vptest %ymm1, %ymm0
34673468 ; X32-NEXT: seta %al
3468 ; X32-NEXT: movzbl %al, %eax
34693469 ; X32-NEXT: vzeroupper
34703470 ; X32-NEXT: retl
34713471 ;
34723472 ; X64-LABEL: test_mm256_testnzc_si256:
34733473 ; X64: # BB#0:
3474 ; X64-NEXT: xorl %eax, %eax
34743475 ; X64-NEXT: vptest %ymm1, %ymm0
34753476 ; X64-NEXT: seta %al
3476 ; X64-NEXT: movzbl %al, %eax
34773477 ; X64-NEXT: vzeroupper
34783478 ; X64-NEXT: retq
34793479 %res = call i32 @llvm.x86.avx.ptestnzc.256(<4 x i64> %a0, <4 x i64> %a1)
34843484 define i32 @test_mm_testz_pd(<2 x double> %a0, <2 x double> %a1) nounwind {
34853485 ; X32-LABEL: test_mm_testz_pd:
34863486 ; X32: # BB#0:
3487 ; X32-NEXT: xorl %eax, %eax
34873488 ; X32-NEXT: vtestpd %xmm1, %xmm0
34883489 ; X32-NEXT: sete %al
3489 ; X32-NEXT: movzbl %al, %eax
34903490 ; X32-NEXT: retl
34913491 ;
34923492 ; X64-LABEL: test_mm_testz_pd:
34933493 ; X64: # BB#0:
3494 ; X64-NEXT: xorl %eax, %eax
34943495 ; X64-NEXT: vtestpd %xmm1, %xmm0
34953496 ; X64-NEXT: sete %al
3496 ; X64-NEXT: movzbl %al, %eax
34973497 ; X64-NEXT: retq
34983498 %res = call i32 @llvm.x86.avx.vtestz.pd(<2 x double> %a0, <2 x double> %a1)
34993499 ret i32 %res
35033503 define i32 @test_mm256_testz_pd(<4 x double> %a0, <4 x double> %a1) nounwind {
35043504 ; X32-LABEL: test_mm256_testz_pd:
35053505 ; X32: # BB#0:
3506 ; X32-NEXT: xorl %eax, %eax
35063507 ; X32-NEXT: vtestpd %ymm1, %ymm0
35073508 ; X32-NEXT: sete %al
3508 ; X32-NEXT: movzbl %al, %eax
35093509 ; X32-NEXT: vzeroupper
35103510 ; X32-NEXT: retl
35113511 ;
35123512 ; X64-LABEL: test_mm256_testz_pd:
35133513 ; X64: # BB#0:
3514 ; X64-NEXT: xorl %eax, %eax
35143515 ; X64-NEXT: vtestpd %ymm1, %ymm0
35153516 ; X64-NEXT: sete %al
3516 ; X64-NEXT: movzbl %al, %eax
35173517 ; X64-NEXT: vzeroupper
35183518 ; X64-NEXT: retq
35193519 %res = call i32 @llvm.x86.avx.vtestz.pd.256(<4 x double> %a0, <4 x double> %a1)
35243524 define i32 @test_mm_testz_ps(<4 x float> %a0, <4 x float> %a1) nounwind {
35253525 ; X32-LABEL: test_mm_testz_ps:
35263526 ; X32: # BB#0:
3527 ; X32-NEXT: xorl %eax, %eax
35273528 ; X32-NEXT: vtestps %xmm1, %xmm0
35283529 ; X32-NEXT: sete %al
3529 ; X32-NEXT: movzbl %al, %eax
35303530 ; X32-NEXT: retl
35313531 ;
35323532 ; X64-LABEL: test_mm_testz_ps:
35333533 ; X64: # BB#0:
3534 ; X64-NEXT: xorl %eax, %eax
35343535 ; X64-NEXT: vtestps %xmm1, %xmm0
35353536 ; X64-NEXT: sete %al
3536 ; X64-NEXT: movzbl %al, %eax
35373537 ; X64-NEXT: retq
35383538 %res = call i32 @llvm.x86.avx.vtestz.ps(<4 x float> %a0, <4 x float> %a1)
35393539 ret i32 %res
35433543 define i32 @test_mm256_testz_ps(<8 x float> %a0, <8 x float> %a1) nounwind {
35443544 ; X32-LABEL: test_mm256_testz_ps:
35453545 ; X32: # BB#0:
3546 ; X32-NEXT: xorl %eax, %eax
35463547 ; X32-NEXT: vtestps %ymm1, %ymm0
35473548 ; X32-NEXT: sete %al
3548 ; X32-NEXT: movzbl %al, %eax
35493549 ; X32-NEXT: vzeroupper
35503550 ; X32-NEXT: retl
35513551 ;
35523552 ; X64-LABEL: test_mm256_testz_ps:
35533553 ; X64: # BB#0:
3554 ; X64-NEXT: xorl %eax, %eax
35543555 ; X64-NEXT: vtestps %ymm1, %ymm0
35553556 ; X64-NEXT: sete %al
3556 ; X64-NEXT: movzbl %al, %eax
35573557 ; X64-NEXT: vzeroupper
35583558 ; X64-NEXT: retq
35593559 %res = call i32 @llvm.x86.avx.vtestz.ps.256(<8 x float> %a0, <8 x float> %a1)
35643564 define i32 @test_mm256_testz_si256(<4 x i64> %a0, <4 x i64> %a1) nounwind {
35653565 ; X32-LABEL: test_mm256_testz_si256:
35663566 ; X32: # BB#0:
3567 ; X32-NEXT: xorl %eax, %eax
35673568 ; X32-NEXT: vptest %ymm1, %ymm0
35683569 ; X32-NEXT: sete %al
3569 ; X32-NEXT: movzbl %al, %eax
35703570 ; X32-NEXT: vzeroupper
35713571 ; X32-NEXT: retl
35723572 ;
35733573 ; X64-LABEL: test_mm256_testz_si256:
35743574 ; X64: # BB#0:
3575 ; X64-NEXT: xorl %eax, %eax
35753576 ; X64-NEXT: vptest %ymm1, %ymm0
35763577 ; X64-NEXT: sete %al
3577 ; X64-NEXT: movzbl %al, %eax
35783578 ; X64-NEXT: vzeroupper
35793579 ; X64-NEXT: retq
35803580 %res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a0, <4 x i64> %a1)
172172 define i32 @test_x86_sse2_comige_sd(<2 x double> %a0, <2 x double> %a1) {
173173 ; AVX-LABEL: test_x86_sse2_comige_sd:
174174 ; AVX: ## BB#0:
175 ; AVX-NEXT: xorl %eax, %eax
175176 ; AVX-NEXT: vcomisd %xmm1, %xmm0
176177 ; AVX-NEXT: setae %al
177 ; AVX-NEXT: movzbl %al, %eax
178178 ; AVX-NEXT: retl
179179 ;
180180 ; AVX512VL-LABEL: test_x86_sse2_comige_sd:
181181 ; AVX512VL: ## BB#0:
182 ; AVX512VL-NEXT: xorl %eax, %eax
182183 ; AVX512VL-NEXT: vcomisd %xmm1, %xmm0
183184 ; AVX512VL-NEXT: setae %al
184 ; AVX512VL-NEXT: movzbl %al, %eax
185185 ; AVX512VL-NEXT: retl
186186 %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
187187 ret i32 %res
192192 define i32 @test_x86_sse2_comigt_sd(<2 x double> %a0, <2 x double> %a1) {
193193 ; AVX-LABEL: test_x86_sse2_comigt_sd:
194194 ; AVX: ## BB#0:
195 ; AVX-NEXT: xorl %eax, %eax
195196 ; AVX-NEXT: vcomisd %xmm1, %xmm0
196197 ; AVX-NEXT: seta %al
197 ; AVX-NEXT: movzbl %al, %eax
198198 ; AVX-NEXT: retl
199199 ;
200200 ; AVX512VL-LABEL: test_x86_sse2_comigt_sd:
201201 ; AVX512VL: ## BB#0:
202 ; AVX512VL-NEXT: xorl %eax, %eax
202203 ; AVX512VL-NEXT: vcomisd %xmm1, %xmm0
203204 ; AVX512VL-NEXT: seta %al
204 ; AVX512VL-NEXT: movzbl %al, %eax
205205 ; AVX512VL-NEXT: retl
206206 %res = call i32 @llvm.x86.sse2.comigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
207207 ret i32 %res
212212 define i32 @test_x86_sse2_comile_sd(<2 x double> %a0, <2 x double> %a1) {
213213 ; AVX-LABEL: test_x86_sse2_comile_sd:
214214 ; AVX: ## BB#0:
215 ; AVX-NEXT: xorl %eax, %eax
215216 ; AVX-NEXT: vcomisd %xmm0, %xmm1
216217 ; AVX-NEXT: setae %al
217 ; AVX-NEXT: movzbl %al, %eax
218218 ; AVX-NEXT: retl
219219 ;
220220 ; AVX512VL-LABEL: test_x86_sse2_comile_sd:
221221 ; AVX512VL: ## BB#0:
222 ; AVX512VL-NEXT: xorl %eax, %eax
222223 ; AVX512VL-NEXT: vcomisd %xmm0, %xmm1
223224 ; AVX512VL-NEXT: setae %al
224 ; AVX512VL-NEXT: movzbl %al, %eax
225225 ; AVX512VL-NEXT: retl
226226 %res = call i32 @llvm.x86.sse2.comile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
227227 ret i32 %res
232232 define i32 @test_x86_sse2_comilt_sd(<2 x double> %a0, <2 x double> %a1) {
233233 ; AVX-LABEL: test_x86_sse2_comilt_sd:
234234 ; AVX: ## BB#0:
235 ; AVX-NEXT: xorl %eax, %eax
235236 ; AVX-NEXT: vcomisd %xmm0, %xmm1
236237 ; AVX-NEXT: seta %al
237 ; AVX-NEXT: movzbl %al, %eax
238238 ; AVX-NEXT: retl
239239 ;
240240 ; AVX512VL-LABEL: test_x86_sse2_comilt_sd:
241241 ; AVX512VL: ## BB#0:
242 ; AVX512VL-NEXT: xorl %eax, %eax
242243 ; AVX512VL-NEXT: vcomisd %xmm0, %xmm1
243244 ; AVX512VL-NEXT: seta %al
244 ; AVX512VL-NEXT: movzbl %al, %eax
245245 ; AVX512VL-NEXT: retl
246246 %res = call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
247247 ret i32 %res
12631263 define i32 @test_x86_sse2_ucomige_sd(<2 x double> %a0, <2 x double> %a1) {
12641264 ; AVX-LABEL: test_x86_sse2_ucomige_sd:
12651265 ; AVX: ## BB#0:
1266 ; AVX-NEXT: xorl %eax, %eax
12661267 ; AVX-NEXT: vucomisd %xmm1, %xmm0
12671268 ; AVX-NEXT: setae %al
1268 ; AVX-NEXT: movzbl %al, %eax
12691269 ; AVX-NEXT: retl
12701270 ;
12711271 ; AVX512VL-LABEL: test_x86_sse2_ucomige_sd:
12721272 ; AVX512VL: ## BB#0:
1273 ; AVX512VL-NEXT: xorl %eax, %eax
12731274 ; AVX512VL-NEXT: vucomisd %xmm1, %xmm0
12741275 ; AVX512VL-NEXT: setae %al
1275 ; AVX512VL-NEXT: movzbl %al, %eax
12761276 ; AVX512VL-NEXT: retl
12771277 %res = call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
12781278 ret i32 %res
12831283 define i32 @test_x86_sse2_ucomigt_sd(<2 x double> %a0, <2 x double> %a1) {
12841284 ; AVX-LABEL: test_x86_sse2_ucomigt_sd:
12851285 ; AVX: ## BB#0:
1286 ; AVX-NEXT: xorl %eax, %eax
12861287 ; AVX-NEXT: vucomisd %xmm1, %xmm0
12871288 ; AVX-NEXT: seta %al
1288 ; AVX-NEXT: movzbl %al, %eax
12891289 ; AVX-NEXT: retl
12901290 ;
12911291 ; AVX512VL-LABEL: test_x86_sse2_ucomigt_sd:
12921292 ; AVX512VL: ## BB#0:
1293 ; AVX512VL-NEXT: xorl %eax, %eax
12931294 ; AVX512VL-NEXT: vucomisd %xmm1, %xmm0
12941295 ; AVX512VL-NEXT: seta %al
1295 ; AVX512VL-NEXT: movzbl %al, %eax
12961296 ; AVX512VL-NEXT: retl
12971297 %res = call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
12981298 ret i32 %res
13031303 define i32 @test_x86_sse2_ucomile_sd(<2 x double> %a0, <2 x double> %a1) {
13041304 ; AVX-LABEL: test_x86_sse2_ucomile_sd:
13051305 ; AVX: ## BB#0:
1306 ; AVX-NEXT: xorl %eax, %eax
13061307 ; AVX-NEXT: vucomisd %xmm0, %xmm1
13071308 ; AVX-NEXT: setae %al
1308 ; AVX-NEXT: movzbl %al, %eax
13091309 ; AVX-NEXT: retl
13101310 ;
13111311 ; AVX512VL-LABEL: test_x86_sse2_ucomile_sd:
13121312 ; AVX512VL: ## BB#0:
1313 ; AVX512VL-NEXT: xorl %eax, %eax
13131314 ; AVX512VL-NEXT: vucomisd %xmm0, %xmm1
13141315 ; AVX512VL-NEXT: setae %al
1315 ; AVX512VL-NEXT: movzbl %al, %eax
13161316 ; AVX512VL-NEXT: retl
13171317 %res = call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
13181318 ret i32 %res
13231323 define i32 @test_x86_sse2_ucomilt_sd(<2 x double> %a0, <2 x double> %a1) {
13241324 ; AVX-LABEL: test_x86_sse2_ucomilt_sd:
13251325 ; AVX: ## BB#0:
1326 ; AVX-NEXT: xorl %eax, %eax
13261327 ; AVX-NEXT: vucomisd %xmm0, %xmm1
13271328 ; AVX-NEXT: seta %al
1328 ; AVX-NEXT: movzbl %al, %eax
13291329 ; AVX-NEXT: retl
13301330 ;
13311331 ; AVX512VL-LABEL: test_x86_sse2_ucomilt_sd:
13321332 ; AVX512VL: ## BB#0:
1333 ; AVX512VL-NEXT: xorl %eax, %eax
13331334 ; AVX512VL-NEXT: vucomisd %xmm0, %xmm1
13341335 ; AVX512VL-NEXT: seta %al
1335 ; AVX512VL-NEXT: movzbl %al, %eax
13361336 ; AVX512VL-NEXT: retl
13371337 %res = call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
13381338 ret i32 %res
17901790 define i32 @test_x86_sse41_ptestnzc(<2 x i64> %a0, <2 x i64> %a1) {
17911791 ; AVX-LABEL: test_x86_sse41_ptestnzc:
17921792 ; AVX: ## BB#0:
1793 ; AVX-NEXT: xorl %eax, %eax
17931794 ; AVX-NEXT: vptest %xmm1, %xmm0
17941795 ; AVX-NEXT: seta %al
1795 ; AVX-NEXT: movzbl %al, %eax
17961796 ; AVX-NEXT: retl
17971797 ;
17981798 ; AVX512VL-LABEL: test_x86_sse41_ptestnzc:
17991799 ; AVX512VL: ## BB#0:
1800 ; AVX512VL-NEXT: xorl %eax, %eax
18001801 ; AVX512VL-NEXT: vptest %xmm1, %xmm0
18011802 ; AVX512VL-NEXT: seta %al
1802 ; AVX512VL-NEXT: movzbl %al, %eax
18031803 ; AVX512VL-NEXT: retl
18041804 %res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1]
18051805 ret i32 %res
18101810 define i32 @test_x86_sse41_ptestz(<2 x i64> %a0, <2 x i64> %a1) {
18111811 ; AVX-LABEL: test_x86_sse41_ptestz:
18121812 ; AVX: ## BB#0:
1813 ; AVX-NEXT: xorl %eax, %eax
18131814 ; AVX-NEXT: vptest %xmm1, %xmm0
18141815 ; AVX-NEXT: sete %al
1815 ; AVX-NEXT: movzbl %al, %eax
18161816 ; AVX-NEXT: retl
18171817 ;
18181818 ; AVX512VL-LABEL: test_x86_sse41_ptestz:
18191819 ; AVX512VL: ## BB#0:
1820 ; AVX512VL-NEXT: xorl %eax, %eax
18201821 ; AVX512VL-NEXT: vptest %xmm1, %xmm0
18211822 ; AVX512VL-NEXT: sete %al
1822 ; AVX512VL-NEXT: movzbl %al, %eax
18231823 ; AVX512VL-NEXT: retl
18241824 %res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1]
18251825 ret i32 %res
19421942 }
19431943
19441944
1945 define i32 @test_x86_sse42_pcmpestria128(<16 x i8> %a0, <16 x i8> %a2) {
1945 define i32 @test_x86_sse42_pcmpestria128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
19461946 ; AVX-LABEL: test_x86_sse42_pcmpestria128:
19471947 ; AVX: ## BB#0:
1948 ; AVX-NEXT: pushl %ebx
19481949 ; AVX-NEXT: movl $7, %eax
19491950 ; AVX-NEXT: movl $7, %edx
1951 ; AVX-NEXT: xorl %ebx, %ebx
19501952 ; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0
1951 ; AVX-NEXT: seta %al
1952 ; AVX-NEXT: movzbl %al, %eax
1953 ; AVX-NEXT: seta %bl
1954 ; AVX-NEXT: movl %ebx, %eax
1955 ; AVX-NEXT: popl %ebx
19531956 ; AVX-NEXT: retl
19541957 ;
19551958 ; AVX512VL-LABEL: test_x86_sse42_pcmpestria128:
19561959 ; AVX512VL: ## BB#0:
1960 ; AVX512VL-NEXT: pushl %ebx
19571961 ; AVX512VL-NEXT: movl $7, %eax
19581962 ; AVX512VL-NEXT: movl $7, %edx
1963 ; AVX512VL-NEXT: xorl %ebx, %ebx
19591964 ; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0
1960 ; AVX512VL-NEXT: seta %al
1961 ; AVX512VL-NEXT: movzbl %al, %eax
1965 ; AVX512VL-NEXT: seta %bl
1966 ; AVX512VL-NEXT: movl %ebx, %eax
1967 ; AVX512VL-NEXT: popl %ebx
19621968 ; AVX512VL-NEXT: retl
19631969 %res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1]
19641970 ret i32 %res
19901996 declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
19911997
19921998
1993 define i32 @test_x86_sse42_pcmpestrio128(<16 x i8> %a0, <16 x i8> %a2) {
1999 define i32 @test_x86_sse42_pcmpestrio128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
19942000 ; AVX-LABEL: test_x86_sse42_pcmpestrio128:
19952001 ; AVX: ## BB#0:
2002 ; AVX-NEXT: pushl %ebx
19962003 ; AVX-NEXT: movl $7, %eax
19972004 ; AVX-NEXT: movl $7, %edx
2005 ; AVX-NEXT: xorl %ebx, %ebx
19982006 ; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0
1999 ; AVX-NEXT: seto %al
2000 ; AVX-NEXT: movzbl %al, %eax
2007 ; AVX-NEXT: seto %bl
2008 ; AVX-NEXT: movl %ebx, %eax
2009 ; AVX-NEXT: popl %ebx
20012010 ; AVX-NEXT: retl
20022011 ;
20032012 ; AVX512VL-LABEL: test_x86_sse42_pcmpestrio128:
20042013 ; AVX512VL: ## BB#0:
2014 ; AVX512VL-NEXT: pushl %ebx
20052015 ; AVX512VL-NEXT: movl $7, %eax
20062016 ; AVX512VL-NEXT: movl $7, %edx
2017 ; AVX512VL-NEXT: xorl %ebx, %ebx
20072018 ; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0
2008 ; AVX512VL-NEXT: seto %al
2009 ; AVX512VL-NEXT: movzbl %al, %eax
2019 ; AVX512VL-NEXT: seto %bl
2020 ; AVX512VL-NEXT: movl %ebx, %eax
2021 ; AVX512VL-NEXT: popl %ebx
20102022 ; AVX512VL-NEXT: retl
20112023 %res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1]
20122024 ret i32 %res
20142026 declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
20152027
20162028
2017 define i32 @test_x86_sse42_pcmpestris128(<16 x i8> %a0, <16 x i8> %a2) {
2029 define i32 @test_x86_sse42_pcmpestris128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
20182030 ; AVX-LABEL: test_x86_sse42_pcmpestris128:
20192031 ; AVX: ## BB#0:
2032 ; AVX-NEXT: pushl %ebx
20202033 ; AVX-NEXT: movl $7, %eax
20212034 ; AVX-NEXT: movl $7, %edx
2035 ; AVX-NEXT: xorl %ebx, %ebx
20222036 ; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0
2023 ; AVX-NEXT: sets %al
2024 ; AVX-NEXT: movzbl %al, %eax
2037 ; AVX-NEXT: sets %bl
2038 ; AVX-NEXT: movl %ebx, %eax
2039 ; AVX-NEXT: popl %ebx
20252040 ; AVX-NEXT: retl
20262041 ;
20272042 ; AVX512VL-LABEL: test_x86_sse42_pcmpestris128:
20282043 ; AVX512VL: ## BB#0:
2044 ; AVX512VL-NEXT: pushl %ebx
20292045 ; AVX512VL-NEXT: movl $7, %eax
20302046 ; AVX512VL-NEXT: movl $7, %edx
2047 ; AVX512VL-NEXT: xorl %ebx, %ebx
20312048 ; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0
2032 ; AVX512VL-NEXT: sets %al
2033 ; AVX512VL-NEXT: movzbl %al, %eax
2049 ; AVX512VL-NEXT: sets %bl
2050 ; AVX512VL-NEXT: movl %ebx, %eax
2051 ; AVX512VL-NEXT: popl %ebx
20342052 ; AVX512VL-NEXT: retl
20352053 %res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1]
20362054 ret i32 %res
20382056 declare i32 @llvm.x86.sse42.pcmpestris128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
20392057
20402058
2041 define i32 @test_x86_sse42_pcmpestriz128(<16 x i8> %a0, <16 x i8> %a2) {
2059 define i32 @test_x86_sse42_pcmpestriz128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
20422060 ; AVX-LABEL: test_x86_sse42_pcmpestriz128:
20432061 ; AVX: ## BB#0:
2062 ; AVX-NEXT: pushl %ebx
20442063 ; AVX-NEXT: movl $7, %eax
20452064 ; AVX-NEXT: movl $7, %edx
2065 ; AVX-NEXT: xorl %ebx, %ebx
20462066 ; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0
2047 ; AVX-NEXT: sete %al
2048 ; AVX-NEXT: movzbl %al, %eax
2067 ; AVX-NEXT: sete %bl
2068 ; AVX-NEXT: movl %ebx, %eax
2069 ; AVX-NEXT: popl %ebx
20492070 ; AVX-NEXT: retl
20502071 ;
20512072 ; AVX512VL-LABEL: test_x86_sse42_pcmpestriz128:
20522073 ; AVX512VL: ## BB#0:
2074 ; AVX512VL-NEXT: pushl %ebx
20532075 ; AVX512VL-NEXT: movl $7, %eax
20542076 ; AVX512VL-NEXT: movl $7, %edx
2077 ; AVX512VL-NEXT: xorl %ebx, %ebx
20552078 ; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0
2056 ; AVX512VL-NEXT: sete %al
2057 ; AVX512VL-NEXT: movzbl %al, %eax
2079 ; AVX512VL-NEXT: sete %bl
2080 ; AVX512VL-NEXT: movl %ebx, %eax
2081 ; AVX512VL-NEXT: popl %ebx
20582082 ; AVX512VL-NEXT: retl
20592083 %res = call i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1]
20602084 ret i32 %res
21502174 define i32 @test_x86_sse42_pcmpistria128(<16 x i8> %a0, <16 x i8> %a1) {
21512175 ; AVX-LABEL: test_x86_sse42_pcmpistria128:
21522176 ; AVX: ## BB#0:
2177 ; AVX-NEXT: xorl %eax, %eax
21532178 ; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0
21542179 ; AVX-NEXT: seta %al
2155 ; AVX-NEXT: movzbl %al, %eax
21562180 ; AVX-NEXT: retl
21572181 ;
21582182 ; AVX512VL-LABEL: test_x86_sse42_pcmpistria128:
21592183 ; AVX512VL: ## BB#0:
2184 ; AVX512VL-NEXT: xorl %eax, %eax
21602185 ; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0
21612186 ; AVX512VL-NEXT: seta %al
2162 ; AVX512VL-NEXT: movzbl %al, %eax
21632187 ; AVX512VL-NEXT: retl
21642188 %res = call i32 @llvm.x86.sse42.pcmpistria128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1]
21652189 ret i32 %res
21902214 define i32 @test_x86_sse42_pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1) {
21912215 ; AVX-LABEL: test_x86_sse42_pcmpistrio128:
21922216 ; AVX: ## BB#0:
2217 ; AVX-NEXT: xorl %eax, %eax
21932218 ; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0
21942219 ; AVX-NEXT: seto %al
2195 ; AVX-NEXT: movzbl %al, %eax
21962220 ; AVX-NEXT: retl
21972221 ;
21982222 ; AVX512VL-LABEL: test_x86_sse42_pcmpistrio128:
21992223 ; AVX512VL: ## BB#0:
2224 ; AVX512VL-NEXT: xorl %eax, %eax
22002225 ; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0
22012226 ; AVX512VL-NEXT: seto %al
2202 ; AVX512VL-NEXT: movzbl %al, %eax
22032227 ; AVX512VL-NEXT: retl
22042228 %res = call i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1]
22052229 ret i32 %res
22102234 define i32 @test_x86_sse42_pcmpistris128(<16 x i8> %a0, <16 x i8> %a1) {
22112235 ; AVX-LABEL: test_x86_sse42_pcmpistris128:
22122236 ; AVX: ## BB#0:
2237 ; AVX-NEXT: xorl %eax, %eax
22132238 ; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0
22142239 ; AVX-NEXT: sets %al
2215 ; AVX-NEXT: movzbl %al, %eax
22162240 ; AVX-NEXT: retl
22172241 ;
22182242 ; AVX512VL-LABEL: test_x86_sse42_pcmpistris128:
22192243 ; AVX512VL: ## BB#0:
2244 ; AVX512VL-NEXT: xorl %eax, %eax
22202245 ; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0
22212246 ; AVX512VL-NEXT: sets %al
2222 ; AVX512VL-NEXT: movzbl %al, %eax
22232247 ; AVX512VL-NEXT: retl
22242248 %res = call i32 @llvm.x86.sse42.pcmpistris128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1]
22252249 ret i32 %res
22302254 define i32 @test_x86_sse42_pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1) {
22312255 ; AVX-LABEL: test_x86_sse42_pcmpistriz128:
22322256 ; AVX: ## BB#0:
2257 ; AVX-NEXT: xorl %eax, %eax
22332258 ; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0
22342259 ; AVX-NEXT: sete %al
2235 ; AVX-NEXT: movzbl %al, %eax
22362260 ; AVX-NEXT: retl
22372261 ;
22382262 ; AVX512VL-LABEL: test_x86_sse42_pcmpistriz128:
22392263 ; AVX512VL: ## BB#0:
2264 ; AVX512VL-NEXT: xorl %eax, %eax
22402265 ; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0
22412266 ; AVX512VL-NEXT: sete %al
2242 ; AVX512VL-NEXT: movzbl %al, %eax
22432267 ; AVX512VL-NEXT: retl
22442268 %res = call i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1]
22452269 ret i32 %res
23562380 define i32 @test_x86_sse_comige_ss(<4 x float> %a0, <4 x float> %a1) {
23572381 ; AVX-LABEL: test_x86_sse_comige_ss:
23582382 ; AVX: ## BB#0:
2383 ; AVX-NEXT: xorl %eax, %eax
23592384 ; AVX-NEXT: vcomiss %xmm1, %xmm0
23602385 ; AVX-NEXT: setae %al
2361 ; AVX-NEXT: movzbl %al, %eax
23622386 ; AVX-NEXT: retl
23632387 ;
23642388 ; AVX512VL-LABEL: test_x86_sse_comige_ss:
23652389 ; AVX512VL: ## BB#0:
2390 ; AVX512VL-NEXT: xorl %eax, %eax
23662391 ; AVX512VL-NEXT: vcomiss %xmm1, %xmm0
23672392 ; AVX512VL-NEXT: setae %al
2368 ; AVX512VL-NEXT: movzbl %al, %eax
23692393 ; AVX512VL-NEXT: retl
23702394 %res = call i32 @llvm.x86.sse.comige.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
23712395 ret i32 %res
23762400 define i32 @test_x86_sse_comigt_ss(<4 x float> %a0, <4 x float> %a1) {
23772401 ; AVX-LABEL: test_x86_sse_comigt_ss:
23782402 ; AVX: ## BB#0:
2403 ; AVX-NEXT: xorl %eax, %eax
23792404 ; AVX-NEXT: vcomiss %xmm1, %xmm0
23802405 ; AVX-NEXT: seta %al
2381 ; AVX-NEXT: movzbl %al, %eax
23822406 ; AVX-NEXT: retl
23832407 ;
23842408 ; AVX512VL-LABEL: test_x86_sse_comigt_ss:
23852409 ; AVX512VL: ## BB#0:
2410 ; AVX512VL-NEXT: xorl %eax, %eax
23862411 ; AVX512VL-NEXT: vcomiss %xmm1, %xmm0
23872412 ; AVX512VL-NEXT: seta %al
2388 ; AVX512VL-NEXT: movzbl %al, %eax
23892413 ; AVX512VL-NEXT: retl
23902414 %res = call i32 @llvm.x86.sse.comigt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
23912415 ret i32 %res
23962420 define i32 @test_x86_sse_comile_ss(<4 x float> %a0, <4 x float> %a1) {
23972421 ; AVX-LABEL: test_x86_sse_comile_ss:
23982422 ; AVX: ## BB#0:
2423 ; AVX-NEXT: xorl %eax, %eax
23992424 ; AVX-NEXT: vcomiss %xmm0, %xmm1
24002425 ; AVX-NEXT: setae %al
2401 ; AVX-NEXT: movzbl %al, %eax
24022426 ; AVX-NEXT: retl
24032427 ;
24042428 ; AVX512VL-LABEL: test_x86_sse_comile_ss:
24052429 ; AVX512VL: ## BB#0:
2430 ; AVX512VL-NEXT: xorl %eax, %eax
24062431 ; AVX512VL-NEXT: vcomiss %xmm0, %xmm1
24072432 ; AVX512VL-NEXT: setae %al
2408 ; AVX512VL-NEXT: movzbl %al, %eax
24092433 ; AVX512VL-NEXT: retl
24102434 %res = call i32 @llvm.x86.sse.comile.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
24112435 ret i32 %res
24162440 define i32 @test_x86_sse_comilt_ss(<4 x float> %a0, <4 x float> %a1) {
24172441 ; AVX-LABEL: test_x86_sse_comilt_ss:
24182442 ; AVX: ## BB#0:
2443 ; AVX-NEXT: xorl %eax, %eax
24192444 ; AVX-NEXT: vcomiss %xmm0, %xmm1
24202445 ; AVX-NEXT: seta %al
2421 ; AVX-NEXT: movzbl %al, %eax
24222446 ; AVX-NEXT: retl
24232447 ;
24242448 ; AVX512VL-LABEL: test_x86_sse_comilt_ss:
24252449 ; AVX512VL: ## BB#0:
2450 ; AVX512VL-NEXT: xorl %eax, %eax
24262451 ; AVX512VL-NEXT: vcomiss %xmm0, %xmm1
24272452 ; AVX512VL-NEXT: seta %al
2428 ; AVX512VL-NEXT: movzbl %al, %eax
24292453 ; AVX512VL-NEXT: retl
24302454 %res = call i32 @llvm.x86.sse.comilt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
24312455 ret i32 %res
27962820 define i32 @test_x86_sse_ucomige_ss(<4 x float> %a0, <4 x float> %a1) {
27972821 ; AVX-LABEL: test_x86_sse_ucomige_ss:
27982822 ; AVX: ## BB#0:
2823 ; AVX-NEXT: xorl %eax, %eax
27992824 ; AVX-NEXT: vucomiss %xmm1, %xmm0
28002825 ; AVX-NEXT: setae %al
2801 ; AVX-NEXT: movzbl %al, %eax
28022826 ; AVX-NEXT: retl
28032827 ;
28042828 ; AVX512VL-LABEL: test_x86_sse_ucomige_ss:
28052829 ; AVX512VL: ## BB#0:
2830 ; AVX512VL-NEXT: xorl %eax, %eax
28062831 ; AVX512VL-NEXT: vucomiss %xmm1, %xmm0
28072832 ; AVX512VL-NEXT: setae %al
2808 ; AVX512VL-NEXT: movzbl %al, %eax
28092833 ; AVX512VL-NEXT: retl
28102834 %res = call i32 @llvm.x86.sse.ucomige.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
28112835 ret i32 %res
28162840 define i32 @test_x86_sse_ucomigt_ss(<4 x float> %a0, <4 x float> %a1) {
28172841 ; AVX-LABEL: test_x86_sse_ucomigt_ss:
28182842 ; AVX: ## BB#0:
2843 ; AVX-NEXT: xorl %eax, %eax
28192844 ; AVX-NEXT: vucomiss %xmm1, %xmm0
28202845 ; AVX-NEXT: seta %al
2821 ; AVX-NEXT: movzbl %al, %eax
28222846 ; AVX-NEXT: retl
28232847 ;
28242848 ; AVX512VL-LABEL: test_x86_sse_ucomigt_ss:
28252849 ; AVX512VL: ## BB#0:
2850 ; AVX512VL-NEXT: xorl %eax, %eax
28262851 ; AVX512VL-NEXT: vucomiss %xmm1, %xmm0
28272852 ; AVX512VL-NEXT: seta %al
2828 ; AVX512VL-NEXT: movzbl %al, %eax
28292853 ; AVX512VL-NEXT: retl
28302854 %res = call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
28312855 ret i32 %res
28362860 define i32 @test_x86_sse_ucomile_ss(<4 x float> %a0, <4 x float> %a1) {
28372861 ; AVX-LABEL: test_x86_sse_ucomile_ss:
28382862 ; AVX: ## BB#0:
2863 ; AVX-NEXT: xorl %eax, %eax
28392864 ; AVX-NEXT: vucomiss %xmm0, %xmm1
28402865 ; AVX-NEXT: setae %al
2841 ; AVX-NEXT: movzbl %al, %eax
28422866 ; AVX-NEXT: retl
28432867 ;
28442868 ; AVX512VL-LABEL: test_x86_sse_ucomile_ss:
28452869 ; AVX512VL: ## BB#0:
2870 ; AVX512VL-NEXT: xorl %eax, %eax
28462871 ; AVX512VL-NEXT: vucomiss %xmm0, %xmm1
28472872 ; AVX512VL-NEXT: setae %al
2848 ; AVX512VL-NEXT: movzbl %al, %eax
28492873 ; AVX512VL-NEXT: retl
28502874 %res = call i32 @llvm.x86.sse.ucomile.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
28512875 ret i32 %res
28562880 define i32 @test_x86_sse_ucomilt_ss(<4 x float> %a0, <4 x float> %a1) {
28572881 ; AVX-LABEL: test_x86_sse_ucomilt_ss:
28582882 ; AVX: ## BB#0:
2883 ; AVX-NEXT: xorl %eax, %eax
28592884 ; AVX-NEXT: vucomiss %xmm0, %xmm1
28602885 ; AVX-NEXT: seta %al
2861 ; AVX-NEXT: movzbl %al, %eax
28622886 ; AVX-NEXT: retl
28632887 ;
28642888 ; AVX512VL-LABEL: test_x86_sse_ucomilt_ss:
28652889 ; AVX512VL: ## BB#0:
2890 ; AVX512VL-NEXT: xorl %eax, %eax
28662891 ; AVX512VL-NEXT: vucomiss %xmm0, %xmm1
28672892 ; AVX512VL-NEXT: seta %al
2868 ; AVX512VL-NEXT: movzbl %al, %eax
28692893 ; AVX512VL-NEXT: retl
28702894 %res = call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
28712895 ret i32 %res
37773801 define i32 @test_x86_avx_ptestnzc_256(<4 x i64> %a0, <4 x i64> %a1) {
37783802 ; AVX-LABEL: test_x86_avx_ptestnzc_256:
37793803 ; AVX: ## BB#0:
3804 ; AVX-NEXT: xorl %eax, %eax
37803805 ; AVX-NEXT: vptest %ymm1, %ymm0
37813806 ; AVX-NEXT: seta %al
3782 ; AVX-NEXT: movzbl %al, %eax
37833807 ; AVX-NEXT: vzeroupper
37843808 ; AVX-NEXT: retl
37853809 ;
37863810 ; AVX512VL-LABEL: test_x86_avx_ptestnzc_256:
37873811 ; AVX512VL: ## BB#0:
3812 ; AVX512VL-NEXT: xorl %eax, %eax
37883813 ; AVX512VL-NEXT: vptest %ymm1, %ymm0
37893814 ; AVX512VL-NEXT: seta %al
3790 ; AVX512VL-NEXT: movzbl %al, %eax
37913815 ; AVX512VL-NEXT: retl
37923816 %res = call i32 @llvm.x86.avx.ptestnzc.256(<4 x i64> %a0, <4 x i64> %a1) ; [#uses=1]
37933817 ret i32 %res
37983822 define i32 @test_x86_avx_ptestz_256(<4 x i64> %a0, <4 x i64> %a1) {
37993823 ; AVX-LABEL: test_x86_avx_ptestz_256:
38003824 ; AVX: ## BB#0:
3825 ; AVX-NEXT: xorl %eax, %eax
38013826 ; AVX-NEXT: vptest %ymm1, %ymm0
38023827 ; AVX-NEXT: sete %al
3803 ; AVX-NEXT: movzbl %al, %eax
38043828 ; AVX-NEXT: vzeroupper
38053829 ; AVX-NEXT: retl
38063830 ;
38073831 ; AVX512VL-LABEL: test_x86_avx_ptestz_256:
38083832 ; AVX512VL: ## BB#0:
3833 ; AVX512VL-NEXT: xorl %eax, %eax
38093834 ; AVX512VL-NEXT: vptest %ymm1, %ymm0
38103835 ; AVX512VL-NEXT: sete %al
3811 ; AVX512VL-NEXT: movzbl %al, %eax
38123836 ; AVX512VL-NEXT: retl
38133837 %res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a0, <4 x i64> %a1) ; [#uses=1]
38143838 ret i32 %res
41744198 define i32 @test_x86_avx_vtestnzc_pd(<2 x double> %a0, <2 x double> %a1) {
41754199 ; AVX-LABEL: test_x86_avx_vtestnzc_pd:
41764200 ; AVX: ## BB#0:
4201 ; AVX-NEXT: xorl %eax, %eax
41774202 ; AVX-NEXT: vtestpd %xmm1, %xmm0
41784203 ; AVX-NEXT: seta %al
4179 ; AVX-NEXT: movzbl %al, %eax
41804204 ; AVX-NEXT: retl
41814205 ;
41824206 ; AVX512VL-LABEL: test_x86_avx_vtestnzc_pd:
41834207 ; AVX512VL: ## BB#0:
4208 ; AVX512VL-NEXT: xorl %eax, %eax
41844209 ; AVX512VL-NEXT: vtestpd %xmm1, %xmm0
41854210 ; AVX512VL-NEXT: seta %al
4186 ; AVX512VL-NEXT: movzbl %al, %eax
41874211 ; AVX512VL-NEXT: retl
41884212 %res = call i32 @llvm.x86.avx.vtestnzc.pd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
41894213 ret i32 %res
41944218 define i32 @test_x86_avx_vtestnzc_pd_256(<4 x double> %a0, <4 x double> %a1) {
41954219 ; AVX-LABEL: test_x86_avx_vtestnzc_pd_256:
41964220 ; AVX: ## BB#0:
4221 ; AVX-NEXT: xorl %eax, %eax
41974222 ; AVX-NEXT: vtestpd %ymm1, %ymm0
41984223 ; AVX-NEXT: seta %al
4199 ; AVX-NEXT: movzbl %al, %eax
42004224 ; AVX-NEXT: vzeroupper
42014225 ; AVX-NEXT: retl
42024226 ;
42034227 ; AVX512VL-LABEL: test_x86_avx_vtestnzc_pd_256:
42044228 ; AVX512VL: ## BB#0:
4229 ; AVX512VL-NEXT: xorl %eax, %eax
42054230 ; AVX512VL-NEXT: vtestpd %ymm1, %ymm0
42064231 ; AVX512VL-NEXT: seta %al
4207 ; AVX512VL-NEXT: movzbl %al, %eax
42084232 ; AVX512VL-NEXT: retl
42094233 %res = call i32 @llvm.x86.avx.vtestnzc.pd.256(<4 x double> %a0, <4 x double> %a1) ; [#uses=1]
42104234 ret i32 %res
42154239 define i32 @test_x86_avx_vtestnzc_ps(<4 x float> %a0, <4 x float> %a1) {
42164240 ; AVX-LABEL: test_x86_avx_vtestnzc_ps:
42174241 ; AVX: ## BB#0:
4242 ; AVX-NEXT: xorl %eax, %eax
42184243 ; AVX-NEXT: vtestps %xmm1, %xmm0
42194244 ; AVX-NEXT: seta %al
4220 ; AVX-NEXT: movzbl %al, %eax
42214245 ; AVX-NEXT: retl
42224246 ;
42234247 ; AVX512VL-LABEL: test_x86_avx_vtestnzc_ps:
42244248 ; AVX512VL: ## BB#0:
4249 ; AVX512VL-NEXT: xorl %eax, %eax
42254250 ; AVX512VL-NEXT: vtestps %xmm1, %xmm0
42264251 ; AVX512VL-NEXT: seta %al
4227 ; AVX512VL-NEXT: movzbl %al, %eax
42284252 ; AVX512VL-NEXT: retl
42294253 %res = call i32 @llvm.x86.avx.vtestnzc.ps(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
42304254 ret i32 %res
42354259 define i32 @test_x86_avx_vtestnzc_ps_256(<8 x float> %a0, <8 x float> %a1) {
42364260 ; AVX-LABEL: test_x86_avx_vtestnzc_ps_256:
42374261 ; AVX: ## BB#0:
4262 ; AVX-NEXT: xorl %eax, %eax
42384263 ; AVX-NEXT: vtestps %ymm1, %ymm0
42394264 ; AVX-NEXT: seta %al
4240 ; AVX-NEXT: movzbl %al, %eax
42414265 ; AVX-NEXT: vzeroupper
42424266 ; AVX-NEXT: retl
42434267 ;
42444268 ; AVX512VL-LABEL: test_x86_avx_vtestnzc_ps_256:
42454269 ; AVX512VL: ## BB#0:
4270 ; AVX512VL-NEXT: xorl %eax, %eax
42464271 ; AVX512VL-NEXT: vtestps %ymm1, %ymm0
42474272 ; AVX512VL-NEXT: seta %al
4248 ; AVX512VL-NEXT: movzbl %al, %eax
42494273 ; AVX512VL-NEXT: retl
42504274 %res = call i32 @llvm.x86.avx.vtestnzc.ps.256(<8 x float> %a0, <8 x float> %a1) ; [#uses=1]
42514275 ret i32 %res
42564280 define i32 @test_x86_avx_vtestz_pd(<2 x double> %a0, <2 x double> %a1) {
42574281 ; AVX-LABEL: test_x86_avx_vtestz_pd:
42584282 ; AVX: ## BB#0:
4283 ; AVX-NEXT: xorl %eax, %eax
42594284 ; AVX-NEXT: vtestpd %xmm1, %xmm0
42604285 ; AVX-NEXT: sete %al
4261 ; AVX-NEXT: movzbl %al, %eax
42624286 ; AVX-NEXT: retl
42634287 ;
42644288 ; AVX512VL-LABEL: test_x86_avx_vtestz_pd:
42654289 ; AVX512VL: ## BB#0:
4290 ; AVX512VL-NEXT: xorl %eax, %eax
42664291 ; AVX512VL-NEXT: vtestpd %xmm1, %xmm0
42674292 ; AVX512VL-NEXT: sete %al
4268 ; AVX512VL-NEXT: movzbl %al, %eax
42694293 ; AVX512VL-NEXT: retl
42704294 %res = call i32 @llvm.x86.avx.vtestz.pd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
42714295 ret i32 %res
42764300 define i32 @test_x86_avx_vtestz_pd_256(<4 x double> %a0, <4 x double> %a1) {
42774301 ; AVX-LABEL: test_x86_avx_vtestz_pd_256:
42784302 ; AVX: ## BB#0:
4303 ; AVX-NEXT: xorl %eax, %eax
42794304 ; AVX-NEXT: vtestpd %ymm1, %ymm0
42804305 ; AVX-NEXT: sete %al
4281 ; AVX-NEXT: movzbl %al, %eax
42824306 ; AVX-NEXT: vzeroupper
42834307 ; AVX-NEXT: retl
42844308 ;
42854309 ; AVX512VL-LABEL: test_x86_avx_vtestz_pd_256:
42864310 ; AVX512VL: ## BB#0:
4311 ; AVX512VL-NEXT: xorl %eax, %eax
42874312 ; AVX512VL-NEXT: vtestpd %ymm1, %ymm0
42884313 ; AVX512VL-NEXT: sete %al
4289 ; AVX512VL-NEXT: movzbl %al, %eax
42904314 ; AVX512VL-NEXT: retl
42914315 %res = call i32 @llvm.x86.avx.vtestz.pd.256(<4 x double> %a0, <4 x double> %a1) ; [#uses=1]
42924316 ret i32 %res
42974321 define i32 @test_x86_avx_vtestz_ps(<4 x float> %a0, <4 x float> %a1) {
42984322 ; AVX-LABEL: test_x86_avx_vtestz_ps:
42994323 ; AVX: ## BB#0:
4324 ; AVX-NEXT: xorl %eax, %eax
43004325 ; AVX-NEXT: vtestps %xmm1, %xmm0
43014326 ; AVX-NEXT: sete %al
4302 ; AVX-NEXT: movzbl %al, %eax
43034327 ; AVX-NEXT: retl
43044328 ;
43054329 ; AVX512VL-LABEL: test_x86_avx_vtestz_ps:
43064330 ; AVX512VL: ## BB#0:
4331 ; AVX512VL-NEXT: xorl %eax, %eax
43074332 ; AVX512VL-NEXT: vtestps %xmm1, %xmm0
43084333 ; AVX512VL-NEXT: sete %al
4309 ; AVX512VL-NEXT: movzbl %al, %eax
43104334 ; AVX512VL-NEXT: retl
43114335 %res = call i32 @llvm.x86.avx.vtestz.ps(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
43124336 ret i32 %res
43174341 define i32 @test_x86_avx_vtestz_ps_256(<8 x float> %a0, <8 x float> %a1) {
43184342 ; AVX-LABEL: test_x86_avx_vtestz_ps_256:
43194343 ; AVX: ## BB#0:
4344 ; AVX-NEXT: xorl %eax, %eax
43204345 ; AVX-NEXT: vtestps %ymm1, %ymm0
43214346 ; AVX-NEXT: sete %al
4322 ; AVX-NEXT: movzbl %al, %eax
43234347 ; AVX-NEXT: vzeroupper
43244348 ; AVX-NEXT: retl
43254349 ;
43264350 ; AVX512VL-LABEL: test_x86_avx_vtestz_ps_256:
43274351 ; AVX512VL: ## BB#0:
4352 ; AVX512VL-NEXT: xorl %eax, %eax
43284353 ; AVX512VL-NEXT: vtestps %ymm1, %ymm0
43294354 ; AVX512VL-NEXT: sete %al
4330 ; AVX512VL-NEXT: movzbl %al, %eax
43314355 ; AVX512VL-NEXT: retl
43324356 %res = call i32 @llvm.x86.avx.vtestz.ps.256(<8 x float> %a0, <8 x float> %a1) ; [#uses=1]
43334357 ret i32 %res
9393 define i32 @test6(i32 %a, i32 %b) {
9494 ; ALL-LABEL: test6:
9595 ; ALL: ## BB#0:
96 ; ALL-NEXT: xorl %eax, %eax
9697 ; ALL-NEXT: cmpl %esi, %edi
9798 ; ALL-NEXT: sete %al
98 ; ALL-NEXT: movzbl %al, %eax
9999 ; ALL-NEXT: retq
100100 %cmp = icmp eq i32 %a, %b
101101 %res = zext i1 %cmp to i32
105105 define i32 @test7(double %x, double %y) #2 {
106106 ; ALL-LABEL: test7:
107107 ; ALL: ## BB#0: ## %entry
108 ; ALL-NEXT: xorl %eax, %eax
108109 ; ALL-NEXT: vucomisd %xmm1, %xmm0
109110 ; ALL-NEXT: setne %al
110 ; ALL-NEXT: movzbl %al, %eax
111111 ; ALL-NEXT: retq
112112 entry:
113113 %0 = fcmp one double %x, %y
66 ; CHECK: ## BB#0:
77 ; CHECK-NEXT: kmovw %esi, %k0
88 ; CHECK-NEXT: kmovw %edi, %k1
9 ; CHECK-NEXT: xorl %eax, %eax
910 ; CHECK-NEXT: kortestw %k0, %k1
1011 ; CHECK-NEXT: sete %al
11 ; CHECK-NEXT: movzbl %al, %eax
1212 ; CHECK-NEXT: retq
1313 %res = call i32 @llvm.x86.avx512.kortestz.w(i16 %a0, i16 %a1)
1414 ret i32 %res
570570 ; KNL-NEXT: vpbroadcastd %eax, %zmm1 {%k1} {z}
571571 ; KNL-NEXT: vpmovdb %zmm1, %xmm1
572572 ; KNL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1
573 ; KNL-NEXT: xorl %ecx, %ecx
573574 ; KNL-NEXT: cmpl %edx, %esi
574575 ; KNL-NEXT: setg %cl
575 ; KNL-NEXT: movzbl %cl, %ecx
576576 ; KNL-NEXT: vpinsrb $5, %ecx, %xmm0, %xmm0
577577 ; KNL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]
578578 ; KNL-NEXT: vpsllw $7, %ymm0, %ymm0
200200 ; CHECK-NEXT: btl %esi, %edi
201201 ; CHECK-NEXT: setae %al
202202 ; CHECK-NEXT: retq
203 ;
204203 %shl = shl i32 1, %y
205204 %and = and i32 %x, %shl
206205 %cmp = icmp ne i32 %and, %shl
212211 ; CHECK-LABEL: and_cmp_not_one_use:
213212 ; CHECK: # BB#0:
214213 ; CHECK-NEXT: andl $37, %edi
214 ; CHECK-NEXT: xorl %eax, %eax
215215 ; CHECK-NEXT: cmpl $37, %edi
216216 ; CHECK-NEXT: sete %al
217 ; CHECK-NEXT: movzbl %al, %eax
218217 ; CHECK-NEXT: addl %edi, %eax
219218 ; CHECK-NEXT: retq
220 ;
221219 %and = and i32 %x, 37
222220 %cmp = icmp eq i32 %and, 37
223221 %ext = zext i1 %cmp to i32
119119 define i32 @test5(i32* nocapture %P) nounwind readonly {
120120 entry:
121121 ; CHECK-LABEL: test5:
122 ; CHECK: xorl %eax, %eax
122123 ; CHECK: setg %al
123 ; CHECK: movzbl %al, %eax
124124 ; CHECK: orl $-2, %eax
125125 ; CHECK: ret
126126
133133 define i32 @test6(i32* nocapture %P) nounwind readonly {
134134 entry:
135135 ; CHECK-LABEL: test6:
136 ; CHECK: xorl %eax, %eax
136137 ; CHECK: setl %al
137 ; CHECK: movzbl %al, %eax
138138 ; CHECK: leal 4(%rax,%rax,8), %eax
139139 ; CHECK: ret
140140 %0 = load i32, i32* %P, align 4 ; [#uses=1]
4848 %r = zext i1 %t to i64
4949 ret i64 %r
5050 ; CHECK-LABEL: test3:
51 ; CHECK: xorl %eax, %eax
5152 ; CHECK: testq %rdi, %rdi
5253 ; CHECK: sete %al
53 ; CHECK: movzbl %al, %eax
5454 ; CHECK: ret
5555 }
5656
5959 %r = zext i1 %t to i64
6060 ret i64 %r
6161 ; CHECK-LABEL: test4:
62 ; CHECK: xorl %eax, %eax
6263 ; CHECK: testq %rdi, %rdi
6364 ; CHECK: setle %al
64 ; CHECK: movzbl %al, %eax
6565 ; CHECK: ret
6666 }
6767
3333 ; CHECK-LABEL: cmpxchg_sext:
3434 ; CHECK-DAG: cmpxchgl
3535 ; CHECK-NOT: cmpl
36 ; CHECK: sete %al
36 ; CHECK: sete %cl
3737 ; CHECK: retq
3838 %pair = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
3939 %success = extractvalue { i32, i1 } %pair, 1
4343
4444 define i32 @cmpxchg_zext(i32* %addr, i32 %desired, i32 %new) {
4545 ; CHECK-LABEL: cmpxchg_zext:
46 ; CHECK: xorl %e[[R:[a-z]]]x
4647 ; CHECK: cmpxchgl
4748 ; CHECK-NOT: cmp
48 ; CHECK: sete [[BYTE:%[a-z0-9]+]]
49 ; CHECK: movzbl [[BYTE]], %eax
49 ; CHECK: sete %[[R]]l
5050 %pair = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
5151 %success = extractvalue { i32, i1 } %pair, 1
5252 %mask = zext i1 %success to i32
4343
4444 define i128 @cmpxchg_zext(i128* %addr, i128 %desired, i128 %new) {
4545 ; CHECK-LABEL: cmpxchg_zext:
46 ; CHECK: xorl
4647 ; CHECK: cmpxchg16b
4748 ; CHECK-NOT: cmpq
48 ; CHECK: sete [[BYTE:%[a-z0-9]+]]
49 ; CHECK: movzbl [[BYTE]], %eax
49 ; CHECK: sete
5050 %pair = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
5151 %success = extractvalue { i128, i1 } %pair, 1
5252 %mask = zext i1 %success to i128
55 define i32 @test1(i64 %x) nounwind readnone {
66 ; CHECK-LABEL: test1:
77 ; CHECK: # BB#0:
8 ; CHECK-NEXT: leaq -1(%rdi), %rax
9 ; CHECK-NEXT: testq %rax, %rdi
8 ; CHECK-NEXT: leaq -1(%rdi), %rcx
9 ; CHECK-NEXT: xorl %eax, %eax
10 ; CHECK-NEXT: testq %rcx, %rdi
1011 ; CHECK-NEXT: setne %al
11 ; CHECK-NEXT: movzbl %al, %eax
1212 ; CHECK-NEXT: retq
1313 %count = tail call i64 @llvm.ctpop.i64(i64 %x)
1414 %cast = trunc i64 %count to i32
2121 define i32 @test2(i64 %x) nounwind readnone {
2222 ; CHECK-LABEL: test2:
2323 ; CHECK: # BB#0:
24 ; CHECK-NEXT: leaq -1(%rdi), %rax
25 ; CHECK-NEXT: testq %rax, %rdi
24 ; CHECK-NEXT: leaq -1(%rdi), %rcx
25 ; CHECK-NEXT: xorl %eax, %eax
26 ; CHECK-NEXT: testq %rcx, %rdi
2627 ; CHECK-NEXT: sete %al
27 ; CHECK-NEXT: movzbl %al, %eax
2828 ; CHECK-NEXT: retq
2929 %count = tail call i64 @llvm.ctpop.i64(i64 %x)
3030 %cmp = icmp ult i64 %count, 2
237237 ; X64-LABEL: TestConst128:
238238 ; X64: movaps {{.*}}, %xmm1
239239 ; X64-NEXT: callq __gttf2
240 ; X64-NEXT: xorl
240241 ; X64-NEXT: test
241242 ; X64: retq
242243 }
276277 ; X64-NEXT: movq (%rsp),
277278 ; X64-NEXT: movq %
278279 ; X64-NEXT: shrq $32,
279 ; X64: orl
280 ; X64: xorl %eax, %eax
281 ; X64-NEXT: orl
280282 ; X64-NEXT: sete %al
281 ; X64-NEXT: movzbl %al, %eax
282283 ; X64: retq
283284 ;
284285 ; If TestBits128 fails due to any llvm or clang change,
77 ret i32 %conv
88 ; CHECK-LABEL: TestComp128GT:
99 ; CHECK: callq __gttf2
10 ; CHECK: setg %al
11 ; CHECK: movzbl %al, %eax
10 ; CHECK: xorl %ecx, %ecx
11 ; CHECK: setg %cl
12 ; CHECK: movl %ecx, %eax
1213 ; CHECK: retq
1314 }
1415
1920 ret i32 %conv
2021 ; CHECK-LABEL: TestComp128GE:
2122 ; CHECK: callq __getf2
23 ; CHECK: xorl %ecx, %ecx
2224 ; CHECK: testl %eax, %eax
23 ; CHECK: setns %al
24 ; CHECK: movzbl %al, %eax
25 ; CHECK: setns %cl
26 ; CHECK: movl %ecx, %eax
2527 ; CHECK: retq
2628 }
2729
4749 ret i32 %conv
4850 ; CHECK-LABEL: TestComp128LE:
4951 ; CHECK: callq __letf2
50 ; CHECK-NEXT: testl %eax, %eax
51 ; CHECK: setle %al
52 ; CHECK: movzbl %al, %eax
52 ; CHECK: xorl %ecx, %ecx
53 ; CHECK: testl %eax, %eax
54 ; CHECK: setle %cl
55 ; CHECK: movl %ecx, %eax
5356 ; CHECK: retq
5457 }
5558
6063 ret i32 %conv
6164 ; CHECK-LABEL: TestComp128EQ:
6265 ; CHECK: callq __eqtf2
63 ; CHECK-NEXT: testl %eax, %eax
64 ; CHECK: sete %al
65 ; CHECK: movzbl %al, %eax
66 ; CHECK: xorl %ecx, %ecx
67 ; CHECK: testl %eax, %eax
68 ; CHECK: sete %cl
69 ; CHECK: movl %ecx, %eax
6670 ; CHECK: retq
6771 }
6872
7377 ret i32 %conv
7478 ; CHECK-LABEL: TestComp128NE:
7579 ; CHECK: callq __netf2
76 ; CHECK-NEXT: testl %eax, %eax
77 ; CHECK: setne %al
78 ; CHECK: movzbl %al, %eax
80 ; CHECK: xorl %ecx, %ecx
81 ; CHECK: testl %eax, %eax
82 ; CHECK: setne %cl
83 ; CHECK: movl %ecx, %eax
7984 ; CHECK: retq
8085 }
8186
22 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
33 target triple = "x86_64-apple-darwin10.0.0"
44
5 declare i32 @foo();
6
57 define i32 @f0(i32* nocapture %x) nounwind readonly ssp {
68 entry:
7 %tmp1 = load i32, i32* %x ; [#uses=2]
8 %tobool = icmp eq i32 %tmp1, 0 ; [#uses=1]
9 br i1 %tobool, label %if.end, label %return
10
11 if.end: ; preds = %entry
12
13 ; Check that we lower to the short form of cmpl, which has a fixed %eax
14 ; register.
15 ;
9 %tmp1 = call i32 @foo()
1610 ; CHECK: cmpl $16777216, %eax
1711 ; CHECK: # encoding: [0x3d,0x00,0x00,0x00,0x01]
1812 %cmp = icmp eq i32 %tmp1, 16777216 ; [#uses=1]
1913
2014 %conv = zext i1 %cmp to i32 ; [#uses=1]
2115 ret i32 %conv
22
23 return: ; preds = %entry
24 ret i32 0
2516 }
2617
2718 define i32 @f1() nounwind {
4141
4242 ; Except on Darwin, for legacy reasons.
4343 ; DARWIN-LABEL: unsigned_i8:
44 ; DARWIN: cmp
44 ; DARWIN: xorl
45 ; DARWIN-NEXT: cmp
4546 ; DARWIN-NEXT: sete
46 ; DARWIN-NEXT: movzbl
4747 ; DARWIN-NEXT: ret
4848 }
4949
6262
6363 ; Except on Darwin, for legacy reasons.
6464 ; DARWIN-LABEL: signed_i8:
65 ; DARWIN: cmp
65 ; DARWIN: xorl
66 ; DARWIN-NEXT: cmp
6667 ; DARWIN-NEXT: sete
67 ; DARWIN-NEXT: movzbl
6868 ; DARWIN-NEXT: ret
6969 }
7070
8484 ; CHECK-NEXT: addw
8585 ; CHECK-NEXT: ret
8686
87 ; Except on Darwin, for legay reasons.
87 ; Except on Darwin, for legacy reasons.
8888 ; DARWIN-LABEL: unsigned_i16:
8989 ; DARWIN-BWOFF: movw
9090 ; DARWIN-BWON: movzwl
55 define i32 @t1() nounwind ssp {
66 entry:
77 ; CHECK-LABEL: t1:
8 ; CHECK: cmpl $0, _t1.global
8 ; CHECK: xorl %eax, %eax
9 ; CHECK-NEXT: cmpl $0, _t1.global
910 ; CHECK-NEXT: setne %al
10 ; CHECK-NEXT: movzbl %al, %eax
1111 ; CHECK-NEXT: ret
1212 %0 = load i64, i64* @t1.global, align 8
1313 %and = and i64 4294967295, %0
66 define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
77 entry:
88 ; CHECK-LABEL: t1:
9 ; CHECK: xorl %eax, %eax
910 ; CHECK: seta %al
10 ; CHECK: movzbl %al, %eax
1111 ; CHECK: shll $5, %eax
1212 %0 = icmp ugt i16 %x, 26 ; [#uses=1]
1313 %iftmp.1.0 = select i1 %0, i16 32, i16 0 ; [#uses=1]
592592 define i32 @test_mm_comige_ss(<4 x float> %a0, <4 x float> %a1) nounwind {
593593 ; X32-LABEL: test_mm_comige_ss:
594594 ; X32: # BB#0:
595 ; X32-NEXT: xorl %eax, %eax
595596 ; X32-NEXT: comiss %xmm1, %xmm0
596597 ; X32-NEXT: setae %al
597 ; X32-NEXT: movzbl %al, %eax
598598 ; X32-NEXT: retl
599599 ;
600600 ; X64-LABEL: test_mm_comige_ss:
601601 ; X64: # BB#0:
602 ; X64-NEXT: xorl %eax, %eax
602603 ; X64-NEXT: comiss %xmm1, %xmm0
603604 ; X64-NEXT: setae %al
604 ; X64-NEXT: movzbl %al, %eax
605605 ; X64-NEXT: retq
606606 %res = call i32 @llvm.x86.sse.comige.ss(<4 x float> %a0, <4 x float> %a1)
607607 ret i32 %res
611611 define i32 @test_mm_comigt_ss(<4 x float> %a0, <4 x float> %a1) nounwind {
612612 ; X32-LABEL: test_mm_comigt_ss:
613613 ; X32: # BB#0:
614 ; X32-NEXT: xorl %eax, %eax
614615 ; X32-NEXT: comiss %xmm1, %xmm0
615616 ; X32-NEXT: seta %al
616 ; X32-NEXT: movzbl %al, %eax
617617 ; X32-NEXT: retl
618618 ;
619619 ; X64-LABEL: test_mm_comigt_ss:
620620 ; X64: # BB#0:
621 ; X64-NEXT: xorl %eax, %eax
621622 ; X64-NEXT: comiss %xmm1, %xmm0
622623 ; X64-NEXT: seta %al
623 ; X64-NEXT: movzbl %al, %eax
624624 ; X64-NEXT: retq
625625 %res = call i32 @llvm.x86.sse.comigt.ss(<4 x float> %a0, <4 x float> %a1)
626626 ret i32 %res
630630 define i32 @test_mm_comile_ss(<4 x float> %a0, <4 x float> %a1) nounwind {
631631 ; X32-LABEL: test_mm_comile_ss:
632632 ; X32: # BB#0:
633 ; X32-NEXT: xorl %eax, %eax
633634 ; X32-NEXT: comiss %xmm0, %xmm1
634635 ; X32-NEXT: setae %al
635 ; X32-NEXT: movzbl %al, %eax
636636 ; X32-NEXT: retl
637637 ;
638638 ; X64-LABEL: test_mm_comile_ss:
639639 ; X64: # BB#0:
640 ; X64-NEXT: xorl %eax, %eax
640641 ; X64-NEXT: comiss %xmm0, %xmm1
641642 ; X64-NEXT: setae %al
642 ; X64-NEXT: movzbl %al, %eax
643643 ; X64-NEXT: retq
644644 %res = call i32 @llvm.x86.sse.comile.ss(<4 x float> %a0, <4 x float> %a1)
645645 ret i32 %res
649649 define i32 @test_mm_comilt_ss(<4 x float> %a0, <4 x float> %a1) nounwind {
650650 ; X32-LABEL: test_mm_comilt_ss:
651651 ; X32: # BB#0:
652 ; X32-NEXT: xorl %eax, %eax
652653 ; X32-NEXT: comiss %xmm0, %xmm1
653654 ; X32-NEXT: seta %al
654 ; X32-NEXT: movzbl %al, %eax
655655 ; X32-NEXT: retl
656656 ;
657657 ; X64-LABEL: test_mm_comilt_ss:
658658 ; X64: # BB#0:
659 ; X64-NEXT: xorl %eax, %eax
659660 ; X64-NEXT: comiss %xmm0, %xmm1
660661 ; X64-NEXT: seta %al
661 ; X64-NEXT: movzbl %al, %eax
662662 ; X64-NEXT: retq
663663 %res = call i32 @llvm.x86.sse.comilt.ss(<4 x float> %a0, <4 x float> %a1)
664664 ret i32 %res
20932093 define i32 @test_mm_ucomige_ss(<4 x float> %a0, <4 x float> %a1) nounwind {
20942094 ; X32-LABEL: test_mm_ucomige_ss:
20952095 ; X32: # BB#0:
2096 ; X32-NEXT: xorl %eax, %eax
20962097 ; X32-NEXT: ucomiss %xmm1, %xmm0
20972098 ; X32-NEXT: setae %al
2098 ; X32-NEXT: movzbl %al, %eax
20992099 ; X32-NEXT: retl
21002100 ;
21012101 ; X64-LABEL: test_mm_ucomige_ss:
21022102 ; X64: # BB#0:
2103 ; X64-NEXT: xorl %eax, %eax
21032104 ; X64-NEXT: ucomiss %xmm1, %xmm0
21042105 ; X64-NEXT: setae %al
2105 ; X64-NEXT: movzbl %al, %eax
21062106 ; X64-NEXT: retq
21072107 %res = call i32 @llvm.x86.sse.ucomige.ss(<4 x float> %a0, <4 x float> %a1)
21082108 ret i32 %res
21122112 define i32 @test_mm_ucomigt_ss(<4 x float> %a0, <4 x float> %a1) nounwind {
21132113 ; X32-LABEL: test_mm_ucomigt_ss:
21142114 ; X32: # BB#0:
2115 ; X32-NEXT: xorl %eax, %eax
21152116 ; X32-NEXT: ucomiss %xmm1, %xmm0
21162117 ; X32-NEXT: seta %al
2117 ; X32-NEXT: movzbl %al, %eax
21182118 ; X32-NEXT: retl
21192119 ;
21202120 ; X64-LABEL: test_mm_ucomigt_ss:
21212121 ; X64: # BB#0:
2122 ; X64-NEXT: xorl %eax, %eax
21222123 ; X64-NEXT: ucomiss %xmm1, %xmm0
21232124 ; X64-NEXT: seta %al
2124 ; X64-NEXT: movzbl %al, %eax
21252125 ; X64-NEXT: retq
21262126 %res = call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> %a0, <4 x float> %a1)
21272127 ret i32 %res
21312131 define i32 @test_mm_ucomile_ss(<4 x float> %a0, <4 x float> %a1) nounwind {
21322132 ; X32-LABEL: test_mm_ucomile_ss:
21332133 ; X32: # BB#0:
2134 ; X32-NEXT: xorl %eax, %eax
21342135 ; X32-NEXT: ucomiss %xmm0, %xmm1
21352136 ; X32-NEXT: setae %al
2136 ; X32-NEXT: movzbl %al, %eax
21372137 ; X32-NEXT: retl
21382138 ;
21392139 ; X64-LABEL: test_mm_ucomile_ss:
21402140 ; X64: # BB#0:
2141 ; X64-NEXT: xorl %eax, %eax
21412142 ; X64-NEXT: ucomiss %xmm0, %xmm1
21422143 ; X64-NEXT: setae %al
2143 ; X64-NEXT: movzbl %al, %eax
21442144 ; X64-NEXT: retq
21452145 %res = call i32 @llvm.x86.sse.ucomile.ss(<4 x float> %a0, <4 x float> %a1)
21462146 ret i32 %res
21502150 define i32 @test_mm_ucomilt_ss(<4 x float> %a0, <4 x float> %a1) nounwind {
21512151 ; X32-LABEL: test_mm_ucomilt_ss:
21522152 ; X32: # BB#0:
2153 ; X32-NEXT: xorl %eax, %eax
21532154 ; X32-NEXT: ucomiss %xmm0, %xmm1
21542155 ; X32-NEXT: seta %al
2155 ; X32-NEXT: movzbl %al, %eax
21562156 ; X32-NEXT: retl
21572157 ;
21582158 ; X64-LABEL: test_mm_ucomilt_ss:
21592159 ; X64: # BB#0:
2160 ; X64-NEXT: xorl %eax, %eax
21602161 ; X64-NEXT: ucomiss %xmm0, %xmm1
21612162 ; X64-NEXT: seta %al
2162 ; X64-NEXT: movzbl %al, %eax
21632163 ; X64-NEXT: retq
21642164 %res = call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %a0, <4 x float> %a1)
21652165 ret i32 %res
7676 define i32 @test_x86_sse_comige_ss(<4 x float> %a0, <4 x float> %a1) {
7777 ; SSE-LABEL: test_x86_sse_comige_ss:
7878 ; SSE: ## BB#0:
79 ; SSE-NEXT: xorl %eax, %eax
7980 ; SSE-NEXT: comiss %xmm1, %xmm0
8081 ; SSE-NEXT: setae %al
81 ; SSE-NEXT: movzbl %al, %eax
8282 ; SSE-NEXT: retl
8383 ;
8484 ; KNL-LABEL: test_x86_sse_comige_ss:
8585 ; KNL: ## BB#0:
86 ; KNL-NEXT: xorl %eax, %eax
8687 ; KNL-NEXT: vcomiss %xmm1, %xmm0
8788 ; KNL-NEXT: setae %al
88 ; KNL-NEXT: movzbl %al, %eax
8989 ; KNL-NEXT: retl
9090 %res = call i32 @llvm.x86.sse.comige.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
9191 ret i32 %res
9696 define i32 @test_x86_sse_comigt_ss(<4 x float> %a0, <4 x float> %a1) {
9797 ; SSE-LABEL: test_x86_sse_comigt_ss:
9898 ; SSE: ## BB#0:
99 ; SSE-NEXT: xorl %eax, %eax
99100 ; SSE-NEXT: comiss %xmm1, %xmm0
100101 ; SSE-NEXT: seta %al
101 ; SSE-NEXT: movzbl %al, %eax
102102 ; SSE-NEXT: retl
103103 ;
104104 ; KNL-LABEL: test_x86_sse_comigt_ss:
105105 ; KNL: ## BB#0:
106 ; KNL-NEXT: xorl %eax, %eax
106107 ; KNL-NEXT: vcomiss %xmm1, %xmm0
107108 ; KNL-NEXT: seta %al
108 ; KNL-NEXT: movzbl %al, %eax
109109 ; KNL-NEXT: retl
110110 %res = call i32 @llvm.x86.sse.comigt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
111111 ret i32 %res
116116 define i32 @test_x86_sse_comile_ss(<4 x float> %a0, <4 x float> %a1) {
117117 ; SSE-LABEL: test_x86_sse_comile_ss:
118118 ; SSE: ## BB#0:
119 ; SSE-NEXT: xorl %eax, %eax
119120 ; SSE-NEXT: comiss %xmm0, %xmm1
120121 ; SSE-NEXT: setae %al
121 ; SSE-NEXT: movzbl %al, %eax
122122 ; SSE-NEXT: retl
123123 ;
124124 ; KNL-LABEL: test_x86_sse_comile_ss:
125125 ; KNL: ## BB#0:
126 ; KNL-NEXT: xorl %eax, %eax
126127 ; KNL-NEXT: vcomiss %xmm0, %xmm1
127128 ; KNL-NEXT: setae %al
128 ; KNL-NEXT: movzbl %al, %eax
129129 ; KNL-NEXT: retl
130130 %res = call i32 @llvm.x86.sse.comile.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
131131 ret i32 %res
136136 define i32 @test_x86_sse_comilt_ss(<4 x float> %a0, <4 x float> %a1) {
137137 ; SSE-LABEL: test_x86_sse_comilt_ss:
138138 ; SSE: ## BB#0:
139 ; SSE-NEXT: xorl %eax, %eax
139140 ; SSE-NEXT: comiss %xmm0, %xmm1
140141 ; SSE-NEXT: seta %al
141 ; SSE-NEXT: movzbl %al, %eax
142142 ; SSE-NEXT: retl
143143 ;
144144 ; KNL-LABEL: test_x86_sse_comilt_ss:
145145 ; KNL: ## BB#0:
146 ; KNL-NEXT: xorl %eax, %eax
146147 ; KNL-NEXT: vcomiss %xmm0, %xmm1
147148 ; KNL-NEXT: seta %al
148 ; KNL-NEXT: movzbl %al, %eax
149149 ; KNL-NEXT: retl
150150 %res = call i32 @llvm.x86.sse.comilt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
151151 ret i32 %res
516516 define i32 @test_x86_sse_ucomige_ss(<4 x float> %a0, <4 x float> %a1) {
517517 ; SSE-LABEL: test_x86_sse_ucomige_ss:
518518 ; SSE: ## BB#0:
519 ; SSE-NEXT: xorl %eax, %eax
519520 ; SSE-NEXT: ucomiss %xmm1, %xmm0
520521 ; SSE-NEXT: setae %al
521 ; SSE-NEXT: movzbl %al, %eax
522522 ; SSE-NEXT: retl
523523 ;
524524 ; KNL-LABEL: test_x86_sse_ucomige_ss:
525525 ; KNL: ## BB#0:
526 ; KNL-NEXT: xorl %eax, %eax
526527 ; KNL-NEXT: vucomiss %xmm1, %xmm0
527528 ; KNL-NEXT: setae %al
528 ; KNL-NEXT: movzbl %al, %eax
529529 ; KNL-NEXT: retl
530530 %res = call i32 @llvm.x86.sse.ucomige.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
531531 ret i32 %res
536536 define i32 @test_x86_sse_ucomigt_ss(<4 x float> %a0, <4 x float> %a1) {
537537 ; SSE-LABEL: test_x86_sse_ucomigt_ss:
538538 ; SSE: ## BB#0:
539 ; SSE-NEXT: xorl %eax, %eax
539540 ; SSE-NEXT: ucomiss %xmm1, %xmm0
540541 ; SSE-NEXT: seta %al
541 ; SSE-NEXT: movzbl %al, %eax
542542 ; SSE-NEXT: retl
543543 ;
544544 ; KNL-LABEL: test_x86_sse_ucomigt_ss:
545545 ; KNL: ## BB#0:
546 ; KNL-NEXT: xorl %eax, %eax
546547 ; KNL-NEXT: vucomiss %xmm1, %xmm0
547548 ; KNL-NEXT: seta %al
548 ; KNL-NEXT: movzbl %al, %eax
549549 ; KNL-NEXT: retl
550550 %res = call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
551551 ret i32 %res
556556 define i32 @test_x86_sse_ucomile_ss(<4 x float> %a0, <4 x float> %a1) {
557557 ; SSE-LABEL: test_x86_sse_ucomile_ss:
558558 ; SSE: ## BB#0:
559 ; SSE-NEXT: xorl %eax, %eax
559560 ; SSE-NEXT: ucomiss %xmm0, %xmm1
560561 ; SSE-NEXT: setae %al
561 ; SSE-NEXT: movzbl %al, %eax
562562 ; SSE-NEXT: retl
563563 ;
564564 ; KNL-LABEL: test_x86_sse_ucomile_ss:
565565 ; KNL: ## BB#0:
566 ; KNL-NEXT: xorl %eax, %eax
566567 ; KNL-NEXT: vucomiss %xmm0, %xmm1
567568 ; KNL-NEXT: setae %al
568 ; KNL-NEXT: movzbl %al, %eax
569569 ; KNL-NEXT: retl
570570 %res = call i32 @llvm.x86.sse.ucomile.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
571571 ret i32 %res
576576 define i32 @test_x86_sse_ucomilt_ss(<4 x float> %a0, <4 x float> %a1) {
577577 ; SSE-LABEL: test_x86_sse_ucomilt_ss:
578578 ; SSE: ## BB#0:
579 ; SSE-NEXT: xorl %eax, %eax
579580 ; SSE-NEXT: ucomiss %xmm0, %xmm1
580581 ; SSE-NEXT: seta %al
581 ; SSE-NEXT: movzbl %al, %eax
582582 ; SSE-NEXT: retl
583583 ;
584584 ; KNL-LABEL: test_x86_sse_ucomilt_ss:
585585 ; KNL: ## BB#0:
586 ; KNL-NEXT: xorl %eax, %eax
586587 ; KNL-NEXT: vucomiss %xmm0, %xmm1
587588 ; KNL-NEXT: seta %al
588 ; KNL-NEXT: movzbl %al, %eax
589589 ; KNL-NEXT: retl
590590 %res = call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1]
591591 ret i32 %res
982982 define i32 @test_mm_comige_sd(<2 x double> %a0, <2 x double> %a1) nounwind {
983983 ; X32-LABEL: test_mm_comige_sd:
984984 ; X32: # BB#0:
985 ; X32-NEXT: xorl %eax, %eax
985986 ; X32-NEXT: comisd %xmm1, %xmm0
986987 ; X32-NEXT: setae %al
987 ; X32-NEXT: movzbl %al, %eax
988988 ; X32-NEXT: retl
989989 ;
990990 ; X64-LABEL: test_mm_comige_sd:
991991 ; X64: # BB#0:
992 ; X64-NEXT: xorl %eax, %eax
992993 ; X64-NEXT: comisd %xmm1, %xmm0
993994 ; X64-NEXT: setae %al
994 ; X64-NEXT: movzbl %al, %eax
995995 ; X64-NEXT: retq
996996 %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1)
997997 ret i32 %res
10011001 define i32 @test_mm_comigt_sd(<2 x double> %a0, <2 x double> %a1) nounwind {
10021002 ; X32-LABEL: test_mm_comigt_sd:
10031003 ; X32: # BB#0:
1004 ; X32-NEXT: xorl %eax, %eax
10041005 ; X32-NEXT: comisd %xmm1, %xmm0
10051006 ; X32-NEXT: seta %al
1006 ; X32-NEXT: movzbl %al, %eax
10071007 ; X32-NEXT: retl
10081008 ;
10091009 ; X64-LABEL: test_mm_comigt_sd:
10101010 ; X64: # BB#0:
1011 ; X64-NEXT: xorl %eax, %eax
10111012 ; X64-NEXT: comisd %xmm1, %xmm0
10121013 ; X64-NEXT: seta %al
1013 ; X64-NEXT: movzbl %al, %eax
10141014 ; X64-NEXT: retq
10151015 %res = call i32 @llvm.x86.sse2.comigt.sd(<2 x double> %a0, <2 x double> %a1)
10161016 ret i32 %res
10201020 define i32 @test_mm_comile_sd(<2 x double> %a0, <2 x double> %a1) nounwind {
10211021 ; X32-LABEL: test_mm_comile_sd:
10221022 ; X32: # BB#0:
1023 ; X32-NEXT: xorl %eax, %eax
10231024 ; X32-NEXT: comisd %xmm0, %xmm1
10241025 ; X32-NEXT: setae %al
1025 ; X32-NEXT: movzbl %al, %eax
10261026 ; X32-NEXT: retl
10271027 ;
10281028 ; X64-LABEL: test_mm_comile_sd:
10291029 ; X64: # BB#0:
1030 ; X64-NEXT: xorl %eax, %eax
10301031 ; X64-NEXT: comisd %xmm0, %xmm1
10311032 ; X64-NEXT: setae %al
1032 ; X64-NEXT: movzbl %al, %eax
10331033 ; X64-NEXT: retq
10341034 %res = call i32 @llvm.x86.sse2.comile.sd(<2 x double> %a0, <2 x double> %a1)
10351035 ret i32 %res
10391039 define i32 @test_mm_comilt_sd(<2 x double> %a0, <2 x double> %a1) nounwind {
10401040 ; X32-LABEL: test_mm_comilt_sd:
10411041 ; X32: # BB#0:
1042 ; X32-NEXT: xorl %eax, %eax
10421043 ; X32-NEXT: comisd %xmm0, %xmm1
10431044 ; X32-NEXT: seta %al
1044 ; X32-NEXT: movzbl %al, %eax
10451045 ; X32-NEXT: retl
10461046 ;
10471047 ; X64-LABEL: test_mm_comilt_sd:
10481048 ; X64: # BB#0:
1049 ; X64-NEXT: xorl %eax, %eax
10491050 ; X64-NEXT: comisd %xmm0, %xmm1
10501051 ; X64-NEXT: seta %al
1051 ; X64-NEXT: movzbl %al, %eax
10521052 ; X64-NEXT: retq
10531053 %res = call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %a0, <2 x double> %a1)
10541054 ret i32 %res
35373537 define i32 @test_mm_ucomige_sd(<2 x double> %a0, <2 x double> %a1) nounwind {
35383538 ; X32-LABEL: test_mm_ucomige_sd:
35393539 ; X32: # BB#0:
3540 ; X32-NEXT: xorl %eax, %eax
35403541 ; X32-NEXT: ucomisd %xmm1, %xmm0
35413542 ; X32-NEXT: setae %al
3542 ; X32-NEXT: movzbl %al, %eax
35433543 ; X32-NEXT: retl
35443544 ;
35453545 ; X64-LABEL: test_mm_ucomige_sd:
35463546 ; X64: # BB#0:
3547 ; X64-NEXT: xorl %eax, %eax
35473548 ; X64-NEXT: ucomisd %xmm1, %xmm0
35483549 ; X64-NEXT: setae %al
3549 ; X64-NEXT: movzbl %al, %eax
35503550 ; X64-NEXT: retq
35513551 %res = call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> %a0, <2 x double> %a1)
35523552 ret i32 %res
35563556 define i32 @test_mm_ucomigt_sd(<2 x double> %a0, <2 x double> %a1) nounwind {
35573557 ; X32-LABEL: test_mm_ucomigt_sd:
35583558 ; X32: # BB#0:
3559 ; X32-NEXT: xorl %eax, %eax
35593560 ; X32-NEXT: ucomisd %xmm1, %xmm0
35603561 ; X32-NEXT: seta %al
3561 ; X32-NEXT: movzbl %al, %eax
35623562 ; X32-NEXT: retl
35633563 ;
35643564 ; X64-LABEL: test_mm_ucomigt_sd:
35653565 ; X64: # BB#0:
3566 ; X64-NEXT: xorl %eax, %eax
35663567 ; X64-NEXT: ucomisd %xmm1, %xmm0
35673568 ; X64-NEXT: seta %al
3568 ; X64-NEXT: movzbl %al, %eax
35693569 ; X64-NEXT: retq
35703570 %res = call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> %a0, <2 x double> %a1)
35713571 ret i32 %res
35753575 define i32 @test_mm_ucomile_sd(<2 x double> %a0, <2 x double> %a1) nounwind {
35763576 ; X32-LABEL: test_mm_ucomile_sd:
35773577 ; X32: # BB#0:
3578 ; X32-NEXT: xorl %eax, %eax
35783579 ; X32-NEXT: ucomisd %xmm0, %xmm1
35793580 ; X32-NEXT: setae %al
3580 ; X32-NEXT: movzbl %al, %eax
35813581 ; X32-NEXT: retl
35823582 ;
35833583 ; X64-LABEL: test_mm_ucomile_sd:
35843584 ; X64: # BB#0:
3585 ; X64-NEXT: xorl %eax, %eax
35853586 ; X64-NEXT: ucomisd %xmm0, %xmm1
35863587 ; X64-NEXT: setae %al
3587 ; X64-NEXT: movzbl %al, %eax
35883588 ; X64-NEXT: retq
35893589 %res = call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> %a0, <2 x double> %a1)
35903590 ret i32 %res
35943594 define i32 @test_mm_ucomilt_sd(<2 x double> %a0, <2 x double> %a1) nounwind {
35953595 ; X32-LABEL: test_mm_ucomilt_sd:
35963596 ; X32: # BB#0:
3597 ; X32-NEXT: xorl %eax, %eax
35973598 ; X32-NEXT: ucomisd %xmm0, %xmm1
35983599 ; X32-NEXT: seta %al
3599 ; X32-NEXT: movzbl %al, %eax
36003600 ; X32-NEXT: retl
36013601 ;
36023602 ; X64-LABEL: test_mm_ucomilt_sd:
36033603 ; X64: # BB#0:
3604 ; X64-NEXT: xorl %eax, %eax
36043605 ; X64-NEXT: ucomisd %xmm0, %xmm1
36053606 ; X64-NEXT: seta %al
3606 ; X64-NEXT: movzbl %al, %eax
36073607 ; X64-NEXT: retq
36083608 %res = call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a0, <2 x double> %a1)
36093609 ret i32 %res
7676 define i32 @test_x86_sse2_comige_sd(<2 x double> %a0, <2 x double> %a1) {
7777 ; SSE-LABEL: test_x86_sse2_comige_sd:
7878 ; SSE: ## BB#0:
79 ; SSE-NEXT: xorl %eax, %eax
7980 ; SSE-NEXT: comisd %xmm1, %xmm0
8081 ; SSE-NEXT: setae %al
81 ; SSE-NEXT: movzbl %al, %eax
8282 ; SSE-NEXT: retl
8383 ;
8484 ; KNL-LABEL: test_x86_sse2_comige_sd:
8585 ; KNL: ## BB#0:
86 ; KNL-NEXT: xorl %eax, %eax
8687 ; KNL-NEXT: vcomisd %xmm1, %xmm0
8788 ; KNL-NEXT: setae %al
88 ; KNL-NEXT: movzbl %al, %eax
8989 ; KNL-NEXT: retl
9090 %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
9191 ret i32 %res
9696 define i32 @test_x86_sse2_comigt_sd(<2 x double> %a0, <2 x double> %a1) {
9797 ; SSE-LABEL: test_x86_sse2_comigt_sd:
9898 ; SSE: ## BB#0:
99 ; SSE-NEXT: xorl %eax, %eax
99100 ; SSE-NEXT: comisd %xmm1, %xmm0
100101 ; SSE-NEXT: seta %al
101 ; SSE-NEXT: movzbl %al, %eax
102102 ; SSE-NEXT: retl
103103 ;
104104 ; KNL-LABEL: test_x86_sse2_comigt_sd:
105105 ; KNL: ## BB#0:
106 ; KNL-NEXT: xorl %eax, %eax
106107 ; KNL-NEXT: vcomisd %xmm1, %xmm0
107108 ; KNL-NEXT: seta %al
108 ; KNL-NEXT: movzbl %al, %eax
109109 ; KNL-NEXT: retl
110110 %res = call i32 @llvm.x86.sse2.comigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
111111 ret i32 %res
116116 define i32 @test_x86_sse2_comile_sd(<2 x double> %a0, <2 x double> %a1) {
117117 ; SSE-LABEL: test_x86_sse2_comile_sd:
118118 ; SSE: ## BB#0:
119 ; SSE-NEXT: xorl %eax, %eax
119120 ; SSE-NEXT: comisd %xmm0, %xmm1
120121 ; SSE-NEXT: setae %al
121 ; SSE-NEXT: movzbl %al, %eax
122122 ; SSE-NEXT: retl
123123 ;
124124 ; KNL-LABEL: test_x86_sse2_comile_sd:
125125 ; KNL: ## BB#0:
126 ; KNL-NEXT: xorl %eax, %eax
126127 ; KNL-NEXT: vcomisd %xmm0, %xmm1
127128 ; KNL-NEXT: setae %al
128 ; KNL-NEXT: movzbl %al, %eax
129129 ; KNL-NEXT: retl
130130 %res = call i32 @llvm.x86.sse2.comile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
131131 ret i32 %res
136136 define i32 @test_x86_sse2_comilt_sd(<2 x double> %a0, <2 x double> %a1) {
137137 ; SSE-LABEL: test_x86_sse2_comilt_sd:
138138 ; SSE: ## BB#0:
139 ; SSE-NEXT: xorl %eax, %eax
139140 ; SSE-NEXT: comisd %xmm0, %xmm1
140141 ; SSE-NEXT: seta %al
141 ; SSE-NEXT: movzbl %al, %eax
142142 ; SSE-NEXT: retl
143143 ;
144144 ; KNL-LABEL: test_x86_sse2_comilt_sd:
145145 ; KNL: ## BB#0:
146 ; KNL-NEXT: xorl %eax, %eax
146147 ; KNL-NEXT: vcomisd %xmm0, %xmm1
147148 ; KNL-NEXT: seta %al
148 ; KNL-NEXT: movzbl %al, %eax
149149 ; KNL-NEXT: retl
150150 %res = call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
151151 ret i32 %res
11511151 define i32 @test_x86_sse2_ucomige_sd(<2 x double> %a0, <2 x double> %a1) {
11521152 ; SSE-LABEL: test_x86_sse2_ucomige_sd:
11531153 ; SSE: ## BB#0:
1154 ; SSE-NEXT: xorl %eax, %eax
11541155 ; SSE-NEXT: ucomisd %xmm1, %xmm0
11551156 ; SSE-NEXT: setae %al
1156 ; SSE-NEXT: movzbl %al, %eax
11571157 ; SSE-NEXT: retl
11581158 ;
11591159 ; KNL-LABEL: test_x86_sse2_ucomige_sd:
11601160 ; KNL: ## BB#0:
1161 ; KNL-NEXT: xorl %eax, %eax
11611162 ; KNL-NEXT: vucomisd %xmm1, %xmm0
11621163 ; KNL-NEXT: setae %al
1163 ; KNL-NEXT: movzbl %al, %eax
11641164 ; KNL-NEXT: retl
11651165 %res = call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
11661166 ret i32 %res
11711171 define i32 @test_x86_sse2_ucomigt_sd(<2 x double> %a0, <2 x double> %a1) {
11721172 ; SSE-LABEL: test_x86_sse2_ucomigt_sd:
11731173 ; SSE: ## BB#0:
1174 ; SSE-NEXT: xorl %eax, %eax
11741175 ; SSE-NEXT: ucomisd %xmm1, %xmm0
11751176 ; SSE-NEXT: seta %al
1176 ; SSE-NEXT: movzbl %al, %eax
11771177 ; SSE-NEXT: retl
11781178 ;
11791179 ; KNL-LABEL: test_x86_sse2_ucomigt_sd:
11801180 ; KNL: ## BB#0:
1181 ; KNL-NEXT: xorl %eax, %eax
11811182 ; KNL-NEXT: vucomisd %xmm1, %xmm0
11821183 ; KNL-NEXT: seta %al
1183 ; KNL-NEXT: movzbl %al, %eax
11841184 ; KNL-NEXT: retl
11851185 %res = call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
11861186 ret i32 %res
11911191 define i32 @test_x86_sse2_ucomile_sd(<2 x double> %a0, <2 x double> %a1) {
11921192 ; SSE-LABEL: test_x86_sse2_ucomile_sd:
11931193 ; SSE: ## BB#0:
1194 ; SSE-NEXT: xorl %eax, %eax
11941195 ; SSE-NEXT: ucomisd %xmm0, %xmm1
11951196 ; SSE-NEXT: setae %al
1196 ; SSE-NEXT: movzbl %al, %eax
11971197 ; SSE-NEXT: retl
11981198 ;
11991199 ; KNL-LABEL: test_x86_sse2_ucomile_sd:
12001200 ; KNL: ## BB#0:
1201 ; KNL-NEXT: xorl %eax, %eax
12011202 ; KNL-NEXT: vucomisd %xmm0, %xmm1
12021203 ; KNL-NEXT: setae %al
1203 ; KNL-NEXT: movzbl %al, %eax
12041204 ; KNL-NEXT: retl
12051205 %res = call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
12061206 ret i32 %res
12111211 define i32 @test_x86_sse2_ucomilt_sd(<2 x double> %a0, <2 x double> %a1) {
12121212 ; SSE-LABEL: test_x86_sse2_ucomilt_sd:
12131213 ; SSE: ## BB#0:
1214 ; SSE-NEXT: xorl %eax, %eax
12141215 ; SSE-NEXT: ucomisd %xmm0, %xmm1
12151216 ; SSE-NEXT: seta %al
1216 ; SSE-NEXT: movzbl %al, %eax
12171217 ; SSE-NEXT: retl
12181218 ;
12191219 ; KNL-LABEL: test_x86_sse2_ucomilt_sd:
12201220 ; KNL: ## BB#0:
1221 ; KNL-NEXT: xorl %eax, %eax
12211222 ; KNL-NEXT: vucomisd %xmm0, %xmm1
12221223 ; KNL-NEXT: seta %al
1223 ; KNL-NEXT: movzbl %al, %eax
12241224 ; KNL-NEXT: retl
12251225 %res = call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1]
12261226 ret i32 %res
917917 define i32 @test_mm_test_all_zeros(<2 x i64> %a0, <2 x i64> %a1) {
918918 ; X32-LABEL: test_mm_test_all_zeros:
919919 ; X32: # BB#0:
920 ; X32-NEXT: xorl %eax, %eax
920921 ; X32-NEXT: ptest %xmm1, %xmm0
921922 ; X32-NEXT: sete %al
922 ; X32-NEXT: movzbl %al, %eax
923923 ; X32-NEXT: retl
924924 ;
925925 ; X64-LABEL: test_mm_test_all_zeros:
926926 ; X64: # BB#0:
927 ; X64-NEXT: xorl %eax, %eax
927928 ; X64-NEXT: ptest %xmm1, %xmm0
928929 ; X64-NEXT: sete %al
929 ; X64-NEXT: movzbl %al, %eax
930930 ; X64-NEXT: retq
931931 %res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1)
932932 ret i32 %res
936936 define i32 @test_mm_test_mix_ones_zeros(<2 x i64> %a0, <2 x i64> %a1) {
937937 ; X32-LABEL: test_mm_test_mix_ones_zeros:
938938 ; X32: # BB#0:
939 ; X32-NEXT: xorl %eax, %eax
939940 ; X32-NEXT: ptest %xmm1, %xmm0
940941 ; X32-NEXT: seta %al
941 ; X32-NEXT: movzbl %al, %eax
942942 ; X32-NEXT: retl
943943 ;
944944 ; X64-LABEL: test_mm_test_mix_ones_zeros:
945945 ; X64: # BB#0:
946 ; X64-NEXT: xorl %eax, %eax
946947 ; X64-NEXT: ptest %xmm1, %xmm0
947948 ; X64-NEXT: seta %al
948 ; X64-NEXT: movzbl %al, %eax
949949 ; X64-NEXT: retq
950950 %res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1)
951951 ret i32 %res
973973 define i32 @test_mm_testnzc_si128(<2 x i64> %a0, <2 x i64> %a1) {
974974 ; X32-LABEL: test_mm_testnzc_si128:
975975 ; X32: # BB#0:
976 ; X32-NEXT: xorl %eax, %eax
976977 ; X32-NEXT: ptest %xmm1, %xmm0
977978 ; X32-NEXT: seta %al
978 ; X32-NEXT: movzbl %al, %eax
979979 ; X32-NEXT: retl
980980 ;
981981 ; X64-LABEL: test_mm_testnzc_si128:
982982 ; X64: # BB#0:
983 ; X64-NEXT: xorl %eax, %eax
983984 ; X64-NEXT: ptest %xmm1, %xmm0
984985 ; X64-NEXT: seta %al
985 ; X64-NEXT: movzbl %al, %eax
986986 ; X64-NEXT: retq
987987 %res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1)
988988 ret i32 %res
991991 define i32 @test_mm_testz_si128(<2 x i64> %a0, <2 x i64> %a1) {
992992 ; X32-LABEL: test_mm_testz_si128:
993993 ; X32: # BB#0:
994 ; X32-NEXT: xorl %eax, %eax
994995 ; X32-NEXT: ptest %xmm1, %xmm0
995996 ; X32-NEXT: sete %al
996 ; X32-NEXT: movzbl %al, %eax
997997 ; X32-NEXT: retl
998998 ;
999999 ; X64-LABEL: test_mm_testz_si128:
10001000 ; X64: # BB#0:
1001 ; X64-NEXT: xorl %eax, %eax
10011002 ; X64-NEXT: ptest %xmm1, %xmm0
10021003 ; X64-NEXT: sete %al
1003 ; X64-NEXT: movzbl %al, %eax
10041004 ; X64-NEXT: retq
10051005 %res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1)
10061006 ret i32 %res
322322 define i32 @test_x86_sse41_ptestnzc(<2 x i64> %a0, <2 x i64> %a1) {
323323 ; SSE41-LABEL: test_x86_sse41_ptestnzc:
324324 ; SSE41: ## BB#0:
325 ; SSE41-NEXT: xorl %eax, %eax
325326 ; SSE41-NEXT: ptest %xmm1, %xmm0
326327 ; SSE41-NEXT: seta %al
327 ; SSE41-NEXT: movzbl %al, %eax
328328 ; SSE41-NEXT: retl
329329 ;
330330 ; KNL-LABEL: test_x86_sse41_ptestnzc:
331331 ; KNL: ## BB#0:
332 ; KNL-NEXT: xorl %eax, %eax
332333 ; KNL-NEXT: vptest %xmm1, %xmm0
333334 ; KNL-NEXT: seta %al
334 ; KNL-NEXT: movzbl %al, %eax
335335 ; KNL-NEXT: retl
336336 %res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1]
337337 ret i32 %res
342342 define i32 @test_x86_sse41_ptestz(<2 x i64> %a0, <2 x i64> %a1) {
343343 ; SSE41-LABEL: test_x86_sse41_ptestz:
344344 ; SSE41: ## BB#0:
345 ; SSE41-NEXT: xorl %eax, %eax
345346 ; SSE41-NEXT: ptest %xmm1, %xmm0
346347 ; SSE41-NEXT: sete %al
347 ; SSE41-NEXT: movzbl %al, %eax
348348 ; SSE41-NEXT: retl
349349 ;
350350 ; KNL-LABEL: test_x86_sse41_ptestz:
351351 ; KNL: ## BB#0:
352 ; KNL-NEXT: xorl %eax, %eax
352353 ; KNL-NEXT: vptest %xmm1, %xmm0
353354 ; KNL-NEXT: sete %al
354 ; KNL-NEXT: movzbl %al, %eax
355355 ; KNL-NEXT: retl
356356 %res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1]
357357 ret i32 %res
207207 define i32 @ptestz_1(<2 x i64> %t1, <2 x i64> %t2) nounwind {
208208 ; X32-LABEL: ptestz_1:
209209 ; X32: ## BB#0:
210 ; X32-NEXT: xorl %eax, %eax
210211 ; X32-NEXT: ptest %xmm1, %xmm0
211212 ; X32-NEXT: sete %al
212 ; X32-NEXT: movzbl %al, %eax
213213 ; X32-NEXT: retl
214214 ;
215215 ; X64-LABEL: ptestz_1:
216216 ; X64: ## BB#0:
217 ; X64-NEXT: xorl %eax, %eax
217218 ; X64-NEXT: ptest %xmm1, %xmm0
218219 ; X64-NEXT: sete %al
219 ; X64-NEXT: movzbl %al, %eax
220220 ; X64-NEXT: retq
221221 %tmp1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone
222222 ret i32 %tmp1
243243 define i32 @ptestz_3(<2 x i64> %t1, <2 x i64> %t2) nounwind {
244244 ; X32-LABEL: ptestz_3:
245245 ; X32: ## BB#0:
246 ; X32-NEXT: xorl %eax, %eax
246247 ; X32-NEXT: ptest %xmm1, %xmm0
247248 ; X32-NEXT: seta %al
248 ; X32-NEXT: movzbl %al, %eax
249249 ; X32-NEXT: retl
250250 ;
251251 ; X64-LABEL: ptestz_3:
252252 ; X64: ## BB#0:
253 ; X64-NEXT: xorl %eax, %eax
253254 ; X64-NEXT: ptest %xmm1, %xmm0
254255 ; X64-NEXT: seta %al
255 ; X64-NEXT: movzbl %al, %eax
256256 ; X64-NEXT: retq
257257 %tmp1 = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone
258258 ret i32 %tmp1
33
44 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c
55
6 define i32 @test_mm_cmpestra(<2 x i64> %a0, i32 %a1, <2 x i64> %a2, i32 %a3) {
6 define i32 @test_mm_cmpestra(<2 x i64> %a0, i32 %a1, <2 x i64> %a2, i32 %a3) nounwind {
77 ; X32-LABEL: test_mm_cmpestra:
88 ; X32: # BB#0:
9 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
10 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
11 ; X32-NEXT: pcmpestri $7, %xmm1, %xmm0
12 ; X32-NEXT: seta %al
13 ; X32-NEXT: movzbl %al, %eax
9 ; X32-NEXT: pushl %ebx
10 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
11 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
12 ; X32-NEXT: xorl %ebx, %ebx
13 ; X32-NEXT: pcmpestri $7, %xmm1, %xmm0
14 ; X32-NEXT: seta %bl
15 ; X32-NEXT: movl %ebx, %eax
16 ; X32-NEXT: popl %ebx
1417 ; X32-NEXT: retl
1518 ;
1619 ; X64-LABEL: test_mm_cmpestra:
1720 ; X64: # BB#0:
18 ; X64-NEXT: movl %edi, %eax
19 ; X64-NEXT: movl %esi, %edx
20 ; X64-NEXT: pcmpestri $7, %xmm1, %xmm0
21 ; X64-NEXT: seta %al
22 ; X64-NEXT: movzbl %al, %eax
21 ; X64-NEXT: xorl %r8d, %r8d
22 ; X64-NEXT: movl %edi, %eax
23 ; X64-NEXT: movl %esi, %edx
24 ; X64-NEXT: pcmpestri $7, %xmm1, %xmm0
25 ; X64-NEXT: seta %r8b
26 ; X64-NEXT: movl %r8d, %eax
2327 ; X64-NEXT: retq
2428 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>
2529 %arg2 = bitcast <2 x i64> %a2 to <16 x i8>
98102 }
99103 declare <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
100104
101 define i32 @test_mm_cmpestro(<2 x i64> %a0, i32 %a1, <2 x i64> %a2, i32 %a3) {
105 define i32 @test_mm_cmpestro(<2 x i64> %a0, i32 %a1, <2 x i64> %a2, i32 %a3) nounwind {
102106 ; X32-LABEL: test_mm_cmpestro:
103107 ; X32: # BB#0:
104 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
105 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
106 ; X32-NEXT: pcmpestri $7, %xmm1, %xmm0
107 ; X32-NEXT: seto %al
108 ; X32-NEXT: movzbl %al, %eax
108 ; X32-NEXT: pushl %ebx
109 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
110 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
111 ; X32-NEXT: xorl %ebx, %ebx
112 ; X32-NEXT: pcmpestri $7, %xmm1, %xmm0
113 ; X32-NEXT: seto %bl
114 ; X32-NEXT: movl %ebx, %eax
115 ; X32-NEXT: popl %ebx
109116 ; X32-NEXT: retl
110117 ;
111118 ; X64-LABEL: test_mm_cmpestro:
112119 ; X64: # BB#0:
113 ; X64-NEXT: movl %edi, %eax
114 ; X64-NEXT: movl %esi, %edx
115 ; X64-NEXT: pcmpestri $7, %xmm1, %xmm0
116 ; X64-NEXT: seto %al
117 ; X64-NEXT: movzbl %al, %eax
120 ; X64-NEXT: xorl %r8d, %r8d
121 ; X64-NEXT: movl %edi, %eax
122 ; X64-NEXT: movl %esi, %edx
123 ; X64-NEXT: pcmpestri $7, %xmm1, %xmm0
124 ; X64-NEXT: seto %r8b
125 ; X64-NEXT: movl %r8d, %eax
118126 ; X64-NEXT: retq
119127 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>
120128 %arg2 = bitcast <2 x i64> %a2 to <16 x i8>
123131 }
124132 declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
125133
126 define i32 @test_mm_cmpestrs(<2 x i64> %a0, i32 %a1, <2 x i64> %a2, i32 %a3) {
134 define i32 @test_mm_cmpestrs(<2 x i64> %a0, i32 %a1, <2 x i64> %a2, i32 %a3) nounwind {
127135 ; X32-LABEL: test_mm_cmpestrs:
128136 ; X32: # BB#0:
129 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
130 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
131 ; X32-NEXT: pcmpestri $7, %xmm1, %xmm0
132 ; X32-NEXT: sets %al
133 ; X32-NEXT: movzbl %al, %eax
137 ; X32-NEXT: pushl %ebx
138 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
139 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
140 ; X32-NEXT: xorl %ebx, %ebx
141 ; X32-NEXT: pcmpestri $7, %xmm1, %xmm0
142 ; X32-NEXT: sets %bl
143 ; X32-NEXT: movl %ebx, %eax
144 ; X32-NEXT: popl %ebx
134145 ; X32-NEXT: retl
135146 ;
136147 ; X64-LABEL: test_mm_cmpestrs:
137148 ; X64: # BB#0:
138 ; X64-NEXT: movl %edi, %eax
139 ; X64-NEXT: movl %esi, %edx
140 ; X64-NEXT: pcmpestri $7, %xmm1, %xmm0
141 ; X64-NEXT: sets %al
142 ; X64-NEXT: movzbl %al, %eax
149 ; X64-NEXT: xorl %r8d, %r8d
150 ; X64-NEXT: movl %edi, %eax
151 ; X64-NEXT: movl %esi, %edx
152 ; X64-NEXT: pcmpestri $7, %xmm1, %xmm0
153 ; X64-NEXT: sets %r8b
154 ; X64-NEXT: movl %r8d, %eax
143155 ; X64-NEXT: retq
144156 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>
145157 %arg2 = bitcast <2 x i64> %a2 to <16 x i8>
148160 }
149161 declare i32 @llvm.x86.sse42.pcmpestris128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
150162
151 define i32 @test_mm_cmpestrz(<2 x i64> %a0, i32 %a1, <2 x i64> %a2, i32 %a3) {
163 define i32 @test_mm_cmpestrz(<2 x i64> %a0, i32 %a1, <2 x i64> %a2, i32 %a3) nounwind {
152164 ; X32-LABEL: test_mm_cmpestrz:
153165 ; X32: # BB#0:
154 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
155 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
156 ; X32-NEXT: pcmpestri $7, %xmm1, %xmm0
157 ; X32-NEXT: sete %al
158 ; X32-NEXT: movzbl %al, %eax
166 ; X32-NEXT: pushl %ebx
167 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
168 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
169 ; X32-NEXT: xorl %ebx, %ebx
170 ; X32-NEXT: pcmpestri $7, %xmm1, %xmm0
171 ; X32-NEXT: sete %bl
172 ; X32-NEXT: movl %ebx, %eax
173 ; X32-NEXT: popl %ebx
159174 ; X32-NEXT: retl
160175 ;
161176 ; X64-LABEL: test_mm_cmpestrz:
162177 ; X64: # BB#0:
163 ; X64-NEXT: movl %edi, %eax
164 ; X64-NEXT: movl %esi, %edx
165 ; X64-NEXT: pcmpestri $7, %xmm1, %xmm0
166 ; X64-NEXT: sete %al
167 ; X64-NEXT: movzbl %al, %eax
178 ; X64-NEXT: xorl %r8d, %r8d
179 ; X64-NEXT: movl %edi, %eax
180 ; X64-NEXT: movl %esi, %edx
181 ; X64-NEXT: pcmpestri $7, %xmm1, %xmm0
182 ; X64-NEXT: sete %r8b
183 ; X64-NEXT: movl %r8d, %eax
168184 ; X64-NEXT: retq
169185 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>
170186 %arg2 = bitcast <2 x i64> %a2 to <16 x i8>
191207 define i32 @test_mm_cmpistra(<2 x i64> %a0, <2 x i64> %a1) {
192208 ; X32-LABEL: test_mm_cmpistra:
193209 ; X32: # BB#0:
210 ; X32-NEXT: xorl %eax, %eax
194211 ; X32-NEXT: pcmpistri $7, %xmm1, %xmm0
195212 ; X32-NEXT: seta %al
196 ; X32-NEXT: movzbl %al, %eax
197213 ; X32-NEXT: retl
198214 ;
199215 ; X64-LABEL: test_mm_cmpistra:
200216 ; X64: # BB#0:
217 ; X64-NEXT: xorl %eax, %eax
201218 ; X64-NEXT: pcmpistri $7, %xmm1, %xmm0
202219 ; X64-NEXT: seta %al
203 ; X64-NEXT: movzbl %al, %eax
204220 ; X64-NEXT: retq
205221 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>
206222 %arg1 = bitcast <2 x i64> %a1 to <16 x i8>
270286 define i32 @test_mm_cmpistro(<2 x i64> %a0, <2 x i64> %a1) {
271287 ; X32-LABEL: test_mm_cmpistro:
272288 ; X32: # BB#0:
289 ; X32-NEXT: xorl %eax, %eax
273290 ; X32-NEXT: pcmpistri $7, %xmm1, %xmm0
274291 ; X32-NEXT: seto %al
275 ; X32-NEXT: movzbl %al, %eax
276292 ; X32-NEXT: retl
277293 ;
278294 ; X64-LABEL: test_mm_cmpistro:
279295 ; X64: # BB#0:
296 ; X64-NEXT: xorl %eax, %eax
280297 ; X64-NEXT: pcmpistri $7, %xmm1, %xmm0
281298 ; X64-NEXT: seto %al
282 ; X64-NEXT: movzbl %al, %eax
283299 ; X64-NEXT: retq
284300 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>
285301 %arg1 = bitcast <2 x i64> %a1 to <16 x i8>
291307 define i32 @test_mm_cmpistrs(<2 x i64> %a0, <2 x i64> %a1) {
292308 ; X32-LABEL: test_mm_cmpistrs:
293309 ; X32: # BB#0:
310 ; X32-NEXT: xorl %eax, %eax
294311 ; X32-NEXT: pcmpistri $7, %xmm1, %xmm0
295312 ; X32-NEXT: sets %al
296 ; X32-NEXT: movzbl %al, %eax
297313 ; X32-NEXT: retl
298314 ;
299315 ; X64-LABEL: test_mm_cmpistrs:
300316 ; X64: # BB#0:
317 ; X64-NEXT: xorl %eax, %eax
301318 ; X64-NEXT: pcmpistri $7, %xmm1, %xmm0
302319 ; X64-NEXT: sets %al
303 ; X64-NEXT: movzbl %al, %eax
304320 ; X64-NEXT: retq
305321 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>
306322 %arg1 = bitcast <2 x i64> %a1 to <16 x i8>
312328 define i32 @test_mm_cmpistrz(<2 x i64> %a0, <2 x i64> %a1) {
313329 ; X32-LABEL: test_mm_cmpistrz:
314330 ; X32: # BB#0:
331 ; X32-NEXT: xorl %eax, %eax
315332 ; X32-NEXT: pcmpistri $7, %xmm1, %xmm0
316333 ; X32-NEXT: sete %al
317 ; X32-NEXT: movzbl %al, %eax
318334 ; X32-NEXT: retl
319335 ;
320336 ; X64-LABEL: test_mm_cmpistrz:
321337 ; X64: # BB#0:
338 ; X64-NEXT: xorl %eax, %eax
322339 ; X64-NEXT: pcmpistri $7, %xmm1, %xmm0
323340 ; X64-NEXT: sete %al
324 ; X64-NEXT: movzbl %al, %eax
325341 ; X64-NEXT: retq
326342 %arg0 = bitcast <2 x i64> %a0 to <16 x i8>
327343 %arg1 = bitcast <2 x i64> %a1 to <16 x i8>
3232 }
3333
3434
35 define i32 @test_x86_sse42_pcmpestria128(<16 x i8> %a0, <16 x i8> %a2) {
35 define i32 @test_x86_sse42_pcmpestria128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
3636 ; CHECK-LABEL: test_x86_sse42_pcmpestria128:
3737 ; CHECK: ## BB#0:
38 ; CHECK-NEXT: movl $7, %eax
39 ; CHECK-NEXT: movl $7, %edx
40 ; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
41 ; CHECK-NEXT: seta %al
42 ; CHECK-NEXT: movzbl %al, %eax
38 ; CHECK-NEXT: pushl %ebx
39 ; CHECK-NEXT: movl $7, %eax
40 ; CHECK-NEXT: movl $7, %edx
41 ; CHECK-NEXT: xorl %ebx, %ebx
42 ; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
43 ; CHECK-NEXT: seta %bl
44 ; CHECK-NEXT: movl %ebx, %eax
45 ; CHECK-NEXT: popl %ebx
4346 ; CHECK-NEXT: retl
4447 %res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1]
4548 ret i32 %res
6265 declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
6366
6467
65 define i32 @test_x86_sse42_pcmpestrio128(<16 x i8> %a0, <16 x i8> %a2) {
68 define i32 @test_x86_sse42_pcmpestrio128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
6669 ; CHECK-LABEL: test_x86_sse42_pcmpestrio128:
6770 ; CHECK: ## BB#0:
68 ; CHECK-NEXT: movl $7, %eax
69 ; CHECK-NEXT: movl $7, %edx
70 ; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
71 ; CHECK-NEXT: seto %al
72 ; CHECK-NEXT: movzbl %al, %eax
71 ; CHECK-NEXT: pushl %ebx
72 ; CHECK-NEXT: movl $7, %eax
73 ; CHECK-NEXT: movl $7, %edx
74 ; CHECK-NEXT: xorl %ebx, %ebx
75 ; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
76 ; CHECK-NEXT: seto %bl
77 ; CHECK-NEXT: movl %ebx, %eax
78 ; CHECK-NEXT: popl %ebx
7379 ; CHECK-NEXT: retl
7480 %res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1]
7581 ret i32 %res
7783 declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
7884
7985
80 define i32 @test_x86_sse42_pcmpestris128(<16 x i8> %a0, <16 x i8> %a2) {
86 define i32 @test_x86_sse42_pcmpestris128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
8187 ; CHECK-LABEL: test_x86_sse42_pcmpestris128:
8288 ; CHECK: ## BB#0:
83 ; CHECK-NEXT: movl $7, %eax
84 ; CHECK-NEXT: movl $7, %edx
85 ; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
86 ; CHECK-NEXT: sets %al
87 ; CHECK-NEXT: movzbl %al, %eax
89 ; CHECK-NEXT: pushl %ebx
90 ; CHECK-NEXT: movl $7, %eax
91 ; CHECK-NEXT: movl $7, %edx
92 ; CHECK-NEXT: xorl %ebx, %ebx
93 ; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
94 ; CHECK-NEXT: sets %bl
95 ; CHECK-NEXT: movl %ebx, %eax
96 ; CHECK-NEXT: popl %ebx
8897 ; CHECK-NEXT: retl
8998 %res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1]
9099 ret i32 %res
92101 declare i32 @llvm.x86.sse42.pcmpestris128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
93102
94103
95 define i32 @test_x86_sse42_pcmpestriz128(<16 x i8> %a0, <16 x i8> %a2) {
104 define i32 @test_x86_sse42_pcmpestriz128(<16 x i8> %a0, <16 x i8> %a2) nounwind {
96105 ; CHECK-LABEL: test_x86_sse42_pcmpestriz128:
97106 ; CHECK: ## BB#0:
98 ; CHECK-NEXT: movl $7, %eax
99 ; CHECK-NEXT: movl $7, %edx
100 ; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
101 ; CHECK-NEXT: sete %al
102 ; CHECK-NEXT: movzbl %al, %eax
107 ; CHECK-NEXT: pushl %ebx
108 ; CHECK-NEXT: movl $7, %eax
109 ; CHECK-NEXT: movl $7, %edx
110 ; CHECK-NEXT: xorl %ebx, %ebx
111 ; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
112 ; CHECK-NEXT: sete %bl
113 ; CHECK-NEXT: movl %ebx, %eax
114 ; CHECK-NEXT: popl %ebx
103115 ; CHECK-NEXT: retl
104116 %res = call i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1]
105117 ret i32 %res
165177 define i32 @test_x86_sse42_pcmpistria128(<16 x i8> %a0, <16 x i8> %a1) {
166178 ; CHECK-LABEL: test_x86_sse42_pcmpistria128:
167179 ; CHECK: ## BB#0:
180 ; CHECK-NEXT: xorl %eax, %eax
168181 ; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0
169182 ; CHECK-NEXT: seta %al
170 ; CHECK-NEXT: movzbl %al, %eax
171183 ; CHECK-NEXT: retl
172184 %res = call i32 @llvm.x86.sse42.pcmpistria128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1]
173185 ret i32 %res
191203 define i32 @test_x86_sse42_pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1) {
192204 ; CHECK-LABEL: test_x86_sse42_pcmpistrio128:
193205 ; CHECK: ## BB#0:
206 ; CHECK-NEXT: xorl %eax, %eax
194207 ; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0
195208 ; CHECK-NEXT: seto %al
196 ; CHECK-NEXT: movzbl %al, %eax
197209 ; CHECK-NEXT: retl
198210 %res = call i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1]
199211 ret i32 %res
204216 define i32 @test_x86_sse42_pcmpistris128(<16 x i8> %a0, <16 x i8> %a1) {
205217 ; CHECK-LABEL: test_x86_sse42_pcmpistris128:
206218 ; CHECK: ## BB#0:
219 ; CHECK-NEXT: xorl %eax, %eax
207220 ; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0
208221 ; CHECK-NEXT: sets %al
209 ; CHECK-NEXT: movzbl %al, %eax
210222 ; CHECK-NEXT: retl
211223 %res = call i32 @llvm.x86.sse42.pcmpistris128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1]
212224 ret i32 %res
217229 define i32 @test_x86_sse42_pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1) {
218230 ; CHECK-LABEL: test_x86_sse42_pcmpistriz128:
219231 ; CHECK: ## BB#0:
232 ; CHECK-NEXT: xorl %eax, %eax
220233 ; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0
221234 ; CHECK-NEXT: sete %al
222 ; CHECK-NEXT: movzbl %al, %eax
223235 ; CHECK-NEXT: retl
224236 %res = call i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1]
225237 ret i32 %res