llvm.org GIT mirror llvm / 65b72a1
Merging r328944: ------------------------------------------------------------------------ r328944 | chandlerc | 2018-04-01 14:47:55 -0700 (Sun, 01 Apr 2018) | 4 lines [x86] Expose more of the condition conversion routines in the public API for X86's instruction information. I've now got a second patch under review that needs these same APIs. This bit is nicely orthogonal and obvious, so landing it. NFC. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@332564 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 2 years ago
2 changed file(s) with 13 addition(s) and 7 deletion(s). Raw diff Collapse all Expand all
57815781 return false;
57825782 }
57835783
5784 static X86::CondCode getCondFromBranchOpc(unsigned BrOpc) {
5784 X86::CondCode X86::getCondFromBranchOpc(unsigned BrOpc) {
57855785 switch (BrOpc) {
57865786 default: return X86::COND_INVALID;
57875787 case X86::JE_1: return X86::COND_E;
58045804 }
58055805
58065806 /// Return condition code of a SET opcode.
5807 static X86::CondCode getCondFromSETOpc(unsigned Opc) {
5807 X86::CondCode X86::getCondFromSETOpc(unsigned Opc) {
58085808 switch (Opc) {
58095809 default: return X86::COND_INVALID;
58105810 case X86::SETAr: case X86::SETAm: return X86::COND_A;
61296129 if (!I->isBranch())
61306130 assert(0 && "Can't find the branch to replace!");
61316131
6132 X86::CondCode CC = getCondFromBranchOpc(I->getOpcode());
6132 X86::CondCode CC = X86::getCondFromBranchOpc(I->getOpcode());
61336133 assert(BranchCond.size() == 1);
61346134 if (CC != BranchCond[0].getImm())
61356135 continue;
62366236 }
62376237
62386238 // Handle conditional branches.
6239 X86::CondCode BranchCode = getCondFromBranchOpc(I->getOpcode());
6239 X86::CondCode BranchCode = X86::getCondFromBranchOpc(I->getOpcode());
62406240 if (BranchCode == X86::COND_INVALID)
62416241 return true; // Can't handle indirect branch.
62426242
64326432 if (I->isDebugValue())
64336433 continue;
64346434 if (I->getOpcode() != X86::JMP_1 &&
6435 getCondFromBranchOpc(I->getOpcode()) == X86::COND_INVALID)
6435 X86::getCondFromBranchOpc(I->getOpcode()) == X86::COND_INVALID)
64366436 break;
64376437 // Remove the branch.
64386438 I->eraseFromParent();
74647464 if (IsCmpZero || IsSwapped) {
74657465 // We decode the condition code from opcode.
74667466 if (Instr.isBranch())
7467 OldCC = getCondFromBranchOpc(Instr.getOpcode());
7467 OldCC = X86::getCondFromBranchOpc(Instr.getOpcode());
74687468 else {
7469 OldCC = getCondFromSETOpc(Instr.getOpcode());
7469 OldCC = X86::getCondFromSETOpc(Instr.getOpcode());
74707470 if (OldCC != X86::COND_INVALID)
74717471 OpcIsSET = true;
74727472 else
7676 unsigned getCMovFromCond(CondCode CC, unsigned RegBytes,
7777 bool HasMemoryOperand = false);
7878
79 // Turn jCC opcode into condition code.
80 CondCode getCondFromBranchOpc(unsigned Opc);
81
82 // Turn setCC opcode into condition code.
83 CondCode getCondFromSETOpc(unsigned Opc);
84
7985 // Turn CMov opcode into condition code.
8086 CondCode getCondFromCMovOpc(unsigned Opc);
8187