llvm.org GIT mirror llvm / 65b5541
AMDGPU: Add skeleton GlobalIsel implementation Summary: This adds the necessary target code to be able to run the ir translator. Lowering function arguments and returns is a nop and there is no support for RegBankSelect. Reviewers: arsenm, qcolombet Subscribers: arsenm, joker.eph, vkalintiris, llvm-commits Differential Revision: http://reviews.llvm.org/D19077 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266356 91177308-0d34-0410-b5e6-96231b3b80d8 Tom Stellard 3 years ago
7 changed file(s) with 156 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
0 //===-- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp - Call lowering ---===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file implements the lowering of LLVM calls to machine code calls for
11 /// GlobalISel.
12 ///
13 //===----------------------------------------------------------------------===//
14
15 #include "AMDGPUCallLowering.h"
16 #include "AMDGPUISelLowering.h"
17
18 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20
21 using namespace llvm;
22
23 #ifndef LLVM_BUILD_GLOBAL_ISEL
24 #error "This shouldn't be built without GISel"
25 #endif
26
27 AMDGPUCallLowering::AMDGPUCallLowering(const AMDGPUTargetLowering &TLI)
28 : CallLowering(&TLI) {
29 }
30
31 bool AMDGPUCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
32 const Value *Val, unsigned VReg) const {
33 return true;
34 }
35
36 bool AMDGPUCallLowering::lowerFormalArguments(
37 MachineIRBuilder &MIRBuilder, const Function::ArgumentListType &Args,
38 const SmallVectorImpl &VRegs) const {
39 // TODO: Implement once there are generic loads/stores.
40 return true;
41 }
0 //===- lib/Target/AMDGPU/AMDGPUCallLowering.h - Call lowering -*- C++ -*---===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file describes how to lower LLVM calls to machine code calls.
11 ///
12 //===----------------------------------------------------------------------===//
13
14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H
15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H
16
17 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
18
19 namespace llvm {
20
21 class AMDGPUTargetLowering;
22
23 class AMDGPUCallLowering: public CallLowering {
24 public:
25 AMDGPUCallLowering(const AMDGPUTargetLowering &TLI);
26
27 bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val,
28 unsigned VReg) const override;
29 bool
30 lowerFormalArguments(MachineIRBuilder &MIRBuilder,
31 const Function::ArgumentListType &Args,
32 const SmallVectorImpl &VRegs) const override;
33 };
34 } // End of namespace llvm;
35 #endif
1212 //===----------------------------------------------------------------------===//
1313
1414 #include "AMDGPUSubtarget.h"
15 #include "AMDGPUCallLowering.h"
1516 #include "R600ISelLowering.h"
1617 #include "R600InstrInfo.h"
1718 #include "R600MachineScheduler.h"
3031 #define GET_SUBTARGETINFO_TARGET_DESC
3132 #define GET_SUBTARGETINFO_CTOR
3233 #include "AMDGPUGenSubtargetInfo.inc"
34
35 #ifdef LLVM_BUILD_GLOBAL_ISEL
36 namespace {
37 struct AMDGPUGISelActualAccessor : public GISelAccessor {
38 std::unique_ptr CallLoweringInfo;
39 const CallLowering *getCallLowering() const override {
40 return CallLoweringInfo.get();
41 }
42 };
43 } // End anonymous namespace.
44 #endif
3345
3446 AMDGPUSubtarget &
3547 AMDGPUSubtarget::initializeSubtargetDependencies(const Triple &TT,
8597 LDSBankCount(0),
8698 IsaVersion(ISAVersion0_0_0),
8799 EnableSIScheduler(false), FrameLowering(nullptr),
100 GISel(),
88101 InstrItins(getInstrItineraryForCPU(GPU)), TargetTriple(TT) {
89102
90103 initializeSubtargetDependencies(TT, GPU, FS);
107120 TargetFrameLowering::StackGrowsUp,
108121 MaxStackAlign,
109122 0));
123 #ifndef LLVM_BUILD_GLOBAL_ISEL
124 GISelAccessor *GISel = new GISelAccessor();
125 #else
126 AMDGPUGISelActualAccessor *GISel =
127 new AMDGPUGISelActualAccessor();
128 GISel->CallLoweringInfo.reset(
129 new AMDGPUCallLowering(*getTargetLowering()));
130 #endif
131 setGISelAccessor(*GISel);
110132 }
133 }
134
135 const CallLowering *AMDGPUSubtarget::getCallLowering() const {
136 assert(GISel && "Access to GlobalISel APIs not set");
137 return GISel->getCallLowering();
111138 }
112139
113140 unsigned AMDGPUSubtarget::getStackEntrySize() const {
2121 #include "AMDGPUSubtarget.h"
2222 #include "Utils/AMDGPUBaseInfo.h"
2323 #include "llvm/ADT/StringRef.h"
24 #include "llvm/CodeGen/GlobalISel/GISelAccessor.h"
2425 #include "llvm/Target/TargetSubtargetInfo.h"
2526
2627 #define GET_SUBTARGETINFO_HEADER
9798 std::unique_ptr FrameLowering;
9899 std::unique_ptr TLInfo;
99100 std::unique_ptr InstrInfo;
101 std::unique_ptr GISel;
100102 InstrItineraryData InstrItins;
101103 Triple TargetTriple;
102104
106108 AMDGPUSubtarget &initializeSubtargetDependencies(const Triple &TT,
107109 StringRef GPU, StringRef FS);
108110
111 void setGISelAccessor(GISelAccessor &GISel) {
112 this->GISel.reset(&GISel);
113 }
114
109115 const AMDGPUFrameLowering *getFrameLowering() const override {
110116 return FrameLowering.get();
111117 }
121127 const InstrItineraryData *getInstrItineraryData() const override {
122128 return &InstrItins;
123129 }
130
131 const CallLowering *getCallLowering() const override;
124132
125133 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
126134
2222 #include "SIISelLowering.h"
2323 #include "SIInstrInfo.h"
2424 #include "llvm/Analysis/Passes.h"
25 #include "llvm/CodeGen/GlobalISel/IRTranslator.h"
2526 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
2627 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
2728 #include "llvm/CodeGen/MachineModuleInfo.h"
201202 : AMDGPUPassConfig(TM, PM) { }
202203 bool addPreISel() override;
203204 bool addInstSelector() override;
205 #ifdef LLVM_BUILD_GLOBAL_ISEL
206 bool addIRTranslator() override;
207 bool addRegBankSelect() override;
208 #endif
204209 void addFastRegAlloc(FunctionPass *RegAllocPass) override;
205210 void addOptimizedRegAlloc(FunctionPass *RegAllocPass) override;
206211 void addPreRegAlloc() override;
325330 return false;
326331 }
327332
333 #ifdef LLVM_BUILD_GLOBAL_ISEL
334 bool GCNPassConfig::addIRTranslator() {
335 addPass(new IRTranslator());
336 return false;
337 }
338
339 bool GCNPassConfig::addRegBankSelect() {
340 return false;
341 }
342 #endif
343
328344 void GCNPassConfig::addPreRegAlloc() {
329345 const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl();
330346
1111 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
1212 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
1313 add_public_tablegen_target(AMDGPUCommonTableGen)
14
15 # List of all GlobalISel files.
16 set(GLOBAL_ISEL_FILES
17 AMDGPUCallLowering.cpp
18 )
19
20 # Add GlobalISel files to the dependencies if the user wants to build it.
21 if(LLVM_BUILD_GLOBAL_ISEL)
22 set(GLOBAL_ISEL_BUILD_FILES ${GLOBAL_ISEL_FILES})
23 else()
24 set(GLOBAL_ISEL_BUILD_FILES"")
25 set(LLVM_OPTIONAL_SOURCES LLVMGlobalISel ${GLOBAL_ISEL_FILES})
26 endif()
27
1428
1529 add_llvm_target(AMDGPUCodeGen
1630 AMDILCFGStructurizer.cpp
6276 SIShrinkInstructions.cpp
6377 SITypeRewriter.cpp
6478 SIWholeQuadMode.cpp
79 ${GLOBAL_ISEL_BUILD_FILES}
6580 )
6681
6782 add_subdirectory(AsmParser)
0 ; RUN: llc -march=amdgcn -mcpu=fiji -O0 -stop-after=irtranslator -global-isel %s -o - 2>&1 | FileCheck %s
1 ; REQUIRES: global-isel
2 ; This file checks that the translation from llvm IR to generic MachineInstr
3 ; is correct.
4
5 ; Tests for add.
6 ; CHECK: name: addi32
7 ; CHECK: G_ADD i32
8 define i32 @addi32(i32 %arg1, i32 %arg2) {
9 %res = add i32 %arg1, %arg2
10 ret i32 %res
11 }