llvm.org GIT mirror llvm / 65482b1
Re-apply r112883: "For ARM stack frames that utilize variable sized objects and have either large local stack areas or require dynamic stack realignment, allocate a base register via which to access the local frame. This allows efficient access to frame indices not accessible via the FP (either due to being out of range or due to dynamic realignment) or the SP (due to variable sized object allocation). In particular, this greatly improves efficiency of access to spill slots in Thumb functions which contain VLAs." r112986 fixed a latent bug exposed by the above. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112989 91177308-0d34-0410-b5e6-96231b3b80d8 Jim Grosbach 10 years ago
5 changed file(s) with 98 addition(s) and 36 deletion(s). Raw diff Collapse all Expand all
4848 }
4949
5050 using namespace llvm;
51
52 static cl::opt
53 EnableBasePointer("arm-use-base-pointer", cl::Hidden, cl::init(true),
54 cl::desc("Enable use of a base pointer for complex stack frames"));
5155
5256 unsigned ARMBaseRegisterInfo::getRegisterNumbering(unsigned RegEnum,
5357 bool *isSPVFP) {
145149 const ARMSubtarget &sti)
146150 : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP),
147151 TII(tii), STI(sti),
148 FramePtr((STI.isTargetDarwin() || STI.isThumb()) ? ARM::R7 : ARM::R11) {
152 FramePtr((STI.isTargetDarwin() || STI.isThumb()) ? ARM::R7 : ARM::R11),
153 BasePtr(ARM::R6) {
149154 }
150155
151156 const unsigned*
181186 Reserved.set(ARM::FPSCR);
182187 if (hasFP(MF))
183188 Reserved.set(FramePtr);
189 if (hasBasePointer(MF))
190 Reserved.set(BasePtr);
184191 // Some targets reserve R9.
185192 if (STI.isR9Reserved())
186193 Reserved.set(ARM::R9);
194201 case ARM::SP:
195202 case ARM::PC:
196203 return true;
204 case ARM::R6:
205 if (hasBasePointer(MF))
206 return true;
207 break;
197208 case ARM::R7:
198209 case ARM::R11:
199210 if (FramePtr == Reg && hasFP(MF))
624635 MFI->isFrameAddressTaken());
625636 }
626637
627 bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {
638 bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
628639 const MachineFrameInfo *MFI = MF.getFrameInfo();
629640 const ARMFunctionInfo *AFI = MF.getInfo();
630 return (RealignStack &&
631 !AFI->isThumb1OnlyFunction() &&
632 !MFI->hasVarSizedObjects());
641
642 if (!EnableBasePointer)
643 return false;
644
645 if (needsStackRealignment(MF) && MFI->hasVarSizedObjects())
646 return true;
647
648 // Thumb has trouble with negative offsets from the FP. Thumb2 has a limited
649 // negative range for ldr/str (255), and thumb1 is positive offsets only.
650 // It's going to be better to use the SP or Base Pointer instead. When there
651 // are variable sized objects, we can't reference off of the SP, so we
652 // reserve a Base Pointer.
653 if (AFI->isThumbFunction() && MFI->hasVarSizedObjects()) {
654 // Conservatively estimate whether the negative offset from the frame
655 // pointer will be sufficient to reach. If a function has a smallish
656 // frame, it's less likely to have lots of spills and callee saved
657 // space, so it's all more likely to be within range of the frame pointer.
658 // If it's wrong, the scavenger will still enable access to work, it just
659 // won't be optimal.
660 if (AFI->isThumb2Function() && MFI->getLocalFrameSize() < 128)
661 return false;
662 return true;
663 }
664
665 return false;
666 }
667
668 bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {
669 const ARMFunctionInfo *AFI = MF.getInfo();
670 return (RealignStack && !AFI->isThumb1OnlyFunction());
633671 }
634672
635673 bool ARMBaseRegisterInfo::
636674 needsStackRealignment(const MachineFunction &MF) const {
637675 const MachineFrameInfo *MFI = MF.getFrameInfo();
638676 const Function *F = MF.getFunction();
639 const ARMFunctionInfo *AFI = MF.getInfo();
640677 unsigned StackAlign = MF.getTarget().getFrameInfo()->getStackAlignment();
641678 bool requiresRealignment = ((MFI->getLocalFrameMaxAlign() > StackAlign) ||
642679 F->hasFnAttr(Attribute::StackAlignment));
643
644 // FIXME: Currently we don't support stack realignment for functions with
645 // variable-sized allocas.
646 // FIXME: It's more complicated than this...
647 if (0 && requiresRealignment && MFI->hasVarSizedObjects())
648 report_fatal_error(
649 "Stack realignment in presense of dynamic allocas is not supported");
650
651 // FIXME: This probably isn't the right place for this.
652 if (0 && requiresRealignment && AFI->isThumb1OnlyFunction())
653 report_fatal_error(
654 "Stack realignment in thumb1 functions is not supported");
655680
656681 return requiresRealignment && canRealignStack(MF);
657682 }
774799 // Spill LR if Thumb1 function uses variable length argument lists.
775800 if (AFI->isThumb1OnlyFunction() && AFI->getVarArgsRegSaveSize() > 0)
776801 MF.getRegInfo().setPhysRegUsed(ARM::LR);
802
803 // Spill the BasePtr if it's used.
804 if (hasBasePointer(MF))
805 MF.getRegInfo().setPhysRegUsed(BasePtr);
777806
778807 // Don't spill FP if the frame can be eliminated. This is determined
779808 // by scanning the callee-save registers to see if any is used.
10211050 return Offset - AFI->getDPRCalleeSavedAreaOffset();
10221051
10231052 // When dynamically realigning the stack, use the frame pointer for
1024 // parameters, and the stack pointer for locals.
1053 // parameters, and the stack/base pointer for locals.
10251054 if (needsStackRealignment(MF)) {
10261055 assert (hasFP(MF) && "dynamic stack realignment without a FP!");
10271056 if (isFixed) {
10281057 FrameReg = getFrameRegister(MF);
10291058 Offset = FPOffset;
1030 }
1059 } else if (MFI->hasVarSizedObjects())
1060 FrameReg = BasePtr;
10311061 return Offset;
10321062 }
10331063
10351065 if (hasFP(MF) && AFI->hasStackFrame()) {
10361066 // Use frame pointer to reference fixed objects. Use it for locals if
10371067 // there are VLAs (and thus the SP isn't reliable as a base).
1038 if (isFixed || MFI->hasVarSizedObjects()) {
1068 if (isFixed || (MFI->hasVarSizedObjects() && !hasBasePointer(MF))) {
10391069 FrameReg = getFrameRegister(MF);
10401070 Offset = FPOffset;
1071 } else if (MFI->hasVarSizedObjects()) {
1072 assert(hasBasePointer(MF) && "missing base pointer!");
1073 // Use the base register since we have it.
1074 FrameReg = BasePtr;
10411075 } else if (AFI->isThumb2Function()) {
10421076 // In Thumb2 mode, the negative offset is very limited. Try to avoid
10431077 // out of range references.
10511085 Offset = FPOffset;
10521086 }
10531087 }
1088 // Use the base pointer if we have one.
1089 if (hasBasePointer(MF))
1090 FrameReg = BasePtr;
10541091 return Offset;
10551092 }
10561093
10881125 case ARM::R5:
10891126 return ARM::R4;
10901127 case ARM::R7:
1091 return isReservedReg(MF, ARM::R7) ? 0 : ARM::R6;
1128 return (isReservedReg(MF, ARM::R7) || isReservedReg(MF, ARM::R6))
1129 ? 0 : ARM::R6;
10921130 case ARM::R9:
10931131 return isReservedReg(MF, ARM::R9) ? 0 :ARM::R8;
10941132 case ARM::R11:
11771215 case ARM::R4:
11781216 return ARM::R5;
11791217 case ARM::R6:
1180 return isReservedReg(MF, ARM::R7) ? 0 : ARM::R7;
1218 return (isReservedReg(MF, ARM::R7) || isReservedReg(MF, ARM::R6))
1219 ? 0 : ARM::R7;
11811220 case ARM::R8:
11821221 return isReservedReg(MF, ARM::R9) ? 0 :ARM::R9;
11831222 case ARM::R10:
18771916 AFI->setShouldRestoreSPFromFP(true);
18781917 }
18791918
1919 // If we need a base pointer, set it up here. It's whatever the value
1920 // of the stack pointer is at this point. Any variable size objects
1921 // will be allocated after this, so we can still use the base pointer
1922 // to reference locals.
1923 if (hasBasePointer(MF)) {
1924 if (isARM)
1925 BuildMI(MBB, MBBI, dl, TII.get(ARM::MOVr), BasePtr)
1926 .addReg(ARM::SP)
1927 .addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
1928 else
1929 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVgpr2gpr), BasePtr)
1930 .addReg(ARM::SP);
1931 }
1932
18801933 // If the frame has variable sized objects then the epilogue must restore
18811934 // the sp from fp.
18821935 if (!AFI->shouldRestoreSPFromFP() && MFI->hasVarSizedObjects())
5151 /// FramePtr - ARM physical register used as frame ptr.
5252 unsigned FramePtr;
5353
54 /// BasePtr - ARM physical register used as a base ptr in complex stack
55 /// frames. I.e., when we need a 3rd base, not just SP and FP, due to
56 /// variable size stack objects.
57 unsigned BasePtr;
58
5459 // Can be only subclassed.
5560 explicit ARMBaseRegisterInfo(const ARMBaseInstrInfo &tii,
5661 const ARMSubtarget &STI);
101106 MachineFunction &MF) const;
102107
103108 bool hasFP(const MachineFunction &MF) const;
109 bool hasBasePointer(const MachineFunction &MF) const;
104110
105111 bool canRealignStack(const MachineFunction &MF) const;
106112 bool needsStackRealignment(const MachineFunction &MF) const;
603603 else if (MF.getFrameInfo()->hasVarSizedObjects()) {
604604 assert(SPAdj == 0 && hasFP(MF) && "Unexpected");
605605 // There are alloca()'s in this function, must reference off the frame
606 // pointer instead.
607 FrameReg = getFrameRegister(MF);
608 Offset -= AFI->getFramePtrSpillOffset();
606 // pointer or base pointer instead.
607 if (!hasBasePointer(MF)) {
608 FrameReg = getFrameRegister(MF);
609 Offset -= AFI->getFramePtrSpillOffset();
610 } else
611 FrameReg = BasePtr;
609612 }
610613
611614 // Special handling of dbg_value instructions.
786789 AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
787790 AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
788791 AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
792
793 // If we need a base pointer, set it up here. It's whatever the value
794 // of the stack pointer is at this point. Any variable size objects
795 // will be allocated after this, so we can still use the base pointer
796 // to reference locals.
797 if (hasBasePointer(MF))
798 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVgpr2gpr), BasePtr).addReg(ARM::SP);
789799 }
790800
791801 static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) {
0 ; RUN: llc < %s -march=thumb | not grep {ldr sp}
11 ; RUN: llc < %s -mtriple=thumb-apple-darwin | \
22 ; RUN: not grep {sub.*r7}
3 ; RUN: llc < %s -march=thumb | grep 4294967280
3 ; RUN: llc < %s -march=thumb | grep {mov.*r6, sp}
44
55 %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
66 %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
66 define void @t() nounwind ssp {
77 entry:
88 ; CHECK: t:
9 ; CHECK: push {r4, r7}
10 ; CHECK: mov r0, sp
11 ; CHECK: add r7, sp, #4
12 ; CHECK: bic r0, r0, #7
9 %size = mul i32 8, 2
1310 ; CHECK: subs r0, #16
1411 ; CHECK: mov sp, r0
15 ; CHECK: mov r0, sp
16 ; CHECK: bic r0, r0, #7
12 %vla_a = alloca i8, i32 %size, align 8
1713 ; CHECK: subs r0, #16
1814 ; CHECK: mov sp, r0
19
20 %size = mul i32 8, 2
21 %vla_a = alloca i8, i32 %size, align 8
2215 %vla_b = alloca i8, i32 %size, align 8
2316 unreachable
2417 }