llvm.org GIT mirror llvm / 64c88d7
bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted: mov lr, pc bx lr So, the function was not called. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8 Lauro Ramos Venancio 13 years ago
4 changed file(s) with 84 addition(s) and 22 deletion(s). Raw diff Collapse all Expand all
543543 Callee = DAG.getTargetExternalSymbol(Sym, getPointerTy());
544544 }
545545
546 std::vector NodeTys;
547 NodeTys.push_back(MVT::Other); // Returns a chain
548 NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
549
550 std::vector Ops;
551 Ops.push_back(Chain);
552 Ops.push_back(Callee);
553
554 // Add argument registers to the end of the list so that they are known live
555 // into the call.
556 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
557 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
558 RegsToPass[i].second.getValueType()));
559
560546 // FIXME: handle tail calls differently.
561547 unsigned CallOpc;
562548 if (Subtarget->isThumb()) {
568554 CallOpc = (isDirect || Subtarget->hasV5TOps())
569555 ? ARMISD::CALL : ARMISD::CALL_NOLINK;
570556 }
557 if (CallOpc == ARMISD::CALL_NOLINK) {
558 // On CALL_NOLINK we must move PC to LR
559 Chain = DAG.getCopyToReg(Chain, ARM::LR,
560 DAG.getRegister(ARM::PC, MVT::i32), InFlag);
561 InFlag = Chain.getValue(1);
562 }
563
564 std::vector NodeTys;
565 NodeTys.push_back(MVT::Other); // Returns a chain
566 NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
567
568 std::vector Ops;
569 Ops.push_back(Chain);
570 Ops.push_back(Callee);
571
572 // Add argument registers to the end of the list so that they are known live
573 // into the call.
574 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
575 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
576 RegsToPass[i].second.getValueType()));
577
571578 if (InFlag.Val)
572579 Ops.push_back(InFlag);
573580 Chain = DAG.getNode(CallOpc, NodeTys, &Ops[0], Ops.size());
369369 : I;
370370 class AI4 pattern>
371371 : I;
372 class AIx2 pattern>
373 : I;
374372 class AI1x2 pattern>
375373 : I;
376374
545543 def BLX : AI<(ops GPR:$dst, variable_ops),
546544 "blx $dst",
547545 [(ARMcall GPR:$dst)]>, Requires<[IsARM, HasV5T]>;
548 // ARMv4T
549 def BX : AIx2<(ops GPR:$dst, variable_ops),
550 "mov lr, pc\n\tbx $dst",
546 let Uses = [LR] in {
547 // ARMv4T
548 def BX : AI<(ops GPR:$dst, variable_ops),
549 "bx $dst",
551550 [(ARMcall_nolink GPR:$dst)]>;
551 }
552552 }
553553
554554 let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
188188 def tBLXr : TI<(ops GPR:$dst, variable_ops),
189189 "blx $dst",
190190 [(ARMtcall GPR:$dst)]>, Requires<[HasV5T]>;
191 // ARMv4T
192 def tBX : TIx2<(ops GPR:$dst, variable_ops),
193 "cpy lr, pc\n\tbx $dst",
191 let Uses = [LR] in {
192 // ARMv4T
193 def tBX : TI<(ops GPR:$dst, variable_ops),
194 "bx $dst",
194195 [(ARMcall_nolink GPR:$dst)]>;
196 }
195197 }
196198
197199 let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
0 ; RUN: llvm-as < %s | llc -march=arm &&
1 ; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | not grep "bx lr"
2
3 %struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
4 @r = external global [14 x i32] ; <[14 x i32]*> [#uses=4]
5 @isa = external global [13 x %struct.anon] ; <[13 x %struct.anon]*> [#uses=1]
6 @pgm = external global [2 x { i32, [3 x i32] }] ; <[2 x { i32, [3 x i32] }]*> [#uses=4]
7 @numi = external global i32 ; [#uses=1]
8 @counter = external global [2 x i32] ; <[2 x i32]*> [#uses=1]
9
10 implementation ; Functions:
11
12 define void @main_bb_2E_i_bb205_2E_i_2E_i_bb115_2E_i_2E_i() {
13 newFuncRoot:
14 br label %bb115.i.i
15
16 bb115.i.i.bb170.i.i_crit_edge.exitStub: ; preds = %bb115.i.i
17 ret void
18
19 bb115.i.i.bb115.i.i_crit_edge: ; preds = %bb115.i.i
20 br label %bb115.i.i
21
22 bb115.i.i: ; preds = %bb115.i.i.bb115.i.i_crit_edge, %newFuncRoot
23 %i_addr.3210.0.i.i = phi i32 [ %tmp166.i.i, %bb115.i.i.bb115.i.i_crit_edge ], [ 0, %newFuncRoot ] ; [#uses=7]
24 %tmp124.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 0 ; [#uses=1]
25 %tmp125.i.i = load i32* %tmp124.i.i ; [#uses=1]
26 %tmp126.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp125.i.i ; [#uses=1]
27 %tmp127.i.i = load i32* %tmp126.i.i ; [#uses=1]
28 %tmp131.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 1 ; [#uses=1]
29 %tmp132.i.i = load i32* %tmp131.i.i ; [#uses=1]
30 %tmp133.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp132.i.i ; [#uses=1]
31 %tmp134.i.i = load i32* %tmp133.i.i ; [#uses=1]
32 %tmp138.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 2 ; [#uses=1]
33 %tmp139.i.i = load i32* %tmp138.i.i ; [#uses=1]
34 %tmp140.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp139.i.i ; [#uses=1]
35 %tmp141.i.i = load i32* %tmp140.i.i ; [#uses=1]
36 %tmp143.i.i = add i32 %i_addr.3210.0.i.i, 12 ; [#uses=1]
37 %tmp146.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 0 ; [#uses=1]
38 %tmp147.i.i = load i32* %tmp146.i.i ; [#uses=1]
39 %tmp149.i.i = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 %tmp147.i.i, i32 0 ; [#uses=1]
40 %tmp150.i.i = load i32 (i32, i32, i32)** %tmp149.i.i ; [#uses=1]
41 %tmp154.i.i = tail call i32 %tmp150.i.i( i32 %tmp127.i.i, i32 %tmp134.i.i, i32 %tmp141.i.i ) ; [#uses=1]
42 %tmp155.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp143.i.i ; [#uses=1]
43 store i32 %tmp154.i.i, i32* %tmp155.i.i
44 %tmp159.i.i = getelementptr [2 x i32]* @counter, i32 0, i32 %i_addr.3210.0.i.i ; [#uses=2]
45 %tmp160.i.i = load i32* %tmp159.i.i ; [#uses=1]
46 %tmp161.i.i = add i32 %tmp160.i.i, 1 ; [#uses=1]
47 store i32 %tmp161.i.i, i32* %tmp159.i.i
48 %tmp166.i.i = add i32 %i_addr.3210.0.i.i, 1 ; [#uses=2]
49 %tmp168.i.i = load i32* @numi ; [#uses=1]
50 icmp slt i32 %tmp166.i.i, %tmp168.i.i ; :0 [#uses=1]
51 br i1 %0, label %bb115.i.i.bb115.i.i_crit_edge, label %bb115.i.i.bb170.i.i_crit_edge.exitStub
52 }