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Initial checkin git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145 91177308-0d34-0410-b5e6-96231b3b80d8 Chris Lattner 18 years ago
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0 Date: Fri, 6 Jul 2001 16:56:56 -0500
1 From: Vikram S. Adve
2 To: Chris Lattner
3 Subject: lowering the IR
4
5 BTW, I do think that we should consider lowering the IR as you said. I
6 didn't get time to raise it today, but it comes up with the SPARC
7 move-conditional instruction. I don't think we want to put that in the core
8 VM -- it is a little too specialized. But without a corresponding
9 conditional move instruction in the VM, it is pretty difficult to maintain a
10 close mapping between VM and machine code. Other architectures may have
11 other such instructions.
12
13 What I was going to suggest was that for a particular processor, we define
14 additional VM instructions that match some of the unusual opcodes on the
15 processor but have VM semantics otherwise, i.e., all operands are in SSA
16 form and typed. This means that we can re-generate core VM code from the
17 more specialized code any time we want (so that portability is not lost).
18
19 Typically, a static compiler like gcc would generate just the core VM, which
20 is relatively portable. Anyone (an offline tool, the linker, etc., or even
21 the static compiler itself if it chooses) can transform that into more
22 specialized target-specific VM code for a particular architecture. If the
23 linker does it, it can do it after all machine-independent optimizations.
24 This would be the most convenient, but not necessary.
25
26 The main benefit of lowering will be that we will be able to retain a close
27 mapping between VM and machine code.
28
29 --Vikram
30