llvm.org GIT mirror llvm / 643c0a4
[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304954 91177308-0d34-0410-b5e6-96231b3b80d8 Eugene Zelenko 3 years ago
20 changed file(s) with 292 addition(s) and 201 deletion(s). Raw diff Collapse all Expand all
None //=- llvm/CodeGen/DFAPacketizer.h - DFA Packetizer for VLIW ---*- C++ -*-=====//
0 //===- llvm/CodeGen/DFAPacketizer.h - DFA Packetizer for VLIW ---*- C++ -*-===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
2828 #include "llvm/ADT/DenseMap.h"
2929 #include "llvm/CodeGen/MachineBasicBlock.h"
3030 #include "llvm/CodeGen/ScheduleDAGMutation.h"
31 #include
3132 #include
33 #include
34 #include
35 #include
3236
3337 namespace llvm {
3438
35 class MCInstrDesc;
39 class DefaultVLIWScheduler;
40 class InstrItineraryData;
41 class MachineFunction;
3642 class MachineInstr;
3743 class MachineLoopInfo;
38 class MachineDominatorTree;
39 class InstrItineraryData;
40 class DefaultVLIWScheduler;
44 class MCInstrDesc;
4145 class SUnit;
46 class TargetInstrInfo;
4247
4348 // --------------------------------------------------------------------
4449 // Definitions shared between DFAPacketizer.cpp and DFAPacketizerEmitter.cpp
6368 #define DFA_MAX_RESTERMS 4 // The max # of AND'ed resource terms.
6469 #define DFA_MAX_RESOURCES 16 // The max # of resource bits in one term.
6570
66 typedef uint64_t DFAInput;
67 typedef int64_t DFAStateInput;
71 using DFAInput = uint64_t;
72 using DFAStateInput = int64_t;
73
6874 #define DFA_TBLTYPE "int64_t" // For generating DFAStateInputTable.
6975 // --------------------------------------------------------------------
7076
7177 class DFAPacketizer {
7278 private:
73 typedef std::pair UnsignPair;
79 using UnsignPair = std::pair;
7480
7581 const InstrItineraryData *InstrItins;
76 int CurrentState;
82 int CurrentState = 0;
7783 const DFAStateInput (*DFAStateInputTable)[2];
7884 const unsigned *DFAStateEntryTable;
7985
100106
101107 // Check if the resources occupied by a MCInstrDesc are available in
102108 // the current state.
103 bool canReserveResources(const llvm::MCInstrDesc *MID);
109 bool canReserveResources(const MCInstrDesc *MID);
104110
105111 // Reserve the resources occupied by a MCInstrDesc and change the current
106112 // state to reflect that change.
107 void reserveResources(const llvm::MCInstrDesc *MID);
113 void reserveResources(const MCInstrDesc *MID);
108114
109115 // Check if the resources occupied by a machine instruction are available
110116 // in the current state.
111 bool canReserveResources(llvm::MachineInstr &MI);
117 bool canReserveResources(MachineInstr &MI);
112118
113119 // Reserve the resources occupied by a machine instruction and change the
114120 // current state to reflect that change.
115 void reserveResources(llvm::MachineInstr &MI);
121 void reserveResources(MachineInstr &MI);
116122
117123 const InstrItineraryData *getInstrItins() const { return InstrItins; }
118124 };
119
120125
121126 // VLIWPacketizerList implements a simple VLIW packetizer using DFA. The
122127 // packetizer works on machine basic blocks. For each instruction I in BB,
204209 void addMutation(std::unique_ptr Mutation);
205210 };
206211
207 } // namespace llvm
208
209 #endif
212 } // end namespace llvm
213
214 #endif // LLVM_CODEGEN_DFAPACKETIZER_H
None //===- llvm/CodeGen/ExecutionDepsFix.h - Execution Dependency Fix -*- C++ -*-=//
0 //==- llvm/CodeGen/ExecutionDepsFix.h - Execution Dependency Fix -*- C++ -*-==//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1919 //
2020 //===----------------------------------------------------------------------===//
2121
22
2322 #ifndef LLVM_CODEGEN_EXECUTIONDEPSFIX_H
2423 #define LLVM_CODEGEN_EXECUTIONDEPSFIX_H
2524
25 #include "llvm/ADT/DenseMap.h"
26 #include "llvm/ADT/iterator_range.h"
2627 #include "llvm/ADT/SmallVector.h"
2728 #include "llvm/CodeGen/LivePhysRegs.h"
29 #include "llvm/CodeGen/MachineFunction.h"
2830 #include "llvm/CodeGen/MachineFunctionPass.h"
2931 #include "llvm/CodeGen/RegisterClassInfo.h"
32 #include "llvm/Pass.h"
3033 #include "llvm/Support/Allocator.h"
34 #include "llvm/Support/MathExtras.h"
35 #include
36 #include
37 #include
3138 #include
3239
3340 namespace llvm {
41
42 class MachineBasicBlock;
43 class MachineInstr;
44 class TargetInstrInfo;
3445
3546 /// A DomainValue is a bit like LiveIntervals' ValNo, but it also keeps track
3647 /// of execution domains.
4960 /// domains.
5061 struct DomainValue {
5162 // Basic reference counting.
52 unsigned Refs;
63 unsigned Refs = 0;
5364
5465 // Bitmask of available domains. For an open DomainValue, it is the still
5566 // possible domains for collapsing. For a collapsed DomainValue it is the
6374
6475 // Twiddleable instructions using or defining these registers.
6576 SmallVector Instrs;
77
78 DomainValue() { clear(); }
6679
6780 // A collapsed DomainValue has no instructions to twiddle - it simply keeps
6881 // track of the domains where the registers are already available.
95108 unsigned getFirstDomain() const {
96109 return countTrailingZeros(AvailableDomains);
97110 }
98
99 DomainValue() : Refs(0) { clear(); }
100111
101112 // Clear this DomainValue and point to next which has all its data.
102113 void clear() {
135146 // Keeps clearance and domain information for all registers. Note that this
136147 // is different from the usual definition notion of liveness. The CPU
137148 // doesn't care whether or not we consider a register killed.
138 LiveReg *OutRegs;
149 LiveReg *OutRegs = nullptr;
139150
140151 // Whether we have gotten to this block in primary processing yet.
141 bool PrimaryCompleted;
152 bool PrimaryCompleted = false;
142153
143154 // The number of predecessors for which primary processing has completed
144 unsigned IncomingProcessed;
155 unsigned IncomingProcessed = 0;
145156
146157 // The value of `IncomingProcessed` at the start of primary processing
147 unsigned PrimaryIncoming;
158 unsigned PrimaryIncoming = 0;
148159
149160 // The number of predecessors for which all processing steps are done.
150 unsigned IncomingCompleted;
151
152 MBBInfo()
153 : OutRegs(nullptr), PrimaryCompleted(false), IncomingProcessed(0),
154 PrimaryIncoming(0), IncomingCompleted(0) {}
161 unsigned IncomingCompleted = 0;
162
163 MBBInfo() = default;
155164 };
156 typedef DenseMap MBBInfoMap;
165 using MBBInfoMap = DenseMap;
157166 MBBInfoMap MBBInfos;
158167
159168 /// List of undefined register reads in this block in forward order.
160 std::vector*, unsigned> > UndefReads;
169 std::vector *, unsigned>> UndefReads;
161170
162171 /// Storage for register unit liveness.
163172 LivePhysRegs LiveRegSet;
165174 /// Current instruction number.
166175 /// The first instruction in each basic block is 0.
167176 int CurInstr;
177
168178 public:
169179 ExecutionDepsFix(char &PassID, const TargetRegisterClass &RC)
170180 : MachineFunctionPass(PassID), RC(&RC), NumRegs(RC.getNumRegs()) {}
216226
217227 } // end namepsace llvm
218228
219 #endif
229 #endif // LLVM_CODEGEN_EXECUTIONDEPSFIX_H
1616
1717 #include "llvm/ADT/DenseMap.h"
1818 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/ADT/StringRef.h"
1920 #include "llvm/CodeGen/MachineBasicBlock.h"
2021 #include "llvm/CodeGen/MachineValueType.h"
2122 #include "llvm/IR/Attributes.h"
2930 #include
3031 #include
3132 #include
32 #include
3333
3434 namespace llvm {
3535
36 class AllocaInst;
37 class BasicBlock;
38 class CallInst;
39 class Constant;
40 class ConstantFP;
41 class DataLayout;
42 class FunctionLoweringInfo;
43 class LoadInst;
3644 class MachineConstantPool;
45 class MachineFrameInfo;
46 class MachineFunction;
47 class MachineInstr;
48 class MachineMemOperand;
49 class MachineOperand;
50 class MachineRegisterInfo;
51 class MCContext;
52 class MCInstrDesc;
53 class MCSymbol;
54 class TargetInstrInfo;
55 class TargetLibraryInfo;
56 class TargetMachine;
57 class TargetRegisterClass;
58 class TargetRegisterInfo;
59 class Type;
60 class User;
61 class Value;
3762
3863 /// \brief This is a fast-path instruction selection class that generates poor
3964 /// code and doesn't support illegal types or non-trivial lowering, but runs
4065 /// quickly.
4166 class FastISel {
4267 public:
43 typedef TargetLoweringBase::ArgListEntry ArgListEntry;
44 typedef TargetLoweringBase::ArgListTy ArgListTy;
68 using ArgListEntry = TargetLoweringBase::ArgListEntry;
69 using ArgListTy = TargetLoweringBase::ArgListTy;
4570 struct CallLoweringInfo {
4671 Type *RetTy = nullptr;
4772 bool RetSExt : 1;
201226 MachineInstr *EmitStartPt;
202227
203228 public:
229 virtual ~FastISel();
230
204231 /// \brief Return the position of the last instruction emitted for
205232 /// materializing constants for use in the current block.
206233 MachineInstr *getLastLocalValue() { return LastLocalValue; }
292319 /// \brief Reset InsertPt to the given old insert position.
293320 void leaveLocalValueArea(SavePoint Old);
294321
295 virtual ~FastISel();
296
297322 protected:
298323 explicit FastISel(FunctionLoweringInfo &FuncInfo,
299324 const TargetLibraryInfo *LibInfo,
333358
334359 /// \brief This method is called by target-independent code to request that an
335360 /// instruction with the given type, opcode, and register and immediate
336 // operands be emitted.
361 /// operands be emitted.
337362 virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
338363 bool Op0IsKill, uint64_t Imm);
339364
None //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
0 //===- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen ---===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
2222 #include "llvm/ADT/SmallVector.h"
2323 #include "llvm/CodeGen/ISDOpcodes.h"
2424 #include "llvm/CodeGen/MachineBasicBlock.h"
25 #include "llvm/IR/InlineAsm.h"
2625 #include "llvm/IR/Instructions.h"
26 #include "llvm/IR/Type.h"
27 #include "llvm/IR/Value.h"
2728 #include "llvm/Support/KnownBits.h"
2829 #include "llvm/Target/TargetRegisterInfo.h"
30 #include
31 #include
2932 #include
3033
3134 namespace llvm {
3235
33 class AllocaInst;
36 class Argument;
3437 class BasicBlock;
3538 class BranchProbabilityInfo;
3639 class Function;
37 class GlobalVariable;
3840 class Instruction;
41 class MachineFunction;
3942 class MachineInstr;
40 class MachineBasicBlock;
41 class MachineFunction;
42 class MachineModuleInfo;
4343 class MachineRegisterInfo;
44 class MVT;
4445 class SelectionDAG;
45 class MVT;
4646 class TargetLowering;
47 class Value;
4847
4948 //===--------------------------------------------------------------------===//
5049 /// FunctionLoweringInfo - This contains information that is global to a
7372
7473 /// A map from swifterror value in a basic block to the virtual register it is
7574 /// currently represented by.
76 llvm::DenseMap, unsigned>
75 DenseMap, unsigned>
7776 SwiftErrorVRegDefMap;
7877
7978 /// A list of upward exposed vreg uses that need to be satisfied by either a
8079 /// copy def or a phi node at the beginning of the basic block representing
8180 /// the predecessor(s) swifterror value.
82 llvm::DenseMap, unsigned>
81 DenseMap, unsigned>
8382 SwiftErrorVRegUpwardsUse;
8483
8584 /// The swifterror argument of the current function.
8685 const Value *SwiftErrorArg;
8786
88 typedef SmallVector SwiftErrorValues;
87 using SwiftErrorValues = SmallVector;
8988 /// A function can only have a single swifterror argument. And if it does
9089 /// have a swifterror argument, it must be the first entry in
9190 /// SwiftErrorVals.
9291 SwiftErrorValues SwiftErrorVals;
93
9492
9593 /// Get or create the swifterror value virtual register in
9694 /// SwiftErrorVRegDefMap for this basic block.
117115 /// slot), and we track that here.
118116
119117 struct StatepointSpillMap {
120 typedef DenseMap> SlotMapTy;
118 using SlotMapTy = DenseMap>;
121119
122120 /// Maps uniqued llvm IR values to the slots they were spilled in. If a
123121 /// value is mapped to None it means we visited the value but didn't spill
171169 struct LiveOutInfo {
172170 unsigned NumSignBits : 31;
173171 unsigned IsValid : 1;
174 KnownBits Known;
175 LiveOutInfo() : NumSignBits(0), IsValid(true), Known(1) {}
172 KnownBits Known = 1;
173
174 LiveOutInfo() : NumSignBits(0), IsValid(true) {}
176175 };
177176
178177 /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND)
297296
298297 } // end namespace llvm
299298
300 #endif
299 #endif // LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
None //===-- GCMetadata.h - Garbage collector metadata ---------------*- C++ -*-===//
0 //===- GCMetadata.h - Garbage collector metadata ----------------*- C++ -*-===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
3535 #include "llvm/ADT/DenseMap.h"
3636 #include "llvm/ADT/SmallVector.h"
3737 #include "llvm/ADT/StringMap.h"
38 #include "llvm/ADT/StringRef.h"
3839 #include "llvm/CodeGen/GCStrategy.h"
3940 #include "llvm/IR/DebugLoc.h"
4041 #include "llvm/Pass.h"
42 #include
43 #include
44 #include
4145 #include
42 #include <utility>
46 #include <vector>
4347
4448 namespace llvm {
45 class AsmPrinter;
49
4650 class Constant;
51 class Function;
4752 class MCSymbol;
4853
4954 /// GCPoint - Metadata for a collector-safe point in machine code.
6166 /// collector.
6267 struct GCRoot {
6368 int Num; ///< Usually a frame index.
64 int StackOffset; ///< Offset from the stack pointer.
69 int StackOffset = -1; ///< Offset from the stack pointer.
6570 const Constant *Metadata; ///< Metadata straight from the call
6671 ///< to llvm.gcroot.
6772
68 GCRoot(int N, const Constant *MD) : Num(N), StackOffset(-1), Metadata(MD) {}
73 GCRoot(int N, const Constant *MD) : Num(N), Metadata(MD) {}
6974 };
7075
7176 /// Garbage collection metadata for a single function. Currently, this
7277 /// information only applies to GCStrategies which use GCRoot.
7378 class GCFunctionInfo {
7479 public:
75 typedef std::vector::iterator iterator;
76 typedef std::vector::iterator roots_iterator;
77 typedef std::vector::const_iterator live_iterator;
80 using iterator = std::vector::iterator;
81 using roots_iterator = std::vector::iterator;
82 using live_iterator = std::vector::const_iterator;
7883
7984 private:
8085 const Function &F;
98103 ~GCFunctionInfo();
99104
100105 /// getFunction - Return the function to which this metadata applies.
101 ///
102106 const Function &getFunction() const { return F; }
103107
104108 /// getStrategy - Return the GC strategy for the function.
105 ///
106109 GCStrategy &getStrategy() { return S; }
107110
108111 /// addStackRoot - Registers a root that lives on the stack. Num is the
125128 }
126129
127130 /// getFrameSize/setFrameSize - Records the function's frame size.
128 ///
129131 uint64_t getFrameSize() const { return FrameSize; }
130132 void setFrameSize(uint64_t S) { FrameSize = S; }
131133
132134 /// begin/end - Iterators for safe points.
133 ///
134135 iterator begin() { return SafePoints.begin(); }
135136 iterator end() { return SafePoints.end(); }
136137 size_t size() const { return SafePoints.size(); }
137138
138139 /// roots_begin/roots_end - Iterators for all roots in the function.
139 ///
140140 roots_iterator roots_begin() { return Roots.begin(); }
141141 roots_iterator roots_end() { return Roots.end(); }
142142 size_t roots_size() const { return Roots.size(); }
143143
144144 /// live_begin/live_end - Iterators for live roots at a given safe point.
145 ///
146145 live_iterator live_begin(const iterator &p) { return roots_begin(); }
147146 live_iterator live_end(const iterator &p) { return roots_end(); }
148147 size_t live_size(const iterator &p) const { return roots_size(); }
165164
166165 /// List of per function info objects. In theory, Each of these
167166 /// may be associated with a different GC.
168 typedef std::vector> FuncInfoVec;
167 using FuncInfoVec = std::vector>;
169168
170169 FuncInfoVec::iterator funcinfo_begin() { return Functions.begin(); }
171170 FuncInfoVec::iterator funcinfo_end() { return Functions.end(); }
176175
177176 /// Non-owning map to bypass linear search when finding the GCFunctionInfo
178177 /// associated with a particular Function.
179 typedef DenseMap finfo_map_type;
178 using finfo_map_type = DenseMap;
180179 finfo_map_type FInfoMap;
181180
182181 public:
183 typedef SmallVector,1>::const_iterator iterator;
182 using iterator = SmallVector, 1>::const_iterator;
184183
185184 static char ID;
186185
201200 /// will soon change.
202201 GCFunctionInfo &getFunctionInfo(const Function &F);
203202 };
204 }
205
206 #endif
203
204 } // end namespace llvm
205
206 #endif // LLVM_CODEGEN_GCMETADATA_H
None //===-- llvm/CodeGen/GCMetadataPrinter.h - Prints asm GC tables -*- C++ -*-===//
0 //===- llvm/CodeGen/GCMetadataPrinter.h - Prints asm GC tables --*- C++ -*-===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1919 #ifndef LLVM_CODEGEN_GCMETADATAPRINTER_H
2020 #define LLVM_CODEGEN_GCMETADATAPRINTER_H
2121
22 #include "llvm/CodeGen/GCMetadata.h"
23 #include "llvm/CodeGen/GCStrategy.h"
2422 #include "llvm/Support/Registry.h"
2523
2624 namespace llvm {
2725
26 class AsmPrinter;
2827 class GCMetadataPrinter;
28 class GCModuleInfo;
29 class GCStrategy;
30 class Module;
2931
3032 /// GCMetadataPrinterRegistry - The GC assembly printer registry uses all the
3133 /// defaults from Registry.
32 typedef Registry GCMetadataPrinterRegistry;
34 using GCMetadataPrinterRegistry = Registry;
3335
3436 /// GCMetadataPrinter - Emits GC metadata as assembly code. Instances are
3537 /// created, managed, and owned by the AsmPrinter.
3638 class GCMetadataPrinter {
3739 private:
40 friend class AsmPrinter;
41
3842 GCStrategy *S;
39 friend class AsmPrinter;
4043
4144 protected:
4245 // May only be subclassed.
4346 GCMetadataPrinter();
4447
45 private:
48 public:
4649 GCMetadataPrinter(const GCMetadataPrinter &) = delete;
4750 GCMetadataPrinter &operator=(const GCMetadataPrinter &) = delete;
51 virtual ~GCMetadataPrinter();
4852
49 public:
5053 GCStrategy &getStrategy() { return *S; }
5154
5255 /// Called before the assembly for the module is generated by
5356 /// the AsmPrinter (but after target specific hooks.)
5457 virtual void beginAssembly(Module &M, GCModuleInfo &Info, AsmPrinter &AP) {}
58
5559 /// Called after the assembly for the module is generated by
5660 /// the AsmPrinter (but before target specific hooks)
5761 virtual void finishAssembly(Module &M, GCModuleInfo &Info, AsmPrinter &AP) {}
62 };
5863
59 virtual ~GCMetadataPrinter();
60 };
61 }
64 } // end namespace llvm
6265
63 #endif
66 #endif // LLVM_CODEGEN_GCMETADATAPRINTER_H
173173 /// Note that to use a custom GCMetadataPrinter w/gc.roots, you must also
174174 /// register your GCMetadataPrinter subclass with the
175175 /// GCMetadataPrinterRegistery as well.
176 typedef Registry GCRegistry;
176 using GCRegistry = Registry;
177177
178178 } // end namespace llvm
179179
3030 class MachineBasicBlock;
3131 class MachineFunction;
3232 class MachineInstr;
33 class MDNode;
3334
3435 //===----------------------------------------------------------------------===//
3536 /// InsnRange - This is used to track range of instructions with identical
3637 /// lexical scope.
3738 ///
38 typedef std::pair InsnRange;
39 using InsnRange = std::pair;
3940
4041 //===----------------------------------------------------------------------===//
4142 /// LexicalScope - This class is used to track scope information.
None //===-- llvm/CodeGen/RegAllocRegistry.h -------------------------*- C++ -*-===//
0 //===- llvm/CodeGen/RegAllocRegistry.h --------------------------*- C++ -*-===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1818
1919 namespace llvm {
2020
21 class FunctionPass;
22
2123 //===----------------------------------------------------------------------===//
2224 ///
2325 /// RegisterRegAlloc class - Track the registration of register allocators.
2426 ///
2527 //===----------------------------------------------------------------------===//
2628 class RegisterRegAlloc : public MachinePassRegistryNode {
27
2829 public:
29
30 typedef FunctionPass *(*FunctionPassCtor)();
30 using FunctionPassCtor = FunctionPass *(*)();
3131
3232 static MachinePassRegistry Registry;
3333
3535 : MachinePassRegistryNode(N, D, (MachinePassCtor)C) {
3636 Registry.Add(this);
3737 }
38
3839 ~RegisterRegAlloc() { Registry.Remove(this); }
3940
4041 // Accessors.
41 //
4242 RegisterRegAlloc *getNext() const {
4343 return (RegisterRegAlloc *)MachinePassRegistryNode::getNext();
4444 }
45
4546 static RegisterRegAlloc *getList() {
4647 return (RegisterRegAlloc *)Registry.getList();
4748 }
49
4850 static FunctionPassCtor getDefault() {
4951 return (FunctionPassCtor)Registry.getDefault();
5052 }
53
5154 static void setDefault(FunctionPassCtor C) {
5255 Registry.setDefault((MachinePassCtor)C);
5356 }
57
5458 static void setListener(MachinePassRegistryListener *L) {
5559 Registry.setListener(L);
5660 }
5862
5963 } // end namespace llvm
6064
61
62 #endif
65 #endif // LLVM_CODEGEN_REGALLOCREGISTRY_H
1818
1919 #include "llvm/ADT/SmallPtrSet.h"
2020 #include "llvm/ADT/Triple.h"
21 #include "llvm/IR/Dominators.h"
21 #include "llvm/IR/Instructions.h"
2222 #include "llvm/IR/ValueMap.h"
2323 #include "llvm/Pass.h"
24 #include "llvm/Target/TargetLowering.h"
2524
2625 namespace llvm {
2726
27 class BasicBlock;
28 class DominatorTree;
2829 class Function;
30 class Instruction;
2931 class Module;
30 class PHINode;
32 class TargetLoweringBase;
3133 class TargetMachine;
34 class Type;
3235
3336 class StackProtector : public FunctionPass {
3437 public:
4649 };
4750
4851 /// A mapping of AllocaInsts to their required SSP layout.
49 typedef ValueMap SSPLayoutMap;
52 using SSPLayoutMap = ValueMap;
5053
5154 private:
5255 const TargetMachine *TM = nullptr;
None //===-- llvm/CodeGen/TailDuplicator.h ---------------------------*- C++ -*-===//
0 //===- llvm/CodeGen/TailDuplicator.h ----------------------------*- C++ -*-===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1414 #ifndef LLVM_CODEGEN_TAILDUPLICATOR_H
1515 #define LLVM_CODEGEN_TAILDUPLICATOR_H
1616
17 #include "llvm/ADT/DenseMap.h"
18 #include "llvm/ADT/DenseSet.h"
19 #include "llvm/ADT/SetVector.h"
20 #include "llvm/ADT/SmallVector.h"
1721 #include "llvm/ADT/STLExtras.h"
18 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
19 #include "llvm/CodeGen/MachineModuleInfo.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 #include "llvm/CodeGen/MachineSSAUpdater.h"
2222 #include "llvm/CodeGen/RegisterScavenging.h"
23 #include "llvm/Support/CommandLine.h"
2324 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetRegisterInfo.h"
2525 #include "llvm/Target/TargetSubtargetInfo.h"
26 #include
27 #include
2628
2729 namespace llvm {
2830
29 extern cl::opt TailDupIndirectBranchSize;
31 class MachineBasicBlock;
32 class MachineBranchProbabilityInfo;
33 class MachineFunction;
34 class MachineInstr;
35 class MachineModuleInfo;
36 class MachineRegisterInfo;
37 class TargetRegisterInfo;
3038
3139 /// Utility class to perform tail duplication.
3240 class TailDuplicator {
4553
4654 // For each virtual register in SSAUpdateVals keep a list of source virtual
4755 // registers.
48 typedef std::vector> AvailableValsTy;
56 using AvailableValsTy = std::vector>;
4957
5058 DenseMap SSAUpdateVals;
5159
6169 void initMF(MachineFunction &MF,
6270 const MachineBranchProbabilityInfo *MBPI,
6371 bool LayoutMode, unsigned TailDupSize = 0);
72
6473 bool tailDuplicateBlocks();
6574 static bool isSimpleBB(MachineBasicBlock *TailBB);
6675 bool shouldTailDuplicate(bool IsSimple, MachineBasicBlock &TailBB);
76
6777 /// Returns true if TailBB can successfully be duplicated into PredBB
6878 bool canTailDuplicate(MachineBasicBlock *TailBB, MachineBasicBlock *PredBB);
79
6980 /// Tail duplicate a single basic block into its predecessors, and then clean
7081 /// up.
7182 /// If \p DuplicatePreds is not null, it will be updated to contain the list
7687 bool IsSimple, MachineBasicBlock *MBB,
7788 MachineBasicBlock *ForcedLayoutPred,
7889 SmallVectorImpl *DuplicatedPreds = nullptr,
79 llvm::function_ref *RemovalCallback = nullptr);
90 function_ref *RemovalCallback = nullptr);
8091
8192 private:
82 typedef TargetInstrInfo::RegSubRegPair RegSubRegPair;
93 using RegSubRegPair = TargetInstrInfo::RegSubRegPair;
8394
8495 void addSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
8596 MachineBasicBlock *BB);
111122
112123 void removeDeadBlock(
113124 MachineBasicBlock *MBB,
114 llvm::function_ref *RemovalCallback = nullptr);
125 function_ref *RemovalCallback = nullptr);
115126 };
116127
117 } // End llvm namespace
128 } // end namespace llvm
118129
119 #endif
130 #endif // LLVM_CODEGEN_TAILDUPLICATOR_H
1515 #ifndef LLVM_CODEGEN_TARGETSCHEDULE_H
1616 #define LLVM_CODEGEN_TARGETSCHEDULE_H
1717
18 #include "llvm/ADT/Optional.h"
1819 #include "llvm/ADT/SmallVector.h"
1920 #include "llvm/MC/MCInstrItineraries.h"
2021 #include "llvm/MC/MCSchedule.h"
122123 }
123124 #endif
124125
125 typedef const MCWriteProcResEntry *ProcResIter;
126 using ProcResIter = const MCWriteProcResEntry *;
126127
127128 // \brief Get an iterator into the processor resources consumed by this
128129 // scheduling class.
None //===-- OcamlGCPrinter.cpp - Ocaml frametable emitter ---------------------===//
0 //===- OcamlGCPrinter.cpp - Ocaml frametable emitter ----------------------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1111 //===----------------------------------------------------------------------===//
1212
1313 #include "llvm/ADT/SmallString.h"
14 #include "llvm/ADT/STLExtras.h"
15 #include "llvm/ADT/Twine.h"
1416 #include "llvm/CodeGen/AsmPrinter.h"
17 #include "llvm/CodeGen/GCMetadata.h"
1518 #include "llvm/CodeGen/GCMetadataPrinter.h"
1619 #include "llvm/CodeGen/GCs.h"
1720 #include "llvm/IR/DataLayout.h"
21 #include "llvm/IR/Function.h"
1822 #include "llvm/IR/Mangler.h"
1923 #include "llvm/IR/Module.h"
20 #include "llvm/MC/MCAsmInfo.h"
2124 #include "llvm/MC/MCContext.h"
25 #include "llvm/MC/MCDirectives.h"
2226 #include "llvm/MC/MCStreamer.h"
23 #include "llvm/MC/MCSymbol.h"
2427 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/FormattedStream.h"
2628 #include "llvm/Target/TargetLoweringObjectFile.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include "llvm/Target/TargetSubtargetInfo.h"
2929 #include
30 #include
31 #include
32 #include
33
3034 using namespace llvm;
3135
3236 namespace {
3640 void beginAssembly(Module &M, GCModuleInfo &Info, AsmPrinter &AP) override;
3741 void finishAssembly(Module &M, GCModuleInfo &Info, AsmPrinter &AP) override;
3842 };
39 }
43
44 } // end anonymous namespace
4045
4146 static GCMetadataPrinterRegistry::Add
4247 Y("ocaml", "ocaml 3.10-compatible collector");
4954 std::string SymName;
5055 SymName += "caml";
5156 size_t Letter = SymName.size();
52 SymName.append(MId.begin(), find(MId, '.'));
57 SymName.append(MId.begin(), llvm::find(MId, '.'));
5358 SymName += "__";
5459 SymName += Id;
5560
2222 //
2323 //===----------------------------------------------------------------------===//
2424
25 #define DEBUG_TYPE "packets"
26
2725 #include "llvm/CodeGen/DFAPacketizer.h"
26 #include "llvm/CodeGen/MachineFunction.h"
2827 #include "llvm/CodeGen/MachineInstr.h"
2928 #include "llvm/CodeGen/MachineInstrBundle.h"
29 #include "llvm/CodeGen/ScheduleDAG.h"
3030 #include "llvm/CodeGen/ScheduleDAGInstrs.h"
31 #include "llvm/MC/MCInstrDesc.h"
3132 #include "llvm/MC/MCInstrItineraries.h"
3233 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/raw_ostream.h"
3336 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetSubtargetInfo.h"
38 #include
39 #include
40 #include
41 #include
42 #include
3443
3544 using namespace llvm;
45
46 #define DEBUG_TYPE "packets"
3647
3748 static cl::opt InstrLimit("dfa-instr-limit", cl::Hidden,
3849 cl::init(0), cl::desc("If present, stops packetizing after N instructions"));
50
3951 static unsigned InstrCount = 0;
4052
4153 // --------------------------------------------------------------------
4254 // Definitions shared between DFAPacketizer.cpp and DFAPacketizerEmitter.cpp
4355
44 namespace {
45 DFAInput addDFAFuncUnits(DFAInput Inp, unsigned FuncUnits) {
46 return (Inp << DFA_MAX_RESOURCES) | FuncUnits;
47 }
48
49 /// Return the DFAInput for an instruction class input vector.
50 /// This function is used in both DFAPacketizer.cpp and in
51 /// DFAPacketizerEmitter.cpp.
52 DFAInput getDFAInsnInput(const std::vector &InsnClass) {
53 DFAInput InsnInput = 0;
54 assert((InsnClass.size() <= DFA_MAX_RESTERMS) &&
55 "Exceeded maximum number of DFA terms");
56 for (auto U : InsnClass)
57 InsnInput = addDFAFuncUnits(InsnInput, U);
58 return InsnInput;
59 }
60 }
56 static DFAInput addDFAFuncUnits(DFAInput Inp, unsigned FuncUnits) {
57 return (Inp << DFA_MAX_RESOURCES) | FuncUnits;
58 }
59
60 /// Return the DFAInput for an instruction class input vector.
61 /// This function is used in both DFAPacketizer.cpp and in
62 /// DFAPacketizerEmitter.cpp.
63 static DFAInput getDFAInsnInput(const std::vector &InsnClass) {
64 DFAInput InsnInput = 0;
65 assert((InsnClass.size() <= DFA_MAX_RESTERMS) &&
66 "Exceeded maximum number of DFA terms");
67 for (auto U : InsnClass)
68 InsnInput = addDFAFuncUnits(InsnInput, U);
69 return InsnInput;
70 }
71
6172 // --------------------------------------------------------------------
6273
6374 DFAPacketizer::DFAPacketizer(const InstrItineraryData *I,
6475 const DFAStateInput (*SIT)[2],
6576 const unsigned *SET):
66 InstrItins(I), CurrentState(0), DFAStateInputTable(SIT),
67 DFAStateEntryTable(SET) {
77 InstrItins(I), DFAStateInputTable(SIT), DFAStateEntryTable(SET) {
6878 // Make sure DFA types are large enough for the number of terms & resources.
6979 static_assert((DFA_MAX_RESTERMS * DFA_MAX_RESOURCES) <=
7080 (8 * sizeof(DFAInput)),
7484 "(DFA_MAX_RESTERMS * DFA_MAX_RESOURCES) too big for DFAStateInput");
7585 }
7686
77
7887 // Read the DFA transition table and update CachedTable.
7988 //
8089 // Format of the transition tables:
95104 CachedTable[UnsignPair(state, DFAStateInputTable[i][0])] =
96105 DFAStateInputTable[i][1];
97106 }
98
99107
100108 // Return the DFAInput for an instruction class.
101109 DFAInput DFAPacketizer::getInsnInput(unsigned InsnClass) {
111119 return InsnInput;
112120 }
113121
114
115122 // Return the DFAInput for an instruction class input vector.
116123 DFAInput DFAPacketizer::getInsnInput(const std::vector &InsnClass) {
117124 return getDFAInsnInput(InsnClass);
118125 }
119126
120
121127 // Check if the resources occupied by a MCInstrDesc are available in the
122128 // current state.
123 bool DFAPacketizer::canReserveResources(const llvm::MCInstrDesc *MID) {
129 bool DFAPacketizer::canReserveResources(const MCInstrDesc *MID) {
124130 unsigned InsnClass = MID->getSchedClass();
125131 DFAInput InsnInput = getInsnInput(InsnClass);
126132 UnsignPair StateTrans = UnsignPair(CurrentState, InsnInput);
128134 return CachedTable.count(StateTrans) != 0;
129135 }
130136
131
132137 // Reserve the resources occupied by a MCInstrDesc and change the current
133138 // state to reflect that change.
134 void DFAPacketizer::reserveResources(const llvm::MCInstrDesc *MID) {
139 void DFAPacketizer::reserveResources(const MCInstrDesc *MID) {
135140 unsigned InsnClass = MID->getSchedClass();
136141 DFAInput InsnInput = getInsnInput(InsnClass);
137142 UnsignPair StateTrans = UnsignPair(CurrentState, InsnInput);
140145 CurrentState = CachedTable[StateTrans];
141146 }
142147
143
144148 // Check if the resources occupied by a machine instruction are available
145149 // in the current state.
146 bool DFAPacketizer::canReserveResources(llvm::MachineInstr &MI) {
147 const llvm::MCInstrDesc &MID = MI.getDesc();
150 bool DFAPacketizer::canReserveResources(MachineInstr &MI) {
151 const MCInstrDesc &MID = MI.getDesc();
148152 return canReserveResources(&MID);
149153 }
150
151154
152155 // Reserve the resources occupied by a machine instruction and change the
153156 // current state to reflect that change.
154 void DFAPacketizer::reserveResources(llvm::MachineInstr &MI) {
155 const llvm::MCInstrDesc &MID = MI.getDesc();
157 void DFAPacketizer::reserveResources(MachineInstr &MI) {
158 const MCInstrDesc &MID = MI.getDesc();
156159 reserveResources(&MID);
157160 }
158161
159
160162 namespace llvm {
163
161164 // This class extends ScheduleDAGInstrs and overrides the schedule method
162165 // to build the dependence graph.
163166 class DefaultVLIWScheduler : public ScheduleDAGInstrs {
165168 AliasAnalysis *AA;
166169 /// Ordered list of DAG postprocessing steps.
167170 std::vector> Mutations;
171
168172 public:
169173 DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
170174 AliasAnalysis *AA);
175
171176 // Actual scheduling work.
172177 void schedule() override;
173178
175180 void addMutation(std::unique_ptr Mutation) {
176181 Mutations.push_back(std::move(Mutation));
177182 }
183
178184 protected:
179185 void postprocessDAG();
180186 };
181 }
182
187
188 } // end namespace llvm
183189
184190 DefaultVLIWScheduler::DefaultVLIWScheduler(MachineFunction &MF,
185191 MachineLoopInfo &MLI,
188194 CanHandleTerminators = true;
189195 }
190196
191
192197 /// Apply each ScheduleDAGMutation step in order.
193198 void DefaultVLIWScheduler::postprocessDAG() {
194199 for (auto &M : Mutations)
195200 M->apply(this);
196201 }
197202
198
199203 void DefaultVLIWScheduler::schedule() {
200204 // Build the scheduling graph.
201205 buildSchedGraph(AA);
202206 postprocessDAG();
203207 }
204
205208
206209 VLIWPacketizerList::VLIWPacketizerList(MachineFunction &mf,
207210 MachineLoopInfo &mli, AliasAnalysis *aa)
210213 VLIWScheduler = new DefaultVLIWScheduler(MF, mli, AA);
211214 }
212215
213
214216 VLIWPacketizerList::~VLIWPacketizerList() {
215217 delete VLIWScheduler;
216218 delete ResourceTracker;
217219 }
218
219220
220221 // End the current packet, bundle packet instructions and reset DFA state.
221222 void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB,
235236 ResourceTracker->clearResources();
236237 DEBUG(dbgs() << "End packet\n");
237238 }
238
239239
240240 // Bundle machine instructions into packets.
241241 void VLIWPacketizerList::PacketizeMIs(MachineBasicBlock *MBB,
335335 VLIWScheduler->finishBlock();
336336 }
337337
338
339338 // Add a DAG mutation object to the ordered list.
340339 void VLIWPacketizerList::addMutation(
341340 std::unique_ptr Mutation) {
1010 //
1111 //===----------------------------------------------------------------------===//
1212
13 #include "llvm/ADT/STLExtras.h"
1314 #include "llvm/CodeGen/GCMetadata.h"
1415 #include "llvm/CodeGen/GCStrategy.h"
15 #include "llvm/CodeGen/MachineFrameInfo.h"
1616 #include "llvm/CodeGen/Passes.h"
1717 #include "llvm/IR/Function.h"
1818 #include "llvm/MC/MCSymbol.h"
1919 #include "llvm/Pass.h"
20 #include "llvm/Support/Debug.h"
2120 #include "llvm/Support/ErrorHandling.h"
2221 #include "llvm/Support/raw_ostream.h"
22 #include
23 #include
24 #include
25 #include
26
2327 using namespace llvm;
2428
2529 namespace {
2630
2731 class Printer : public FunctionPass {
2832 static char ID;
33
2934 raw_ostream &OS;
3035
3136 public:
3742 bool runOnFunction(Function &F) override;
3843 bool doFinalization(Module &M) override;
3944 };
40 }
45
46 } // end anonymous namespace
4147
4248 INITIALIZE_PASS(GCModuleInfo, "collector-metadata",
4349 "Create Garbage Collector Module Metadata", false, false)
4753 GCFunctionInfo::GCFunctionInfo(const Function &F, GCStrategy &S)
4854 : F(F), S(S), FrameSize(~0LL) {}
4955
50 GCFunctionInfo::~GCFunctionInfo() {}
56 GCFunctionInfo::~GCFunctionInfo() = default;
5157
5258 // -----------------------------------------------------------------------------
5359
6672 return *I->second;
6773
6874 GCStrategy *S = getGCStrategy(F.getGC());
69 Functions.push_back(make_unique(F, *S));
75 Functions.push_back(llvm::make_unique(F, *S));
7076 GCFunctionInfo *GFI = Functions.back().get();
7177 FInfoMap[&F] = GFI;
7278 return *GFI;
None //===-- GCMetadataPrinter.cpp - Garbage collection infrastructure ---------===//
0 //===- GCMetadataPrinter.cpp - Garbage collection infrastructure ----------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1111 //===----------------------------------------------------------------------===//
1212
1313 #include "llvm/CodeGen/GCMetadataPrinter.h"
14
1415 using namespace llvm;
1516
1617 LLVM_INSTANTIATE_REGISTRY(GCMetadataPrinterRegistry)
1718
18 GCMetadataPrinter::GCMetadataPrinter() {}
19 GCMetadataPrinter::GCMetadataPrinter() = default;
1920
20 GCMetadataPrinter::~GCMetadataPrinter() {}
21 GCMetadataPrinter::~GCMetadataPrinter() = default;
None //===-- SelectionDAGISel.cpp - Implement the SelectionDAGISel class -------===//
0 //===- SelectionDAGISel.cpp - Implement the SelectionDAGISel class --------===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1010 //
1111 //===----------------------------------------------------------------------===//
1212
13 #include "llvm/CodeGen/SelectionDAGISel.h"
1413 #include "ScheduleDAGSDNodes.h"
1514 #include "SelectionDAGBuilder.h"
1615 #include "llvm/ADT/APInt.h"
3130 #include "llvm/CodeGen/FastISel.h"
3231 #include "llvm/CodeGen/FunctionLoweringInfo.h"
3332 #include "llvm/CodeGen/GCMetadata.h"
33 #include "llvm/CodeGen/ISDOpcodes.h"
3434 #include "llvm/CodeGen/MachineBasicBlock.h"
3535 #include "llvm/CodeGen/MachineFrameInfo.h"
3636 #include "llvm/CodeGen/MachineFunction.h"
3838 #include "llvm/CodeGen/MachineInstr.h"
3939 #include "llvm/CodeGen/MachineInstrBuilder.h"
4040 #include "llvm/CodeGen/MachineMemOperand.h"
41 #include "llvm/CodeGen/MachineModuleInfo.h"
4241 #include "llvm/CodeGen/MachineOperand.h"
4342 #include "llvm/CodeGen/MachinePassRegistry.h"
4443 #include "llvm/CodeGen/MachineRegisterInfo.h"
4544 #include "llvm/CodeGen/MachineValueType.h"
4645 #include "llvm/CodeGen/SchedulerRegistry.h"
4746 #include "llvm/CodeGen/SelectionDAG.h"
47 #include "llvm/CodeGen/SelectionDAGISel.h"
4848 #include "llvm/CodeGen/SelectionDAGNodes.h"
4949 #include "llvm/CodeGen/StackProtector.h"
5050 #include "llvm/CodeGen/ValueTypes.h"
5151 #include "llvm/IR/BasicBlock.h"
5252 #include "llvm/IR/Constants.h"
53 #include "llvm/IR/DataLayout.h"
5354 #include "llvm/IR/DebugInfoMetadata.h"
5455 #include "llvm/IR/DebugLoc.h"
5556 #include "llvm/IR/DiagnosticInfo.h"
57 #include "llvm/IR/Dominators.h"
5658 #include "llvm/IR/Function.h"
5759 #include "llvm/IR/InlineAsm.h"
5860 #include "llvm/IR/InstrTypes.h"
6365 #include "llvm/IR/Metadata.h"
6466 #include "llvm/IR/Type.h"
6567 #include "llvm/IR/User.h"
68 #include "llvm/IR/Value.h"
6669 #include "llvm/MC/MCInstrDesc.h"
6770 #include "llvm/MC/MCRegisterInfo.h"
6871 #include "llvm/Pass.h"
8891 #include
8992 #include
9093 #include
94 #include
9195 #include
9296 #include
9397 #include
765769
766770 DEBUG(dbgs() << "Optimized type-legalized selection DAG: BB#" << BlockNumber
767771 << " '" << BlockName << "'\n"; CurDAG->dump());
768
769772 }
770773
771774 {
11361139 // Check if the variable is a static alloca or a byval or inalloca
11371140 // argument passed in memory. If it is not, then we will ignore this
11381141 // intrinsic and handle this during isel like dbg.value.
1139 int FI = INT_MAX;
1142 int FI = std::numeric_limits::max();
11401143 if (const auto *AI = dyn_cast(Address)) {
11411144 auto SI = FuncInfo->StaticAllocaMap.find(AI);
11421145 if (SI != FuncInfo->StaticAllocaMap.end())
11441147 } else if (const auto *Arg = dyn_cast(Address))
11451148 FI = FuncInfo->getArgumentFrameIndex(Arg);
11461149
1147 if (FI == INT_MAX)
1150 if (FI == std::numeric_limits::max())
11481151 continue;
11491152
11501153 DIExpression *Expr = DI->getExpression();
1313 //
1414 //===----------------------------------------------------------------------===//
1515
16 #include "llvm/CodeGen/StackProtector.h"
1716 #include "llvm/ADT/SmallPtrSet.h"
1817 #include "llvm/ADT/Statistic.h"
1918 #include "llvm/Analysis/BranchProbabilityInfo.h"
2019 #include "llvm/Analysis/EHPersonalities.h"
2120 #include "llvm/Analysis/OptimizationDiagnosticInfo.h"
2221 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/CodeGen/StackProtector.h"
2323 #include "llvm/CodeGen/TargetPassConfig.h"
2424 #include "llvm/IR/Attributes.h"
2525 #include "llvm/IR/BasicBlock.h"
2828 #include "llvm/IR/DebugInfo.h"
2929 #include "llvm/IR/DebugLoc.h"
3030 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Dominators.h"
3132 #include "llvm/IR/Function.h"
3233 #include "llvm/IR/IRBuilder.h"
3334 #include "llvm/IR/Instruction.h"
5859 cl::init(true), cl::Hidden);
5960
6061 char StackProtector::ID = 0;
62
6163 INITIALIZE_PASS_BEGIN(StackProtector, DEBUG_TYPE,
6264 "Insert stack protectors", false, true)
6365 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
None //===-- TailDuplication.cpp - Duplicate blocks into predecessors' tails ---===//
0 //===- TailDuplication.cpp - Duplicate blocks into predecessors' tails ----===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1111 //
1212 //===----------------------------------------------------------------------===//
1313
14 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
15 #include "llvm/CodeGen/MachineFunction.h"
1416 #include "llvm/CodeGen/MachineFunctionPass.h"
15 #include "llvm/CodeGen/Passes.h"
1617 #include "llvm/CodeGen/TailDuplicator.h"
17 #include "llvm/IR/Function.h"
18 #include "llvm/Support/Debug.h"
18 #include "llvm/Pass.h"
19
1920 using namespace llvm;
2021
2122 #define DEBUG_TYPE "tailduplication"
2223
2324 namespace {
25
2426 /// Perform tail duplication. Delegates to TailDuplicator
2527 class TailDuplicatePass : public MachineFunctionPass {
2628 TailDuplicator Duplicator;
2729
2830 public:
2931 static char ID;
32
3033 explicit TailDuplicatePass() : MachineFunctionPass(ID) {}
3134
3235 bool runOnMachineFunction(MachineFunction &MF) override;
3437 void getAnalysisUsage(AnalysisUsage &AU) const override;
3538 };
3639
40 } // end anonymous namespace
41
3742 char TailDuplicatePass::ID = 0;
38 }
3943
4044 char &llvm::TailDuplicateID = TailDuplicatePass::ID;
4145
None //===-- TailDuplicator.cpp - Duplicate blocks into predecessors' tails ---===//
0 //===- TailDuplicator.cpp - Duplicate blocks into predecessors' tails -----===//
11 //
22 // The LLVM Compiler Infrastructure
33 //
1111 //
1212 //===----------------------------------------------------------------------===//
1313
14 #include "llvm/CodeGen/TailDuplicator.h"
14 #include "llvm/ADT/DenseMap.h"
1515 #include "llvm/ADT/DenseSet.h"
1616 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallSet.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallVector.h"
1819 #include "llvm/ADT/Statistic.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/CodeGen/MachineBasicBlock.h"
1922 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstr.h"
2125 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineLoopInfo.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/CodeGen/Passes.h"
26 #include "llvm/CodeGen/MachineOperand.h"
27 #include "llvm/CodeGen/MachineRegisterInfo.h"
28 #include "llvm/CodeGen/MachineSSAUpdater.h"
29 #include "llvm/CodeGen/TailDuplicator.h"
30 #include "llvm/IR/DebugLoc.h"
2531 #include "llvm/IR/Function.h"
2632 #include "llvm/Support/CommandLine.h"
2733 #include "llvm/Support/Debug.h"
2834 #include "llvm/Support/ErrorHandling.h"
2935 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetRegisterInfo.h"
38 #include "llvm/Target/TargetSubtargetInfo.h"
39 #include
40 #include
41 #include
42 #include
43
3044 using namespace llvm;
3145
3246 #define DEBUG_TYPE "tailduplication"
4054 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
4155 STATISTIC(NumAddedPHIs, "Number of phis added");
4256
43 namespace llvm {
44
4557 // Heuristic for tail duplication.
4658 static cl::opt TailDuplicateSize(
4759 "tail-dup-size",
4860 cl::desc("Maximum instructions to consider tail duplicating"), cl::init(2),
4961 cl::Hidden);
5062
51 cl::opt TailDupIndirectBranchSize(
63 static cl::opt TailDupIndirectBranchSize(
5264 "tail-dup-indirect-size",
5365 cl::desc("Maximum instructions to consider tail duplicating blocks that "
5466 "end with indirect branches."), cl::init(20),
137149 bool IsSimple, MachineBasicBlock *MBB,
138150 MachineBasicBlock *ForcedLayoutPred,
139151 SmallVectorImpl *DuplicatedPreds,
140 llvm::function_ref *RemovalCallback) {
152 function_ref *RemovalCallback) {
141153 // Save the successors list.
142154 SmallSetVector Succs(MBB->succ_begin(),
143155 MBB->succ_end());
970982 /// the CFG.
971983 void TailDuplicator::removeDeadBlock(
972984 MachineBasicBlock *MBB,
973 llvm::function_ref *RemovalCallback) {
985 function_ref *RemovalCallback) {
974986 assert(MBB->pred_empty() && "MBB must be dead!");
975987 DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
976988
984996 // Remove the block.
985997 MBB->eraseFromParent();
986998 }
987
988 } // End llvm namespace