llvm.org GIT mirror llvm / 62bc4f0
[ARM][GlobalISel] Support for G_ANYEXT G_ANYEXT can be introduced by the legalizer when widening scalars. Add support for it in the register bank info (same mapping as everything else) and in the instruction selector. When selecting it, we treat it as a COPY, just like G_TRUNC. On this occasion we get rid of some assertions in selectCopy so we can reuse it. This shouldn't be a problem at the moment since we're not supporting any complicated cases (e.g. FPR, different register banks). We might want to separate the paths when we do. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302778 91177308-0d34-0410-b5e6-96231b3b80d8 Diana Picus 3 years ago
4 changed file(s) with 103 addition(s) and 10 deletion(s). Raw diff Collapse all Expand all
100100 assert(RegBank && "Can't get reg bank for virtual register");
101101
102102 const unsigned DstSize = MRI.getType(DstReg).getSizeInBits();
103 (void)DstSize;
104 unsigned SrcReg = I.getOperand(1).getReg();
105 const unsigned SrcSize = RBI.getSizeInBits(SrcReg, MRI, TRI);
106 (void)SrcSize;
107 // We use copies for trunc, so it's ok for the size of the destination to be
108 // smaller (the higher bits will just be undefined).
109 assert(DstSize <= SrcSize && "Copy with different width?!");
110
111103 assert((RegBank->getID() == ARM::GPRRegBankID ||
112104 RegBank->getID() == ARM::FPRRegBankID) &&
113105 "Unsupported reg bank");
329321 }
330322 break;
331323 }
324 case G_ANYEXT:
332325 case G_TRUNC: {
333326 // The high bits are undefined, so there's nothing special to do, just
334327 // treat it as a copy.
339332 const auto &DstRegBank = *RBI.getRegBank(DstReg, MRI, TRI);
340333
341334 if (SrcRegBank.getID() != DstRegBank.getID()) {
342 DEBUG(dbgs() << "G_TRUNC operands on different register banks\n");
335 DEBUG(dbgs() << "G_TRUNC/G_ANYEXT operands on different register banks\n");
343336 return false;
344337 }
345338
346339 if (SrcRegBank.getID() != ARM::GPRRegBankID) {
347 DEBUG(dbgs() << "G_TRUNC on non-GPR not supported yet\n");
340 DEBUG(dbgs() << "G_TRUNC/G_ANYEXT on non-GPR not supported yet\n");
348341 return false;
349342 }
350343
224224 case G_UDIV:
225225 case G_SEXT:
226226 case G_ZEXT:
227 case G_ANYEXT:
227228 case G_TRUNC:
228229 case G_GEP:
229230 // FIXME: We're abusing the fact that everything lives in a GPR for now; in
33 define void @test_sext_s1() { ret void }
44 define void @test_sext_s8() { ret void }
55 define void @test_zext_s16() { ret void }
6 define void @test_anyext_s8() { ret void }
7 define void @test_anyext_s16() { ret void }
68
79 define void @test_trunc_s32_16() { ret void }
810
140142
141143 %1(s32) = G_ZEXT %0(s16)
142144 ; CHECK: [[VREGEXT:%[0-9]+]] = UXTH [[VREGX]], 0, 14, _
145
146 %r0 = COPY %1(s32)
147 ; CHECK: %r0 = COPY [[VREGEXT]]
148
149 BX_RET 14, _, implicit %r0
150 ; CHECK: BX_RET 14, _, implicit %r0
151 ...
152 ---
153 name: test_anyext_s8
154 # CHECK-LABEL: name: test_anyext_s8
155 legalized: true
156 regBankSelected: true
157 selected: false
158 # CHECK: selected: true
159 registers:
160 - { id: 0, class: gprb }
161 - { id: 1, class: gprb }
162 body: |
163 bb.0:
164 liveins: %r0
165
166 %0(s8) = COPY %r0
167 ; CHECK: [[VREGX:%[0-9]+]] = COPY %r0
168
169 %1(s32) = G_ANYEXT %0(s8)
170 ; CHECK: [[VREGEXT:%[0-9]+]] = COPY [[VREGX]]
171
172 %r0 = COPY %1(s32)
173 ; CHECK: %r0 = COPY [[VREGEXT]]
174
175 BX_RET 14, _, implicit %r0
176 ; CHECK: BX_RET 14, _, implicit %r0
177 ...
178 ---
179 name: test_anyext_s16
180 # CHECK-LABEL: name: test_anyext_s16
181 legalized: true
182 regBankSelected: true
183 selected: false
184 # CHECK: selected: true
185 registers:
186 - { id: 0, class: gprb }
187 - { id: 1, class: gprb }
188 body: |
189 bb.0:
190 liveins: %r0
191
192 %0(s16) = COPY %r0
193 ; CHECK: [[VREGX:%[0-9]+]] = COPY %r0
194
195 %1(s32) = G_ANYEXT %0(s16)
196 ; CHECK: [[VREGEXT:%[0-9]+]] = COPY [[VREGX]]
143197
144198 %r0 = COPY %1(s32)
145199 ; CHECK: %r0 = COPY [[VREGEXT]]
2323 define void @test_gep() { ret void }
2424
2525 define void @test_constants() { ret void }
26
27 define void @test_anyext_s8_32() { ret void }
28 define void @test_anyext_s16_32() { ret void }
2629
2730 define void @test_trunc_s32_16() { ret void }
2831
499502 BX_RET 14, _, implicit %r0
500503 ...
501504 ---
505 name: test_anyext_s8_32
506 # CHECK-LABEL: name: test_anyext_s8_32
507 legalized: true
508 regBankSelected: false
509 selected: false
510 # CHECK: registers:
511 # CHECK: - { id: 0, class: gprb }
512 # CHECK: - { id: 1, class: gprb }
513 registers:
514 - { id: 0, class: _ }
515 - { id: 1, class: _ }
516 body: |
517 bb.0:
518 liveins: %r0
519
520 %0(s8) = COPY %r0
521 %1(s32) = G_ANYEXT %0(s8)
522 %r0 = COPY %1(s32)
523 BX_RET 14, _, implicit %r0
524 ...
525 ---
526 name: test_anyext_s16_32
527 # CHECK-LABEL: name: test_anyext_s16_32
528 legalized: true
529 regBankSelected: false
530 selected: false
531 # CHECK: registers:
532 # CHECK: - { id: 0, class: gprb }
533 # CHECK: - { id: 1, class: gprb }
534 registers:
535 - { id: 0, class: _ }
536 - { id: 1, class: _ }
537 body: |
538 bb.0:
539 liveins: %r0
540
541 %0(s16) = COPY %r0
542 %1(s32) = G_ANYEXT %0(s16)
543 %r0 = COPY %1(s32)
544 BX_RET 14, _, implicit %r0
545 ...
546 ---
502547 name: test_trunc_s32_16
503548 # CHECK-LABEL: name: test_trunc_s32_16
504549 legalized: true