llvm.org GIT mirror llvm / 62819f3
Support to provide exception and selector registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8 Jim Laskey 12 years ago
19 changed file(s) with 138 addition(s) and 5 deletion(s). Raw diff Collapse all Expand all
468468 /// getRARegister - This method should return the register where the return
469469 /// address can be found.
470470 virtual unsigned getRARegister() const = 0;
471
471
472 /// getEHExceptionRegister - This method should return the register containing
473 /// the address of the exception info on entry to a landing pad.
474 virtual unsigned getEHExceptionRegister() const = 0;
475
476 /// getEHHandlerRegister - This method should return the register containing
477 /// the switch table selection on entry to an landing pad.
478 virtual unsigned getEHHandlerRegister() const = 0;
479
472480 /// getLocation - This method should return the actual location of a frame
473481 /// variable given the frame index. The location is returned in ML.
474482 /// Subclasses should override this method for special handling of frame
11891189 return LowerFORMAL_ARGUMENTS(Op, DAG);
11901190 case ISD::RETURNADDR: break;
11911191 case ISD::FRAMEADDR: break;
1192 // Exception address and exception selector. Currently unimplemented.
1193 case ISD::EXCEPTIONADDR: break;
1194 case ISD::EHSELECTION: break;
11921195 }
11931196 return SDOperand();
11941197 }
12861286 return STI.useThumbBacktraces() ? ARM::R7 : ARM::R11;
12871287 }
12881288
1289 unsigned ARMRegisterInfo::getEHExceptionRegister() const {
1290 assert(0 && "What is the exception register");
1291 return 0;
1292 }
1293
1294 unsigned ARMRegisterInfo::getEHHandlerRegister() const {
1295 assert(0 && "What is the exception handler register");
1296 return 0;
1297 }
1298
12891299 #include "ARMGenRegisterInfo.inc"
12901300
8484 // Debug information queries.
8585 unsigned getRARegister() const;
8686 unsigned getFrameRegister(MachineFunction &MF) const;
87
88 // Exception handling queries.
89 unsigned getEHExceptionRegister() const;
90 unsigned getEHHandlerRegister() const;
8791 };
8892
8993 } // end namespace llvm
547547 return DAG.getNode(AlphaISD::GlobalRetAddr, MVT::i64);
548548 //FIXME: implement
549549 case ISD::FRAMEADDR: break;
550 }
551
550 // Exception address and exception selector. Currently unimplemented.
551 case ISD::EXCEPTIONADDR: break;
552 case ISD::EHSELECTION: break;
553 }
554
552555 return SDOperand();
553556 }
554557
398398 return hasFP(MF) ? Alpha::R15 : Alpha::R30;
399399 }
400400
401 unsigned AlphaRegisterInfo::getEHExceptionRegister() const {
402 assert(0 && "What is the exception register");
403 return 0;
404 }
405
406 unsigned AlphaRegisterInfo::getEHHandlerRegister() const {
407 assert(0 && "What is the exception handler register");
408 return 0;
409 }
410
401411 #include "AlphaGenRegisterInfo.inc"
402412
403413 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
6767 unsigned getRARegister() const;
6868 unsigned getFrameRegister(MachineFunction &MF) const;
6969
70 // Exception handling queries.
71 unsigned getEHExceptionRegister() const;
72 unsigned getEHHandlerRegister() const;
73
7074 static std::string getPrettyName(unsigned reg);
7175 };
7276
589589 // Frame & Return address. Currently unimplemented
590590 case ISD::RETURNADDR: break;
591591 case ISD::FRAMEADDR: break;
592 // Exception address and exception selector. Currently unimplemented.
593 case ISD::EXCEPTIONADDR: break;
594 case ISD::EHSELECTION: break;
592595 }
593596 return SDOperand();
594597 }
359359 return hasFP(MF) ? IA64::r5 : IA64::r12;
360360 }
361361
362 unsigned IA64RegisterInfo::getEHExceptionRegister() const {
363 assert(0 && "What is the exception register");
364 return 0;
365 }
366
367 unsigned IA64RegisterInfo::getEHHandlerRegister() const {
368 assert(0 && "What is the exception handler register");
369 return 0;
370 }
371
362372 #include "IA64GenRegisterInfo.inc"
363373
6363 // Debug information queries.
6464 unsigned getRARegister() const;
6565 unsigned getFrameRegister(MachineFunction &MF) const;
66
67 // Exception handling queries.
68 unsigned getEHExceptionRegister() const;
69 unsigned getEHHandlerRegister() const;
6670 };
6771
6872 } // End llvm namespace
26092609 }
26102610 }
26112611
2612 /// LowerEXCEPTIONADDR - Replace EXCEPTIONADDR with a copy from the exception
2613 /// register. The register was made live in the ISel.
2614 static SDOperand LowerEXCEPTIONADDR(SDOperand Op, SelectionDAG &DAG) {
2615 const MRegisterInfo *MRI = DAG.getTargetLoweringInfo().
2616 getTargetMachine().
2617 getRegisterInfo();
2618 MVT::ValueType VT = Op.Val->getValueType(0);
2619 unsigned Reg = MRI->getEHExceptionRegister();
2620 SDOperand Result = DAG.getCopyFromReg(Op.getOperand(0), Reg, VT);
2621 return Result.getValue(Op.ResNo);
2622 }
2623
2624 /// LowerEXCEPTIONADDR - Replace EHSELECTION with a copy from the exception
2625 /// selection register. The register was made live in the ISel.
2626 static SDOperand LowerEHSELECTION(SDOperand Op, SelectionDAG &DAG) {
2627 const MRegisterInfo *MRI = DAG.getTargetLoweringInfo().
2628 getTargetMachine().
2629 getRegisterInfo();
2630 MVT::ValueType VT = Op.Val->getValueType(0);
2631 unsigned Reg = MRI->getEHHandlerRegister();
2632 SDOperand Result = DAG.getCopyFromReg(Op.getOperand(1), Reg, VT);
2633 return Result.getValue(Op.ResNo);
2634 }
2635
26122636 /// LowerOperation - Provide custom lowering hooks for some operations.
26132637 ///
26142638 SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
26462670 // Frame & Return address. Currently unimplemented
26472671 case ISD::RETURNADDR: break;
26482672 case ISD::FRAMEADDR: break;
2673
2674 // Exception address and exception selector.
2675 case ISD::EXCEPTIONADDR: return LowerEXCEPTIONADDR(Op, DAG);
2676 case ISD::EHSELECTION: return LowerEHSELECTION(Op, DAG);
26492677 }
26502678 return SDOperand();
26512679 }
10211021
10221022 unsigned PPCRegisterInfo::getRARegister() const {
10231023 return !Subtarget.isPPC64() ? PPC::LR : PPC::LR8;
1024
10251024 }
10261025
10271026 unsigned PPCRegisterInfo::getFrameRegister(MachineFunction &MF) const {
10391038 Moves.push_back(MachineMove(0, Dst, Src));
10401039 }
10411040
1041 unsigned PPCRegisterInfo::getEHExceptionRegister() const {
1042 return !Subtarget.isPPC64() ? PPC::R3 : PPC::X3;
1043 }
1044
1045 unsigned PPCRegisterInfo::getEHHandlerRegister() const {
1046 return !Subtarget.isPPC64() ? PPC::R4 : PPC::X4;
1047 }
1048
10421049 #include "PPCGenRegisterInfo.inc"
10431050
8888 unsigned getRARegister() const;
8989 unsigned getFrameRegister(MachineFunction &MF) const;
9090 void getInitialFrameState(std::vector &Moves) const;
91
92 // Exception handling queries.
93 unsigned getEHExceptionRegister() const;
94 unsigned getEHHandlerRegister() const;
9195 };
9296
9397 } // end namespace llvm
870870 // Frame & Return address. Currently unimplemented
871871 case ISD::RETURNADDR: break;
872872 case ISD::FRAMEADDR: break;
873 // Exception address and exception selector. Currently unimplemented.
874 case ISD::EXCEPTIONADDR: break;
875 case ISD::EHSELECTION: break;
873876 }
874877 return SDOperand();
875878 }
249249 return SP::G1;
250250 }
251251
252 unsigned SparcRegisterInfo::getEHExceptionRegister() const {
253 assert(0 && "What is the exception register");
254 return 0;
255 }
256
257 unsigned SparcRegisterInfo::getEHHandlerRegister() const {
258 assert(0 && "What is the exception handler register");
259 return 0;
260 }
261
252262 #include "SparcGenRegisterInfo.inc"
253263
6969 // Debug information queries.
7070 unsigned getRARegister() const;
7171 unsigned getFrameRegister(MachineFunction &MF) const;
72
73 // Exception handling queries.
74 unsigned getEHExceptionRegister() const;
75 unsigned getEHHandlerRegister() const;
7276 };
7377
7478 } // end namespace llvm
46744674 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
46754675 case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG);
46764676 case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG);
4677 }
4677 // Exception address and exception selector. Currently unimplemented.
4678 case ISD::EXCEPTIONADDR: break;
4679 case ISD::EHSELECTION: break;
4680 }
4681 return SDOperand();
46784682 }
46794683
46804684 const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
11921192 Moves.push_back(MachineMove(0, Dst, Src));
11931193 }
11941194
1195 unsigned X86RegisterInfo::getEHExceptionRegister() const {
1196 assert(0 && "What is the exception register");
1197 return 0;
1198 }
1199
1200 unsigned X86RegisterInfo::getEHHandlerRegister() const {
1201 assert(0 && "What is the exception handler register");
1202 return 0;
1203 }
1204
11951205 namespace llvm {
11961206 unsigned getX86SubSuperRegister(unsigned Reg, MVT::ValueType VT, bool High) {
11971207 switch (VT) {
100100 unsigned getRARegister() const;
101101 unsigned getFrameRegister(MachineFunction &MF) const;
102102 void getInitialFrameState(std::vector &Moves) const;
103
104 // Exception handling queries.
105 unsigned getEHExceptionRegister() const;
106 unsigned getEHHandlerRegister() const;
103107 };
104108
105109 // getX86SubSuperRegister - X86 utility function. It returns the sub or super