llvm.org GIT mirror llvm / 61f8483
[arm] Implement ARM .arch directive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197052 91177308-0d34-0410-b5e6-96231b3b80d8 Logan Chien 6 years ago
27 changed file(s) with 886 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
9292 virtual void emitAttribute(unsigned Attribute, unsigned Value) = 0;
9393 virtual void emitTextAttribute(unsigned Attribute, StringRef String) = 0;
9494 virtual void emitFPU(unsigned FPU) = 0;
95 virtual void emitArch(unsigned Arch) = 0;
9596 virtual void finishAttributeSection() = 0;
9697 };
9798
1111 #include "ARMFeatures.h"
1212 #include "llvm/MC/MCTargetAsmParser.h"
1313 #include "MCTargetDesc/ARMAddressingModes.h"
14 #include "MCTargetDesc/ARMArchName.h"
1415 #include "MCTargetDesc/ARMBaseInfo.h"
1516 #include "MCTargetDesc/ARMMCExpr.h"
1617 #include "llvm/ADT/BitVector.h"
80058006 /// parseDirectiveArch
80068007 /// ::= .arch token
80078008 bool ARMAsmParser::parseDirectiveArch(SMLoc L) {
8008 return true;
8009 StringRef Arch = getParser().parseStringToEndOfStatement().trim();
8010
8011 unsigned ID = StringSwitch(Arch)
8012 #define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
8013 .Case(NAME, ARM::ID)
8014 #include "MCTargetDesc/ARMArchName.def"
8015 .Default(ARM::INVALID_ARCH);
8016
8017 if (ID == ARM::INVALID_ARCH)
8018 return Error(L, "Unknown arch name");
8019
8020 getTargetStreamer().emitArch(ID);
8021 return false;
80098022 }
80108023
80118024 /// parseDirectiveEabiAttr
0 //===-- ARMArchName.def - List of the ARM arch names ------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the list of the supported ARM architecture names,
10 // i.e. the supported value for -march= option.
11 //
12 //===----------------------------------------------------------------------===//
13
14 // NOTE: NO INCLUDE GUARD DESIRED!
15
16 #ifndef ARM_ARCH_NAME
17 #error "You must define ARM_ARCH_NAME before including ARMArchName.def"
18 #endif
19
20 // ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH)
21 ARM_ARCH_NAME("armv2", ARMV2, "2", v4)
22 ARM_ARCH_NAME("armv2a", ARMV2A, "2A", v4)
23 ARM_ARCH_NAME("armv3", ARMV3, "3", v4)
24 ARM_ARCH_NAME("armv3m", ARMV3M, "3M", v4)
25 ARM_ARCH_NAME("armv4", ARMV4, "4", v4)
26 ARM_ARCH_NAME("armv4t", ARMV4T, "4T", v4T)
27 ARM_ARCH_NAME("armv5", ARMV5, "5", v5T)
28 ARM_ARCH_NAME("armv5t", ARMV5T, "5T", v5T)
29 ARM_ARCH_NAME("armv5te", ARMV5TE, "5TE", v5TE)
30 ARM_ARCH_NAME("armv6", ARMV6, "6", v6)
31 ARM_ARCH_NAME("armv6j", ARMV6J, "6J", v6)
32 ARM_ARCH_NAME("armv6t2", ARMV6T2, "6T2", v6T2)
33 ARM_ARCH_NAME("armv6z", ARMV6Z, "6Z", v6KZ)
34 ARM_ARCH_NAME("armv6zk", ARMV6ZK, "6ZK", v6KZ)
35 ARM_ARCH_NAME("armv6-m", ARMV6M, "6-M", v6_M)
36 ARM_ARCH_NAME("armv7", ARMV7, "7", v7)
37 ARM_ARCH_NAME("armv7-a", ARMV7A, "7-A", v7)
38 ARM_ARCH_NAME("armv7-r", ARMV7R, "7-R", v7)
39 ARM_ARCH_NAME("armv7-m", ARMV7M, "7-M", v7)
40 ARM_ARCH_NAME("armv8-a", ARMV8A, "8-A", v8)
41 ARM_ARCH_NAME("iwmmxt", IWMMXT, "iwmmxt", v5TE)
42 ARM_ARCH_NAME("iwmmxt2", IWMMXT2, "iwmmxt2", v5TE)
43
44 #undef ARM_ARCH_NAME
0 //===-- ARMArchName.h - List of the ARM arch names --------------*- C++ -*-===//
1 //
2 // The LLVM Compiler Infrastructure
3 //
4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details.
6 //
7 //===----------------------------------------------------------------------===//
8
9 #ifndef ARMARCHNAME_H
10 #define ARMARCHNAME_H
11
12 namespace llvm {
13 namespace ARM {
14
15 enum ArchKind {
16 INVALID_ARCH = 0
17
18 #define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) , ID
19 #include "ARMArchName.def"
20 };
21
22 } // namespace ARM
23 } // namespace llvm
24
25 #endif // ARMARCHNAME_H
1313 //===----------------------------------------------------------------------===//
1414
1515 #include "ARMBuildAttrs.h"
16 #include "ARMArchName.h"
1617 #include "ARMFPUName.h"
1718 #include "ARMRegisterInfo.h"
1819 #include "ARMUnwindOp.h"
6061 return NULL;
6162 }
6263
64 static const char *GetArchName(unsigned ID) {
65 switch (ID) {
66 default:
67 llvm_unreachable("Unknown ARCH kind");
68 break;
69 #define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
70 case ARM::ID: return NAME;
71 #include "ARMArchName.def"
72 }
73 return NULL;
74 }
75
76 static const char *GetArchDefaultCPUName(unsigned ID) {
77 switch (ID) {
78 default:
79 llvm_unreachable("Unknown ARCH kind");
80 break;
81 #define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
82 case ARM::ID: return DEFAULT_CPU_NAME;
83 #include "ARMArchName.def"
84 }
85 return NULL;
86 }
87
88 static unsigned GetArchDefaultCPUArch(unsigned ID) {
89 switch (ID) {
90 default:
91 llvm_unreachable("Unknown ARCH kind");
92 break;
93 #define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
94 case ARM::ID: return ARMBuildAttrs::DEFAULT_CPU_ARCH;
95 #include "ARMArchName.def"
96 }
97 return 0;
98 }
99
63100 namespace {
64101
65102 class ARMELFStreamer;
81118 virtual void switchVendor(StringRef Vendor);
82119 virtual void emitAttribute(unsigned Attribute, unsigned Value);
83120 virtual void emitTextAttribute(unsigned Attribute, StringRef String);
121 virtual void emitArch(unsigned Arch);
84122 virtual void emitFPU(unsigned FPU);
85123 virtual void finishAttributeSection();
86124
141179 OS << "\t.cpu\t" << String.lower() << "\n";
142180 break;
143181 }
182 }
183 void ARMTargetAsmStreamer::emitArch(unsigned Arch) {
184 OS << "\t.arch\t" << GetArchName(Arch) << "\n";
144185 }
145186 void ARMTargetAsmStreamer::emitFPU(unsigned FPU) {
146187 OS << "\t.fpu\t" << GetFPUName(FPU) << "\n";
170211
171212 StringRef CurrentVendor;
172213 unsigned FPU;
214 unsigned Arch;
173215 SmallVector Contents;
174216
175217 const MCSection *AttributeSection;
232274 Contents.push_back(Item);
233275 }
234276
277 void emitArchDefaultAttributes();
235278 void emitFPUDefaultAttributes();
236279
237280 ARMELFStreamer &getStreamer();
249292 virtual void switchVendor(StringRef Vendor);
250293 virtual void emitAttribute(unsigned Attribute, unsigned Value);
251294 virtual void emitTextAttribute(unsigned Attribute, StringRef String);
295 virtual void emitArch(unsigned Arch);
252296 virtual void emitFPU(unsigned FPU);
253297 virtual void finishAttributeSection();
254298
257301 public:
258302 ARMTargetELFStreamer()
259303 : ARMTargetStreamer(), CurrentVendor("aeabi"), FPU(ARM::INVALID_FPU),
260 AttributeSection(0) {
304 Arch(ARM::INVALID_ARCH), AttributeSection(0) {
261305 }
262306 };
263307
489533 void ARMTargetELFStreamer::emitTextAttribute(unsigned Attribute,
490534 StringRef Value) {
491535 setAttributeItem(Attribute, Value, /* OverwriteExisting= */ true);
536 }
537 void ARMTargetELFStreamer::emitArch(unsigned Value) {
538 Arch = Value;
539 }
540 void ARMTargetELFStreamer::emitArchDefaultAttributes() {
541 using namespace ARMBuildAttrs;
542 setAttributeItem(CPU_name, GetArchDefaultCPUName(Arch), false);
543 setAttributeItem(CPU_arch, GetArchDefaultCPUArch(Arch), false);
544
545 switch (Arch) {
546 case ARM::ARMV2:
547 case ARM::ARMV2A:
548 case ARM::ARMV3:
549 case ARM::ARMV3M:
550 case ARM::ARMV4:
551 case ARM::ARMV5:
552 setAttributeItem(ARM_ISA_use, Allowed, false);
553 break;
554
555 case ARM::ARMV4T:
556 case ARM::ARMV5T:
557 case ARM::ARMV5TE:
558 case ARM::ARMV6:
559 case ARM::ARMV6J:
560 setAttributeItem(ARM_ISA_use, Allowed, false);
561 setAttributeItem(THUMB_ISA_use, Allowed, false);
562 break;
563
564 case ARM::ARMV6T2:
565 setAttributeItem(ARM_ISA_use, Allowed, false);
566 setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
567 break;
568
569 case ARM::ARMV6Z:
570 case ARM::ARMV6ZK:
571 setAttributeItem(ARM_ISA_use, Allowed, false);
572 setAttributeItem(THUMB_ISA_use, Allowed, false);
573 setAttributeItem(Virtualization_use, AllowTZ, false);
574 break;
575
576 case ARM::ARMV6M:
577 setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
578 setAttributeItem(THUMB_ISA_use, Allowed, false);
579 break;
580
581 case ARM::ARMV7:
582 setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
583 break;
584
585 case ARM::ARMV7A:
586 setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
587 setAttributeItem(ARM_ISA_use, Allowed, false);
588 setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
589 break;
590
591 case ARM::ARMV7R:
592 setAttributeItem(CPU_arch_profile, RealTimeProfile, false);
593 setAttributeItem(ARM_ISA_use, Allowed, false);
594 setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
595 break;
596
597 case ARM::ARMV7M:
598 setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
599 setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
600 break;
601
602 case ARM::ARMV8A:
603 setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
604 setAttributeItem(ARM_ISA_use, Allowed, false);
605 setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
606 setAttributeItem(MPextension_use, Allowed, false);
607 setAttributeItem(Virtualization_use, AllowTZVirtualization, false);
608 break;
609
610 case ARM::IWMMXT:
611 setAttributeItem(ARM_ISA_use, Allowed, false);
612 setAttributeItem(THUMB_ISA_use, Allowed, false);
613 setAttributeItem(WMMX_arch, AllowWMMXv1, false);
614 break;
615
616 case ARM::IWMMXT2:
617 setAttributeItem(ARM_ISA_use, Allowed, false);
618 setAttributeItem(THUMB_ISA_use, Allowed, false);
619 setAttributeItem(WMMX_arch, AllowWMMXv2, false);
620 break;
621
622 default:
623 report_fatal_error("Unknown Arch: " + Twine(Arch));
624 break;
625 }
492626 }
493627 void ARMTargetELFStreamer::emitFPU(unsigned Value) {
494628 FPU = Value;
595729
596730 if (FPU != ARM::INVALID_FPU)
597731 emitFPUDefaultAttributes();
732
733 if (Arch != ARM::INVALID_ARCH)
734 emitArchDefaultAttributes();
598735
599736 if (Contents.empty())
600737 return;
0 @ Test the .arch directive for armv2
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv2 architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv2
12
13 @ CHECK-ASM: .arch armv2
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 23
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05320006 010801 |.2.....|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv2a
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv2a architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv2a
12
13 @ CHECK-ASM: .arch armv2a
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 24
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05324100 06010801 |.2A.....|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv3
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv3 architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv3
12
13 @ CHECK-ASM: .arch armv3
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 23
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05330006 010801 |.3.....|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv3m
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv3m architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv3m
12
13 @ CHECK-ASM: .arch armv3m
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 24
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05334D00 06010801 |.3M.....|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv4
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv4 architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv4
12
13 @ CHECK-ASM: .arch armv4
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 23
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05340006 010801 |.4.....|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv4t
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv4t architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv4t
12
13 @ CHECK-ASM: .arch armv4t
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 26
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05345400 06020801 0901 |.4T.......|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv5
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv5 architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv5
12
13 @ CHECK-ASM: .arch armv5
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 23
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05350006 030801 |.5.....|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv5t
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv5t architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv5t
12
13 @ CHECK-ASM: .arch armv5t
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 26
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05355400 06030801 0901 |.5T.......|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv5te
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv5te architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv5te
12
13 @ CHECK-ASM: .arch armv5te
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 27
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05355445 00060408 010901 |.5TE.......|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv6-m
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv6-m architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv6-m
12
13 @ CHECK-ASM: .arch armv6-m
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 27
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05362D4D 00060B07 4D0901 |.6-M....M..|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv6
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv6 architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv6
12
13 @ CHECK-ASM: .arch armv6
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 25
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41180000 00616561 62690001 0E000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05360006 06080109 01 |.6.......|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv6j
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv6j architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv6j
12
13 @ CHECK-ASM: .arch armv6j
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 26
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05364A00 06060801 0901 |.6J.......|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv6t2
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv6t2 architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv6t2
12
13 @ CHECK-ASM: .arch armv6t2
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 27
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05365432 00060808 010902 |.6T2.......|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv6z
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv6z architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv6z
12
13 @ CHECK-ASM: .arch armv6z
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 28
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 411B0000 00616561 62690001 11000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05365A00 06070801 09014401 |.6Z.......D.|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv6zk
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv6zk architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv6zk
12
13 @ CHECK-ASM: .arch armv6zk
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 29
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05365A4B 00060708 01090144 01 |.6ZK.......D.|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv7-a
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv7-a architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv7-a
12
13 @ CHECK-ASM: .arch armv7-a
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 29
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05372D41 00060A07 41080109 02 |.7-A....A....|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv7-m
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv7-m architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv7-m
12
13 @ CHECK-ASM: .arch armv7-m
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 27
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05372D4D 00060A07 4D0902 |.7-M....M..|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv7-r
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv7-r architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv7-r
12
13 @ CHECK-ASM: .arch armv7-r
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 29
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02 |.7-R....R....|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv7
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv7 architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv7
12
13 @ CHECK-ASM: .arch armv7
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 23
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 05370006 0A0902 |.7.....|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for armv8-a
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ armv8-a architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch armv8-a
12
13 @ CHECK-ASM: .arch armv8-a
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 33
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......|
28 @ CHECK-OBJ: 0010: 05382D41 00060E07 41080109 022A0144 |.8-A....A....*.D|
29 @ CHECK-OBJ: 0020: 03 |.|
30 @ CHECK-OBJ: )
0 @ Test the .arch directive for iwmmxt
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ iwmmxt architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch iwmmxt
12
13 @ CHECK-ASM: .arch iwmmxt
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 32
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 411F0000 00616561 62690001 15000000 |A....aeabi......|
28 @ CHECK-OBJ: 0010: 0549574D 4D585400 06040801 09010B01 |.IWMMXT.........|
29 @ CHECK-OBJ: )
0 @ Test the .arch directive for iwmmxt2
1
2 @ This test case will check the default .ARM.attributes value for the
3 @ iwmmxt2 architecture.
4
5 @ RUN: llvm-mc < %s -arch=arm -filetype=asm \
6 @ RUN: | FileCheck %s --check-prefix=CHECK-ASM
7 @ RUN: llvm-mc < %s -arch=arm -filetype=obj \
8 @ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
9
10 .syntax unified
11 .arch iwmmxt2
12
13 @ CHECK-ASM: .arch iwmmxt2
14
15 @ CHECK-OBJ: Name: .ARM.attributes
16 @ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
17 @ CHECK-OBJ: Flags [ (0x0)
18 @ CHECK-OBJ: ]
19 @ CHECK-OBJ: Address: 0x0
20 @ CHECK-OBJ: Offset: 0x34
21 @ CHECK-OBJ: Size: 33
22 @ CHECK-OBJ: Link: 0
23 @ CHECK-OBJ: Info: 0
24 @ CHECK-OBJ: AddressAlignment: 1
25 @ CHECK-OBJ: EntrySize: 0
26 @ CHECK-OBJ: SectionData (
27 @ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......|
28 @ CHECK-OBJ: 0010: 0549574D 4D585432 00060408 0109010B |.IWMMXT2........|
29 @ CHECK-OBJ: 0020: 02 |.|
30 @ CHECK-OBJ: )