llvm.org GIT mirror llvm / 61f4954
[TableGen] Rename ListInit::getSize to just 'size' to be more consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238806 91177308-0d34-0410-b5e6-96231b3b80d8 Craig Topper 5 years ago
8 changed file(s) with 37 addition(s) and 38 deletion(s). Raw diff Collapse all Expand all
602602
603603 void Profile(FoldingSetNodeID &ID) const;
604604
605 unsigned getSize() const { return Values.size(); }
606605 Init *getElement(unsigned i) const {
607606 assert(i < Values.size() && "List element index out of range!");
608607 return Values[i];
626625
627626 ArrayRef getValues() const { return Values; }
628627
629 inline const_iterator begin() const { return Values.begin(); }
630 inline const_iterator end () const { return Values.end(); }
631
632 inline bool empty() const { return Values.empty(); }
628 const_iterator begin() const { return Values.begin(); }
629 const_iterator end () const { return Values.end(); }
630
631 size_t size () const { return Values.size(); }
632 bool empty() const { return Values.empty(); }
633633
634634 /// resolveListElementReference - This method is used to implement
635635 /// VarListElementInit::resolveReferences. If the list element is resolvable
520520 ListInit::convertInitListSlice(const std::vector &Elements) const {
521521 std::vector Vals;
522522 for (unsigned i = 0, e = Elements.size(); i != e; ++i) {
523 if (Elements[i] >= getSize())
523 if (Elements[i] >= size())
524524 return nullptr;
525525 Vals.push_back(getElement(Elements[i]));
526526 }
537537
538538 Init *ListInit::resolveReferences(Record &R, const RecordVal *RV) const {
539539 std::vector Resolved;
540 Resolved.reserve(getSize());
540 Resolved.reserve(size());
541541 bool Changed = false;
542542
543543 for (Init *CurElt : getValues()) {
558558
559559 Init *ListInit::resolveListElementReference(Record &R, const RecordVal *IRV,
560560 unsigned Elt) const {
561 if (Elt >= getSize())
561 if (Elt >= size())
562562 return nullptr; // Out of range reference.
563563 Init *E = getElement(Elt);
564564 // If the element is set to some value, or if we are resolving a reference
12421242 if (!LI)
12431243 return VarListElementInit::get(cast(RV->getValue()), Elt);
12441244
1245 if (Elt >= LI->getSize())
1245 if (Elt >= LI->size())
12461246 return nullptr; // Out of range reference.
12471247 Init *E = LI->getElement(Elt);
12481248 // If the element is set to some value, or if we are resolving a reference
14111411 unsigned Elt) const {
14121412 if (Init *ListVal = Rec->getFieldInit(R, RV, FieldName))
14131413 if (ListInit *LI = dyn_cast(ListVal)) {
1414 if (Elt >= LI->getSize()) return nullptr;
1414 if (Elt >= LI->size()) return nullptr;
14151415 Init *E = LI->getElement(Elt);
14161416
14171417 // If the element is set to some value, or if we are resolving a
308308 }
309309
310310 // Process each value.
311 for (int64_t i = 0; i < List->getSize(); ++i) {
311 for (unsigned i = 0; i < List->size(); ++i) {
312312 Init *ItemVal = List->resolveListElementReference(*CurRec, nullptr, i);
313313 IterVals.push_back(IterRecord(CurLoop.IterVar, ItemVal));
314314 if (ProcessForeachDefs(CurRec, Loc, IterVals))
6868 << std::string(CC->getName().size()+13, ' ')
6969 << "ISD::ArgFlagsTy ArgFlags, CCState &State) {\n";
7070 // Emit all of the actions, in order.
71 for (unsigned i = 0, e = CCActions->getSize(); i != e; ++i) {
71 for (unsigned i = 0, e = CCActions->size(); i != e; ++i) {
7272 O << "\n";
7373 EmitAction(CCActions->getElementAsRecord(i), 2, O);
7474 }
8686
8787 if (Action->isSubClassOf("CCIfType")) {
8888 ListInit *VTs = Action->getValueAsListInit("VTs");
89 for (unsigned i = 0, e = VTs->getSize(); i != e; ++i) {
89 for (unsigned i = 0, e = VTs->size(); i != e; ++i) {
9090 Record *VT = VTs->getElementAsRecord(i);
9191 if (i != 0) O << " ||\n " << IndentStr;
9292 O << "LocVT == " << getEnumName(getValueType(VT));
110110 << IndentStr << " return false;\n";
111111 } else if (Action->isSubClassOf("CCAssignToReg")) {
112112 ListInit *RegList = Action->getValueAsListInit("RegList");
113 if (RegList->getSize() == 1) {
113 if (RegList->size() == 1) {
114114 O << IndentStr << "if (unsigned Reg = State.AllocateReg(";
115115 O << getQualifiedName(RegList->getElementAsRecord(0)) << ")) {\n";
116116 } else {
117117 O << IndentStr << "static const MCPhysReg RegList" << ++Counter
118118 << "[] = {\n";
119119 O << IndentStr << " ";
120 for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) {
120 for (unsigned i = 0, e = RegList->size(); i != e; ++i) {
121121 if (i != 0) O << ", ";
122122 O << getQualifiedName(RegList->getElementAsRecord(i));
123123 }
132132 } else if (Action->isSubClassOf("CCAssignToRegWithShadow")) {
133133 ListInit *RegList = Action->getValueAsListInit("RegList");
134134 ListInit *ShadowRegList = Action->getValueAsListInit("ShadowRegList");
135 if (ShadowRegList->getSize() >0 &&
136 ShadowRegList->getSize() != RegList->getSize())
135 if (!ShadowRegList->empty() && ShadowRegList->size() != RegList->size())
137136 PrintFatalError("Invalid length of list of shadowed registers");
138137
139 if (RegList->getSize() == 1) {
138 if (RegList->size() == 1) {
140139 O << IndentStr << "if (unsigned Reg = State.AllocateReg(";
141140 O << getQualifiedName(RegList->getElementAsRecord(0));
142141 O << ", " << getQualifiedName(ShadowRegList->getElementAsRecord(0));
148147 O << IndentStr << "static const MCPhysReg RegList" << RegListNumber
149148 << "[] = {\n";
150149 O << IndentStr << " ";
151 for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) {
150 for (unsigned i = 0, e = RegList->size(); i != e; ++i) {
152151 if (i != 0) O << ", ";
153152 O << getQualifiedName(RegList->getElementAsRecord(i));
154153 }
157156 O << IndentStr << "static const MCPhysReg RegList"
158157 << ShadowRegListNumber << "[] = {\n";
159158 O << IndentStr << " ";
160 for (unsigned i = 0, e = ShadowRegList->getSize(); i != e; ++i) {
159 for (unsigned i = 0, e = ShadowRegList->size(); i != e; ++i) {
161160 if (i != 0) O << ", ";
162161 O << getQualifiedName(ShadowRegList->getElementAsRecord(i));
163162 }
205204 O << IndentStr << "static const MCPhysReg ShadowRegList"
206205 << ShadowRegListNumber << "[] = {\n";
207206 O << IndentStr << " ";
208 for (unsigned i = 0, e = ShadowRegList->getSize(); i != e; ++i) {
207 for (unsigned i = 0, e = ShadowRegList->size(); i != e; ++i) {
209208 if (i != 0) O << ", ";
210209 O << getQualifiedName(ShadowRegList->getElementAsRecord(i));
211210 }
136136
137137 // Make sure that all the sub-lists in 'ValueCols' have same number of
138138 // elements as the fields in 'ColFields'.
139 if (ColI->getSize() != ColFields->getSize())
139 if (ColI->size() != ColFields->size())
140140 PrintFatalError(MapRec->getLoc(), "Record `" + MapRec->getName() +
141141 "', field `ValueCols' entries don't match with " +
142142 " the entries in 'ColFields'!");
266266
267267 // Check if the instruction is a KeyCol instruction.
268268 bool MatchFound = true;
269 for (unsigned j = 0, endCF = ColFields->getSize();
269 for (unsigned j = 0, endCF = ColFields->size();
270270 (j < endCF) && MatchFound; j++) {
271271 RecordVal *ColFieldName = CurInstr->getValue(ColFields->getElement(j));
272272 std::string CurInstrVal = ColFieldName->getValue()->getAsUnquotedString();
326326 for (unsigned i = 0, e = RelatedInstrVec.size(); i < e; i++) {
327327 bool MatchFound = true;
328328 Record *CurInstr = RelatedInstrVec[i];
329 for (unsigned j = 0, endCF = ColFields->getSize();
329 for (unsigned j = 0, endCF = ColFields->size();
330330 (j < endCF) && MatchFound; j++) {
331331 Init *ColFieldJ = ColFields->getElement(j);
332332 Init *CurInstrInit = CurInstr->getValue(ColFieldJ)->getValue();
438438 if (ValueCols.size() > 1) {
439439 for (unsigned i = 0, e = ValueCols.size(); i < e; i++) {
440440 ListInit *ColumnI = ValueCols[i];
441 for (unsigned j = 0, ColSize = ColumnI->getSize(); j < ColSize; j++) {
441 for (unsigned j = 0, ColSize = ColumnI->size(); j < ColSize; ++j) {
442442 std::string ColName = ColFields->getElement(j)->getAsUnquotedString();
443443 OS << " if (in" << ColName;
444444 OS << " == ";
445445 OS << ColName << "_" << ColumnI->getElement(j)->getAsUnquotedString();
446 if (j < ColumnI->getSize() - 1) OS << " && ";
446 if (j < ColumnI->size() - 1) OS << " && ";
447447 else OS << ")\n";
448448 }
449449 OS << " return " << InstrMapDesc.getName();
504504 ColFields = CurMap->getValueAsListInit("ColFields");
505505 ListInit *List = CurMap->getValueAsListInit("ValueCols");
506506 std::vector ValueCols;
507 unsigned ListSize = List->getSize();
507 unsigned ListSize = List->size();
508508
509509 for (unsigned j = 0; j < ListSize; j++) {
510510 ListInit *ListJ = dyn_cast(List->getElement(j));
511511
512 if (ListJ->getSize() != ColFields->getSize())
512 if (ListJ->size() != ColFields->size())
513513 PrintFatalError("Record `" + CurMap->getName() + "', field "
514514 "`ValueCols' entries don't match with the entries in 'ColFields' !");
515515 ValueCols.push_back(ListJ);
516516 }
517517
518 for (unsigned j = 0, endCF = ColFields->getSize(); j < endCF; j++) {
518 for (unsigned j = 0, endCF = ColFields->size(); j < endCF; j++) {
519519 for (unsigned k = 0; k < ListSize; k++){
520520 std::string ColName = ColFields->getElement(j)->getAsUnquotedString();
521521 ColFieldValueMap[ColName].push_back((ValueCols[k])->getElement(j));
542542 std::vector Indices = Def->getValueAsListOfDefs("SubRegIndices");
543543 unsigned Dim = Indices.size();
544544 ListInit *SubRegs = Def->getValueAsListInit("SubRegs");
545 if (Dim != SubRegs->getSize())
545 if (Dim != SubRegs->size())
546546 PrintFatalError(Def->getLoc(), "SubRegIndices and SubRegs size mismatch");
547547 if (Dim < 2)
548548 PrintFatalError(Def->getLoc(),
675675 // Allocation order 0 is the full set. AltOrders provides others.
676676 const SetTheory::RecVec *Elements = RegBank.getSets().expand(R);
677677 ListInit *AltOrders = R->getValueAsListInit("AltOrders");
678 Orders.resize(1 + AltOrders->getSize());
678 Orders.resize(1 + AltOrders->size());
679679
680680 // Default allocation order always contains all registers.
681681 for (unsigned i = 0, e = Elements->size(); i != e; ++i) {
688688
689689 // Alternative allocation orders may be subsets.
690690 SetTheory::RecSet Order;
691 for (unsigned i = 0, e = AltOrders->getSize(); i != e; ++i) {
691 for (unsigned i = 0, e = AltOrders->size(); i != e; ++i) {
692692 RegBank.getSets().evaluate(AltOrders->getElement(i), Order, R->getLoc());
693693 Orders[1 + i].append(Order.begin(), Order.end());
694694 // Verify that all altorder members are regclass members.
485485 // Parse the list of return types.
486486 std::vector OverloadedVTs;
487487 ListInit *TypeList = R->getValueAsListInit("RetTypes");
488 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
488 for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
489489 Record *TyEl = TypeList->getElementAsRecord(i);
490490 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
491491 MVT::SimpleValueType VT;
519519
520520 // Parse the list of parameter types.
521521 TypeList = R->getValueAsListInit("ParamTypes");
522 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
522 for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
523523 Record *TyEl = TypeList->getElementAsRecord(i);
524524 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
525525 MVT::SimpleValueType VT;
555555
556556 // Parse the intrinsic properties.
557557 ListInit *PropList = R->getValueAsListInit("Properties");
558 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
558 for (unsigned i = 0, e = PropList->size(); i != e; ++i) {
559559 Record *Property = PropList->getElementAsRecord(i);
560560 assert(Property->isSubClassOf("IntrinsicProperty") &&
561561 "Expected a property!");
11121112 ListInit *Predicates =
11131113 AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates");
11141114 bool IsFirstEmission = true;
1115 for (unsigned i = 0; i < Predicates->getSize(); ++i) {
1115 for (unsigned i = 0; i < Predicates->size(); ++i) {
11161116 Record *Pred = Predicates->getElementAsRecord(i);
11171117 if (!Pred->getValue("AssemblerMatcherPredicate"))
11181118 continue;
11351135 emitSinglePredicateMatch(o, pairs.first, Emitter->PredicateNamespace);
11361136 IsFirstEmission = false;
11371137 }
1138 return Predicates->getSize() > 0;
1138 return !Predicates->empty();
11391139 }
11401140
11411141 bool FilterChooser::doesOpcodeNeedPredicate(unsigned Opc) const {
11421142 ListInit *Predicates =
11431143 AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates");
1144 for (unsigned i = 0; i < Predicates->getSize(); ++i) {
1144 for (unsigned i = 0; i < Predicates->size(); ++i) {
11451145 Record *Pred = Predicates->getElementAsRecord(i);
11461146 if (!Pred->getValue("AssemblerMatcherPredicate"))
11471147 continue;