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AMDGPU: Relax SGPR asm constraint register class s should be SReg_32 to be as general as possible. This can avoid a copy from m0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280154 91177308-0d34-0410-b5e6-96231b3b80d8 Matt Arsenault 3 years ago
2 changed file(s) with 11 addition(s) and 1 deletion(s). Raw diff Collapse all Expand all
37503750 default:
37513751 return std::make_pair(0U, nullptr);
37523752 case 32:
3753 return std::make_pair(0U, &AMDGPU::SGPR_32RegClass);
3753 return std::make_pair(0U, &AMDGPU::SReg_32RegClass);
37543754 case 64:
37553755 return std::make_pair(0U, &AMDGPU::SGPR_64RegClass);
37563756 case 128:
2020 %s256 = tail call <8 x i32> asm sideeffect "s_load_dwordx8 $0, $1", "=s,s"(i32 addrspace(1)* %ptr)
2121 ret void
2222 }
23
24 ; GCN-LABEL: {{^}}inline_sreg_constraint_m0:
25 ; GCN: s_mov_b32 m0, -1
26 ; GCN-NOT: s_mov_b32 s{{[0-9]+}}, m0
27 ; GCN: ; use m0
28 define void @inline_sreg_constraint_m0(i32 addrspace(1)* %ptr) {
29 %m0 = tail call i32 asm sideeffect "s_mov_b32 m0, -1", "={M0}"()
30 tail call void asm sideeffect "; use $0", "s"(i32 %m0)
31 ret void
32 }