llvm.org GIT mirror llvm / 5fe5b3d
ARM: update even more tests More updating of tests to be explicit about the target triple rather than relying on the default target triple supporting ARM mode. Indicate to lit that object emission is not yet available for Windows on ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205545 91177308-0d34-0410-b5e6-96231b3b80d8 Saleem Abdulrasool 5 years ago
10 changed file(s) with 56 addition(s) and 21 deletion(s). Raw diff Collapse all Expand all
None ; RUN: llc < %s -march=arm
0 ; RUN: llc -mtriple=arm-eabi %s -o /dev/null
11
22 define void @f(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
33 entry:
None ; RUN: llc < %s -march=arm -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
0 ; RUN: llc -mtriple=arm-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
11 ; rdar://7317664
22
33 define i32 @t(i32 %X) nounwind {
None ; RUN: llc < %s -march=arm | grep mul | count 2
1 ; RUN: llc < %s -march=arm | grep lsl | count 2
0 ; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
21
32 define i32 @f1(i32 %u) {
43 %tmp = mul i32 %u, %u
54 ret i32 %tmp
65 }
6
7 ; CHECK: mul
78
89 define i32 @f2(i32 %u, i32 %v) {
910 %tmp = mul i32 %u, %v
1516 ret i32 %tmp
1617 }
1718
19 ; CHECK: mul
20 ; CHECK: lsl
21
1822 define i32 @f4(i32 %u) {
1923 %tmp = mul i32 %u, 4
2024 ret i32 %tmp
2125 }
26
27 ; CHECK-NOT: mul
28
29 ; CHECK: lsl
30 ; CHECK-NOT: lsl
31
None ; RUN: llc -march=arm -mattr=+vfp2 %s -o /dev/null
0 ; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 %s -o /dev/null
11
22 define i64 @test_i64(i64 %a1, i64 %a2) {
33 ret i64 %a2
None ; RUN: llc -march=arm -mattr=+vfp2 %s -o /dev/null
0 ; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 %s -o /dev/null
11
22 define i64 @test_i64_arg3(i64 %a1, i64 %a2, i64 %a3) {
33 ret i64 %a3
None ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
0 ; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s
1
12 define i32 @f(i32 %a, i32 %b, i32 %c) nounwind readnone ssp {
23 entry:
34 ; CHECK-NOT: smmls
None ; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 -show-mc-encoding | FileCheck %s
0 ; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 -show-mc-encoding %s -o - \
1 ; RUN: | FileCheck %s
12
23 define i32 @f1(i32 %a.s) {
34 entry:
None @ RUN: llvm-mc -show-encoding -arch=arm < %s | FileCheck %s --check-prefix=CHECK-ARM-ONLY
1 @ RUN: llvm-mc -show-encoding -triple=armv4t < %s | FileCheck %s --check-prefix=CHECK-ARM-THUMB
2 @ RUN: llvm-mc -show-encoding -arch=arm -mcpu=cortex-a15 < %s| FileCheck %s --check-prefix=CHECK-ARM-THUMB
3 @ RUN: llvm-mc -show-encoding -arch=arm -mcpu=cortex-m3 < %s | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
4 @ RUN: llvm-mc -show-encoding -triple=armv7m < %s | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
5 @ RUN: llvm-mc -show-encoding -triple=armv6m < %s | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
0 @ RUN: llvm-mc -show-encoding -triple=arm-eabi < %s \
1 @ RUN: | FileCheck %s --check-prefix=CHECK-ARM-ONLY
2
3 @ RUN: llvm-mc -show-encoding -triple=armv4t-eabi < %s \
4 @ RUN: | FileCheck %s --check-prefix=CHECK-ARM-THUMB
5
6 @ RUN: llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-a15 < %s \
7 @ RUN: | FileCheck %s --check-prefix=CHECK-ARM-THUMB
8
9 @ RUN: llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-m3 < %s \
10 @ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
11
12 @ RUN: llvm-mc -show-encoding -triple=armv7m-eabi < %s \
13 @ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
14
15 @ RUN: llvm-mc -show-encoding -triple=armv6m-eabi < %s \
16 @ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
617
718 @ Make sure the architecture chosen by LLVM defaults to a compatible
819 @ ARM/Thumb mode.
None @ RUN: not llvm-mc -show-encoding -arch=arm < %s 2>&1 | FileCheck %s --check-prefix=CHECK-ARM-ONLY
1 @ RUN: llvm-mc -show-encoding -triple=armv4t < %s 2>&1| FileCheck %s --check-prefix=CHECK-ARM-THUMB
2 @ RUN: llvm-mc -show-encoding -arch=arm -mcpu=cortex-a15 < %s 2>&1| FileCheck %s --check-prefix=CHECK-ARM-THUMB
3 @ RUN: not llvm-mc -show-encoding -arch=arm -mcpu=cortex-m3 < %s 2>&1 | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
4 @ RUN: not llvm-mc -show-encoding -triple=armv7m < %s 2>&1 | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
5 @ RUN: not llvm-mc -show-encoding -triple=armv6m < %s 2>&1 | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
0 @ RUN: not llvm-mc -show-encoding -triple=arm-eabi < %s 2>&1 \
1 @ RUN: | FileCheck %s --check-prefix=CHECK-ARM-ONLY
2
3 @ RUN: llvm-mc -show-encoding -triple=armv4t < %s 2>&1 \
4 @ RUN: | FileCheck %s --check-prefix=CHECK-ARM-THUMB
5
6 @ RUN: llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-a15 < %s 2>&1 \
7 @ RUN: | FileCheck %s --check-prefix=CHECK-ARM-THUMB
8
9 @ RUN: not llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-m3 < %s 2>&1 \
10 @ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
11
12 @ RUN: not llvm-mc -show-encoding -triple=armv7m-eabi < %s 2>&1 \
13 @ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
14
15 @ RUN: not llvm-mc -show-encoding -triple=armv6m-eabi < %s 2>&1 \
16 @ RUN: | FileCheck %s --check-prefix=CHECK-THUMB-ONLY
617
718 @ Make sure correct diagnostics are given for CPUs without support for
819 @ one or other of the execution states.
291291 config.available_features.add("msan")
292292
293293 # Direct object generation
294 if not 'hexagon' in config.target_triple:
294 if not 'hexagon' in config.target_triple and \
295 not re.match('(arm|thumb).*windows', config.target_triple):
295296 config.available_features.add("object-emission")
296297
297298 if config.have_zlib == "1":