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MIR Serialization: Serialize the 'undef' register machine operand flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241762 91177308-0d34-0410-b5e6-96231b3b80d8 Alex Lorenz 5 years ago
5 changed file(s) with 52 addition(s) and 2 deletion(s). Raw diff Collapse all Expand all
7171 .Case("implicit-def", MIToken::kw_implicit_define)
7272 .Case("dead", MIToken::kw_dead)
7373 .Case("killed", MIToken::kw_killed)
74 .Case("undef", MIToken::kw_undef)
7475 .Default(MIToken::Identifier);
7576 }
7677
4040 kw_implicit_define,
4141 kw_dead,
4242 kw_killed,
43 kw_undef,
4344
4445 // Identifier tokens
4546 Identifier,
7677
7778 bool isRegisterFlag() const {
7879 return Kind == kw_implicit || Kind == kw_implicit_define ||
79 Kind == kw_dead || Kind == kw_killed;
80 Kind == kw_dead || Kind == kw_killed || Kind == kw_undef;
8081 }
8182
8283 bool is(TokenKind K) const { return Kind == K; }
308308 case MIToken::kw_killed:
309309 Flags |= RegState::Kill;
310310 break;
311 case MIToken::kw_undef:
312 Flags |= RegState::Undef;
313 break;
311314 // TODO: report an error when we specify the same flag more than once.
312315 // TODO: parse the other register flags.
313316 default:
332335 // TODO: Parse subregister.
333336 Dest = MachineOperand::CreateReg(
334337 Reg, Flags & RegState::Define, Flags & RegState::Implicit,
335 Flags & RegState::Kill, Flags & RegState::Dead);
338 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef);
336339 return false;
337340 }
338341
418421 case MIToken::kw_implicit_define:
419422 case MIToken::kw_dead:
420423 case MIToken::kw_killed:
424 case MIToken::kw_undef:
421425 case MIToken::underscore:
422426 case MIToken::NamedRegister:
423427 return parseRegisterOperand(Dest);
219219 OS << "dead ";
220220 if (Op.isKill())
221221 OS << "killed ";
222 if (Op.isUndef())
223 OS << "undef ";
222224 printReg(Op.getReg(), OS, TRI);
223225 // TODO: Print sub register.
224226 break;
0 # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
1 # This test ensures that the MIR parser parses the 'undef' register flags
2 # correctly.
3
4 --- |
5
6 define i32 @compute(i32 %a) #0 {
7 body:
8 %c = mul i32 %a, 11
9 ret i32 %c
10 }
11
12 define i32 @foo(i32 %a) #0 {
13 entry:
14 %b = call i32 @compute(i32 %a)
15 ret i32 %b
16 }
17
18 attributes #0 = { "no-frame-pointer-elim"="false" }
19
20 ...
21 ---
22 name: compute
23 body:
24 - id: 0
25 name: body
26 instructions:
27 - '%eax = IMUL32rri8 %edi, 11, implicit-def %eflags'
28 - 'RETQ %eax'
29 ...
30 ---
31 name: foo
32 body:
33 - id: 0
34 name: entry
35 instructions:
36 # CHECK: - 'PUSH64r undef %rax
37 - 'PUSH64r undef %rax, implicit-def %rsp, implicit %rsp'
38 - 'CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax'
39 - '%rdx = POP64r implicit-def %rsp, implicit %rsp'
40 - 'RETQ %eax'
41 ...