llvm.org GIT mirror llvm / 5ebd10e
If sp offset will be materialized in a register. Clear the offset field of str / ldr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34010 91177308-0d34-0410-b5e6-96231b3b80d8 Evan Cheng 13 years ago
1 changed file(s) with 10 addition(s) and 8 deletion(s). Raw diff Collapse all Expand all
761761 return;
762762 }
763763
764 bool isThumSpillRestore = Opcode == ARM::tRestore || Opcode == ARM::tSpill;
765 if (AddrMode == ARMII::AddrModeTs) {
766 // Thumb tLDRspi, tSTRspi. These will change to instructions that use
767 // a different base register.
768 NumBits = 5;
769 Mask = (1 << NumBits) - 1;
770 }
764771 // If this is a thumb spill / restore, we will be using a constpool load to
765772 // materialize the offset.
766 bool isThumSpillRestore = Opcode == ARM::tRestore || Opcode == ARM::tSpill;
767 if (AddrMode == ARMII::AddrModeTs && !isThumSpillRestore) {
768 if (AddrMode == ARMII::AddrModeTs) {
769 // Thumb tLDRspi, tSTRspi. These will change to instructions that use
770 // a different base register.
771 NumBits = 5;
772 Mask = (1 << NumBits) - 1;
773 }
773 if (AddrMode == ARMII::AddrModeTs && isThumSpillRestore)
774 ImmOp.ChangeToImmediate(0);
775 else {
774776 // Otherwise, it didn't fit. Pull in what we can to simplify the immed.
775777 ImmedOffset = ImmedOffset & Mask;
776778 if (isSub)