llvm.org GIT mirror llvm / 5e9125c
[ARM GlobalISel] Add tests for PKHBT and PKHTB Test (some of) the patterns for selecting PKHBT and PKHTB. The others are just very similar to the ones we're testing and there would be little value in covering them as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320352 91177308-0d34-0410-b5e6-96231b3b80d8 Diana Picus 2 years ago
1 changed file(s) with 254 addition(s) and 0 deletion(s). Raw diff Collapse all Expand all
1818 define void @test_bicri_commutative_xor() { ret void }
1919 define void @test_bicri_commutative_and() { ret void }
2020 define void @test_bicri_commutative_both() { ret void }
21
22 define void @test_pkhbt() #0 { ret void }
23 define void @test_pkhbt_commutative() #0 { ret void }
24 define void @test_pkhbt_imm16_31() #0 { ret void }
25 define void @test_pkhbt_unshifted() #0 { ret void }
26
27 define void @test_pkhtb_imm16() #0 { ret void }
28 define void @test_pkhtb_imm1_15() #0 { ret void }
2129
2230 attributes #0 = { "target-features"="+v6" }
2331 attributes #1 = { "target-features"="-v6" }
577585 BX_RET 14, %noreg, implicit %r0
578586 ; CHECK: BX_RET 14, %noreg, implicit %r0
579587 ...
588 ---
589 name: test_pkhbt
590 # CHECK-LABEL: name: test_pkhbt
591 legalized: true
592 regBankSelected: true
593 selected: false
594 # CHECK: selected: true
595 registers:
596 - { id: 0, class: gprb }
597 - { id: 1, class: gprb }
598 - { id: 2, class: gprb }
599 - { id: 3, class: gprb }
600 - { id: 4, class: gprb }
601 - { id: 5, class: gprb }
602 - { id: 6, class: gprb }
603 - { id: 7, class: gprb }
604 - { id: 8, class: gprb }
605 body: |
606 bb.0:
607 liveins: %r0, %r1
608
609 %0(s32) = COPY %r0
610 %1(s32) = COPY %r1
611 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY %r0
612 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY %r1
613
614 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
615 %3(s32) = G_AND %0, %2
616
617 %4(s32) = G_CONSTANT i32 7
618 %5(s32) = G_SHL %1, %4
619 %6(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
620 %7(s32) = G_AND %5, %6
621
622 %8(s32) = G_OR %3, %7
623 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 7, 14, %noreg
624
625 %r0 = COPY %8(s32)
626 ; CHECK: %r0 = COPY [[VREGR]]
627
628 BX_RET 14, %noreg, implicit %r0
629 ; CHECK: BX_RET 14, %noreg, implicit %r0
630 ...
631 ---
632 name: test_pkhbt_commutative
633 # CHECK-LABEL: name: test_pkhbt_commutative
634 legalized: true
635 regBankSelected: true
636 selected: false
637 # CHECK: selected: true
638 registers:
639 - { id: 0, class: gprb }
640 - { id: 1, class: gprb }
641 - { id: 2, class: gprb }
642 - { id: 3, class: gprb }
643 - { id: 4, class: gprb }
644 - { id: 5, class: gprb }
645 - { id: 6, class: gprb }
646 - { id: 7, class: gprb }
647 - { id: 8, class: gprb }
648 body: |
649 bb.0:
650 liveins: %r0, %r1
651
652 %0(s32) = COPY %r0
653 %1(s32) = COPY %r1
654 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY %r0
655 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY %r1
656
657 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
658 %3(s32) = G_AND %0, %2
659
660 %4(s32) = G_CONSTANT i32 7
661 %5(s32) = G_SHL %1, %4
662 %6(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
663 %7(s32) = G_AND %5, %6
664
665 %8(s32) = G_OR %7, %3
666 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 7, 14, %noreg
667
668 %r0 = COPY %8(s32)
669 ; CHECK: %r0 = COPY [[VREGR]]
670
671 BX_RET 14, %noreg, implicit %r0
672 ; CHECK: BX_RET 14, %noreg, implicit %r0
673 ...
674 ---
675 name: test_pkhbt_imm16_31
676 # CHECK-LABEL: name: test_pkhbt_imm16_31
677 legalized: true
678 regBankSelected: true
679 selected: false
680 # CHECK: selected: true
681 registers:
682 - { id: 0, class: gprb }
683 - { id: 1, class: gprb }
684 - { id: 2, class: gprb }
685 - { id: 3, class: gprb }
686 - { id: 4, class: gprb }
687 - { id: 5, class: gprb }
688 - { id: 6, class: gprb }
689 body: |
690 bb.0:
691 liveins: %r0, %r1
692
693 %0(s32) = COPY %r0
694 %1(s32) = COPY %r1
695 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY %r0
696 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY %r1
697
698 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
699 %3(s32) = G_AND %0, %2
700
701 %4(s32) = G_CONSTANT i32 17
702 %5(s32) = G_SHL %1, %4
703
704 %6(s32) = G_OR %3, %5
705 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 17, 14, %noreg
706
707 %r0 = COPY %6(s32)
708 ; CHECK: %r0 = COPY [[VREGR]]
709
710 BX_RET 14, %noreg, implicit %r0
711 ; CHECK: BX_RET 14, %noreg, implicit %r0
712 ...
713 ---
714 name: test_pkhbt_unshifted
715 # CHECK-LABEL: name: test_pkhbt_unshifted
716 legalized: true
717 regBankSelected: true
718 selected: false
719 # CHECK: selected: true
720 registers:
721 - { id: 0, class: gprb }
722 - { id: 1, class: gprb }
723 - { id: 2, class: gprb }
724 - { id: 3, class: gprb }
725 - { id: 4, class: gprb }
726 - { id: 5, class: gprb }
727 - { id: 6, class: gprb }
728 body: |
729 bb.0:
730 liveins: %r0, %r1
731
732 %0(s32) = COPY %r0
733 %1(s32) = COPY %r1
734 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY %r0
735 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY %r1
736
737 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
738 %3(s32) = G_AND %0, %2
739
740 %4(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
741 %5(s32) = G_AND %1, %4
742
743 %6(s32) = G_OR %3, %5
744 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 0, 14, %noreg
745
746 %r0 = COPY %6(s32)
747 ; CHECK: %r0 = COPY [[VREGR]]
748
749 BX_RET 14, %noreg, implicit %r0
750 ; CHECK: BX_RET 14, %noreg, implicit %r0
751 ...
752 ---
753 name: test_pkhtb_imm16
754 # CHECK-LABEL: name: test_pkhtb_imm16
755 legalized: true
756 regBankSelected: true
757 selected: false
758 # CHECK: selected: true
759 registers:
760 - { id: 0, class: gprb }
761 - { id: 1, class: gprb }
762 - { id: 2, class: gprb }
763 - { id: 3, class: gprb }
764 - { id: 4, class: gprb }
765 - { id: 5, class: gprb }
766 - { id: 6, class: gprb }
767 body: |
768 bb.0:
769 liveins: %r0, %r1
770
771 %0(s32) = COPY %r0
772 %1(s32) = COPY %r1
773 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY %r0
774 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY %r1
775
776 %2(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
777 %3(s32) = G_AND %0, %2
778
779 %4(s32) = G_CONSTANT i32 16
780 %5(s32) = G_LSHR %1, %4
781
782 %6(s32) = G_OR %3, %5
783 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHTB [[VREGX]], [[VREGY]], 16, 14, %noreg
784
785 %r0 = COPY %6(s32)
786 ; CHECK: %r0 = COPY [[VREGR]]
787
788 BX_RET 14, %noreg, implicit %r0
789 ; CHECK: BX_RET 14, %noreg, implicit %r0
790 ...
791 ---
792 name: test_pkhtb_imm1_15
793 # CHECK-LABEL: name: test_pkhtb_imm1_15
794 legalized: true
795 regBankSelected: true
796 selected: false
797 # CHECK: selected: true
798 registers:
799 - { id: 0, class: gprb }
800 - { id: 1, class: gprb }
801 - { id: 2, class: gprb }
802 - { id: 3, class: gprb }
803 - { id: 4, class: gprb }
804 - { id: 5, class: gprb }
805 - { id: 6, class: gprb }
806 - { id: 7, class: gprb }
807 - { id: 8, class: gprb }
808 body: |
809 bb.0:
810 liveins: %r0, %r1
811
812 %0(s32) = COPY %r0
813 %1(s32) = COPY %r1
814 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY %r0
815 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY %r1
816
817 %2(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
818 %3(s32) = G_AND %0, %2
819
820 %4(s32) = G_CONSTANT i32 7
821 %5(s32) = G_LSHR %1, %4
822 %6(s32) = G_CONSTANT i32 65535 ; 0xFFFF
823 %7(s32) = G_AND %5, %6
824
825 %8(s32) = G_OR %3, %7
826 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHTB [[VREGX]], [[VREGY]], 7, 14, %noreg
827
828 %r0 = COPY %8(s32)
829 ; CHECK: %r0 = COPY [[VREGR]]
830
831 BX_RET 14, %noreg, implicit %r0
832 ; CHECK: BX_RET 14, %noreg, implicit %r0
833 ...